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| author | Anup Patel <anup.patel@wdc.com> | 2020-06-22 08:38:44 +0530 |
|---|---|---|
| committer | Anup Patel <anup@brainfault.org> | 2020-07-09 23:04:23 +0530 |
| commit | 2cb19ac699b51d38fba57f4acb1ce02f06e7548f (patch) | |
| tree | 5fef42799cb4cc024905ca5d0d08f79bfb3b4117 /riscv/dts.cc | |
| parent | 564ed97f618321b8499a3e8837c36f622ee8a893 (diff) | |
| download | spike-2cb19ac699b51d38fba57f4acb1ce02f06e7548f.zip spike-2cb19ac699b51d38fba57f4acb1ce02f06e7548f.tar.gz spike-2cb19ac699b51d38fba57f4acb1ce02f06e7548f.tar.bz2 | |
Add bootargs command-line option to Spike
We add bootargs command-line option to Spike which allows us to
provide custom kernel parameters to Linux and Xvisor.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Diffstat (limited to 'riscv/dts.cc')
| -rw-r--r-- | riscv/dts.cc | 17 |
1 files changed, 14 insertions, 3 deletions
diff --git a/riscv/dts.cc b/riscv/dts.cc index 6a38ba0..56b76e6 100644 --- a/riscv/dts.cc +++ b/riscv/dts.cc @@ -11,6 +11,7 @@ std::string make_dts(size_t insns_per_rtc_tick, size_t cpu_hz, reg_t initrd_start, reg_t initrd_end, + const char* bootargs, std::vector<processor_t*> procs, std::vector<std::pair<reg_t, mem_t*>> mems) { @@ -25,12 +26,22 @@ std::string make_dts(size_t insns_per_rtc_tick, size_t cpu_hz, " model = \"ucbbar,spike-bare\";\n" " chosen {\n"; if (initrd_start < initrd_end) { - s << " bootargs = \"root=/dev/ram console=hvc0 earlycon=sbi\";\n" - " linux,initrd-start = <" << (size_t)initrd_start << ">;\n" + s << " linux,initrd-start = <" << (size_t)initrd_start << ">;\n" " linux,initrd-end = <" << (size_t)initrd_end << ">;\n"; + if (!bootargs) + bootargs = "root=/dev/ram console=hvc0 earlycon=sbi"; } else { - s << " bootargs = \"console=hvc0 earlycon=sbi\";\n"; + if (!bootargs) + bootargs = "console=hvc0 earlycon=sbi"; } + s << " bootargs = \""; + for (size_t i = 0; i < strlen(bootargs); i++) { + if (bootargs[i] == '"') + s << '\\' << bootargs[i]; + else + s << bootargs[i]; + } + s << "\";\n"; s << " };\n" " cpus {\n" " #address-cells = <1>;\n" |