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| author | Tim Newsome <tim@sifive.com> | 2016-05-04 13:14:46 -0700 |
|---|---|---|
| committer | Tim Newsome <tim@sifive.com> | 2016-05-23 12:12:12 -0700 |
| commit | 6ef848928a5e2d72d9b0aed66f669b7b9a80b49a (patch) | |
| tree | 5d90e92a393202ea86179482f1c349f010bc9d7b /riscv/decode.h | |
| parent | 850e745dcf300cd5369d006b31e17ebfb417eab4 (diff) | |
| download | spike-6ef848928a5e2d72d9b0aed66f669b7b9a80b49a.zip spike-6ef848928a5e2d72d9b0aed66f669b7b9a80b49a.tar.gz spike-6ef848928a5e2d72d9b0aed66f669b7b9a80b49a.tar.bz2 | |
Software breakpoints sort of work.
Diffstat (limited to 'riscv/decode.h')
| -rw-r--r-- | riscv/decode.h | 6 |
1 files changed, 0 insertions, 6 deletions
diff --git a/riscv/decode.h b/riscv/decode.h index 067d426..1625398 100644 --- a/riscv/decode.h +++ b/riscv/decode.h @@ -229,12 +229,6 @@ private: * automatically generated. */ /* TODO */ #include "/media/sf_tnewsome/Synced/SiFive/debug-spec/core_registers.tex.h" -#define DCSR_CAUSE_NONE 0 -#define DCSR_CAUSE_SWBP 1 -#define DCSR_CAUSE_HWBP 2 -#define DCSR_CAUSE_DEBUGINT 3 -#define DCSR_CAUSE_STEPPED 4 -#define DCSR_CAUSE_HALT 5 #define DEBUG_START 0x100 #define DEBUG_ROM_START 0x800 |