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authorChih-Min Chao <chihmin.chao@sifive.com>2020-05-27 22:56:20 -0700
committerChih-Min Chao <chihmin.chao@sifive.com>2020-05-27 22:56:21 -0700
commitd3553b5d03fb0a37d657d0534c508354f0378307 (patch)
tree545e35c64b2f1b1b88207fa06969de3c46b6691a /riscv/decode.h
parente8a298e2ff8d0c785bb8986d454333e7bd9f4ea3 (diff)
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rvv: fix ext alignment checking for src and dst
Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com>
Diffstat (limited to 'riscv/decode.h')
-rw-r--r--riscv/decode.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/riscv/decode.h b/riscv/decode.h
index 981f65e..5226948 100644
--- a/riscv/decode.h
+++ b/riscv/decode.h
@@ -1749,6 +1749,8 @@ for (reg_t i = 0; i < P.VU.vlmax && P.VU.vl != 0; ++i) { \
require_vm; \
reg_t from = P.VU.vsew / div; \
require(from >= e8 && from <= e64); \
+ require_align(insn.rd(), P.VU.vflmul); \
+ require_align(insn.rs2(), P.VU.vflmul / div); \
require_noover(insn.rd(), P.VU.vflmul, insn.rs2(), P.VU.vflmul / div); \
reg_t pat = (((P.VU.vsew >> 3) << 4) | from >> 3); \
VI_GENERAL_LOOP_BASE \