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authorChih-Min Chao <48193236+chihminchao@users.noreply.github.com>2022-02-24 07:36:45 +0800
committerGitHub <noreply@github.com>2022-02-23 15:36:45 -0800
commitb3e8d381a61f62c7d43f5dfa22ffc94d55f25223 (patch)
tree8b2603e4db7d1125cd979f7bd0ba45c8d76aa797 /riscv/decode.h
parent5ba63a44706173b556b8d5632872b39a09d7f16d (diff)
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rvv: add missing elen checking for some ldst (#927)
Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com>
Diffstat (limited to 'riscv/decode.h')
-rw-r--r--riscv/decode.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/riscv/decode.h b/riscv/decode.h
index 6f99cf5..a8cac94 100644
--- a/riscv/decode.h
+++ b/riscv/decode.h
@@ -556,6 +556,7 @@ static inline bool is_aligned(const unsigned val, const unsigned pos)
require_align(insn.rd(), vemul); \
require((nf * emul) <= (NVPR / 4) && \
(insn.rd() + nf * emul) <= NVPR); \
+ require(veew <= P.VU.ELEN); \
#define VI_CHECK_LOAD(elt_width, is_mask_ldst) \
VI_CHECK_STORE(elt_width, is_mask_ldst); \
@@ -1797,6 +1798,7 @@ reg_t index[P.VU.vlmax]; \
#define VI_LD_WHOLE(elt_width) \
require_vector_novtype(true, false); \
+ require(sizeof(elt_width ## _t) * 8 <= P.VU.ELEN); \
const reg_t baseAddr = RS1; \
const reg_t vd = insn.rd(); \
const reg_t len = insn.v_nf() + 1; \