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| author | Yueh-Ting (eop) Chen <eop.chen@sifive.com> | 2022-01-26 06:05:20 +0800 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2022-01-25 14:05:20 -0800 |
| commit | 4557eef7005d648953ec00210c84cc234e1dd1eb (patch) | |
| tree | d3791f942fad19ed40a608a1096ac5de64b7cf7d /riscv/decode.h | |
| parent | eb53d231f52fa4c63a83ecb169bb768bd1fcdd9e (diff) | |
| download | spike-4557eef7005d648953ec00210c84cc234e1dd1eb.zip spike-4557eef7005d648953ec00210c84cc234e1dd1eb.tar.gz spike-4557eef7005d648953ec00210c84cc234e1dd1eb.tar.bz2 | |
Add more assertion for fcvt (#910)
Diffstat (limited to 'riscv/decode.h')
| -rw-r--r-- | riscv/decode.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/riscv/decode.h b/riscv/decode.h index 8b372c2..c2912e4 100644 --- a/riscv/decode.h +++ b/riscv/decode.h @@ -2392,6 +2392,7 @@ reg_t index[P.VU.vlmax]; \ #define VI_VFP_CVT_INT_TO_FP(BODY16, BODY32, BODY64, sign) \ VI_CHECK_SSS(false); \ + VI_VFP_COMMON \ switch(P.VU.vsew) { \ case e16: \ { VI_VFP_CVT_LOOP(CVT_INT_TO_FP_PARAMS(16, 16, sign), \ @@ -2415,6 +2416,7 @@ reg_t index[P.VU.vlmax]; \ #define VI_VFP_CVT_FP_TO_INT(BODY16, BODY32, BODY64, sign) \ VI_CHECK_SSS(false); \ + VI_VFP_COMMON \ switch(P.VU.vsew) { \ case e16: \ { VI_VFP_CVT_LOOP(CVT_FP_TO_INT_PARAMS(16, 16, sign), \ |