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author | Yueh-Ting (eop) Chen <yueh.ting.chen@gmail.com> | 2021-12-13 09:59:16 +0800 |
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committer | GitHub <noreply@github.com> | 2021-12-12 17:59:16 -0800 |
commit | 0f30988e4d0e8daac893834b91979f7700bab481 (patch) | |
tree | 5346f634f6cba94f4dd330954420f908637c46a1 /riscv/decode.h | |
parent | 7953ae66035f7e8385cc5b861ec88f063818a605 (diff) | |
download | spike-0f30988e4d0e8daac893834b91979f7700bab481.zip spike-0f30988e4d0e8daac893834b91979f7700bab481.tar.gz spike-0f30988e4d0e8daac893834b91979f7700bab481.tar.bz2 |
Fix minor type-o (#885)
Diffstat (limited to 'riscv/decode.h')
-rw-r--r-- | riscv/decode.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/riscv/decode.h b/riscv/decode.h index 1d6ea9a..90025f3 100644 --- a/riscv/decode.h +++ b/riscv/decode.h @@ -1075,7 +1075,7 @@ static inline bool is_aligned(const unsigned val, const unsigned pos) REDUCTION_LOOP(e64, BODY) \ } -// reduction loop - unsgied +// reduction loop - unsigned #define VI_ULOOP_REDUCTION_BASE(x) \ require(x >= e8 && x <= e64); \ reg_t vl = P.VU.vl->read(); \ @@ -1107,7 +1107,7 @@ static inline bool is_aligned(const unsigned val, const unsigned pos) } -// genearl VXI signed/unsgied loop +// genearl VXI signed/unsigned loop #define VI_VV_ULOOP(BODY) \ VI_CHECK_SSS(true) \ VI_LOOP_BASE \ |