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| author | Tim Newsome <tim@sifive.com> | 2018-12-03 16:24:02 -0800 |
|---|---|---|
| committer | Andrew Waterman <aswaterman@gmail.com> | 2018-12-03 16:24:02 -0800 |
| commit | ba04fcfd1cd928c0ac6fd2c09157f56ea38a65b3 (patch) | |
| tree | 077c5d94e16913a47d151d8693f77831177afc4c /riscv/debug_module.cc | |
| parent | 65c8ac48af16235097084b413c10c7bff576b331 (diff) | |
| download | spike-ba04fcfd1cd928c0ac6fd2c09157f56ea38a65b3.zip spike-ba04fcfd1cd928c0ac6fd2c09157f56ea38a65b3.tar.gz spike-ba04fcfd1cd928c0ac6fd2c09157f56ea38a65b3.tar.bz2 | |
Correct address autoincrement calls. (#263)
Now we do what the spec says we should do. This ended up not having any
effect on the current way OpenOCD performs system bus accesses.
Diffstat (limited to 'riscv/debug_module.cc')
| -rw-r--r-- | riscv/debug_module.cc | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/riscv/debug_module.cc b/riscv/debug_module.cc index 96de3c8..1972542 100644 --- a/riscv/debug_module.cc +++ b/riscv/debug_module.cc @@ -459,10 +459,12 @@ bool debug_module_t::dmi_read(unsigned address, uint32_t *value) case DMI_SBDATA0: result = sbdata[0]; if (sbcs.error == 0) { - sb_autoincrement(); if (sbcs.readondata) { sb_read(); } + if (sbcs.error == 0) { + sb_autoincrement(); + } } break; case DMI_SBDATA1: @@ -737,6 +739,7 @@ bool debug_module_t::dmi_write(unsigned address, uint32_t value) sbaddress[0] = value; if (sbcs.error == 0 && sbcs.readonaddr) { sb_read(); + sb_autoincrement(); } return true; case DMI_SBADDRESS1: @@ -752,7 +755,7 @@ bool debug_module_t::dmi_write(unsigned address, uint32_t value) sbdata[0] = value; if (sbcs.error == 0) { sb_write(); - if (sbcs.autoincrement && sbcs.error == 0) { + if (sbcs.error == 0) { sb_autoincrement(); } } |