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| author | Tim Newsome <tim@sifive.com> | 2018-03-16 14:52:09 -0700 |
|---|---|---|
| committer | Tim Newsome <tim@sifive.com> | 2018-03-16 14:52:35 -0700 |
| commit | 90bafe660b323250338fd564bb9ab4316576d59b (patch) | |
| tree | aa46de0e7ef641e1518253394073505d41ec0bac /riscv/debug_module.cc | |
| parent | 403438d6096f4a6bf0ff924f60940acf51c529a5 (diff) | |
| download | spike-90bafe660b323250338fd564bb9ab4316576d59b.zip spike-90bafe660b323250338fd564bb9ab4316576d59b.tar.gz spike-90bafe660b323250338fd564bb9ab4316576d59b.tar.bz2 | |
Implement debug havereset bits
Diffstat (limited to 'riscv/debug_module.cc')
| -rw-r--r-- | riscv/debug_module.cc | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/riscv/debug_module.cc b/riscv/debug_module.cc index 74c3023..6f9359b 100644 --- a/riscv/debug_module.cc +++ b/riscv/debug_module.cc @@ -35,6 +35,7 @@ debug_module_t::debug_module_t(sim_t *sim, unsigned progbufsize, unsigned max_bu memset(halted, 0, sizeof(halted)); memset(debug_rom_flags, 0, sizeof(debug_rom_flags)); memset(resumeack, 0, sizeof(resumeack)); + memset(havereset, 0, sizeof(havereset)); memset(program_buffer, 0, program_buffer_bytes); program_buffer[4*progbufsize] = ebreak(); program_buffer[4*progbufsize+1] = ebreak() >> 8; @@ -387,6 +388,10 @@ bool debug_module_t::dmi_read(unsigned address, uint32_t *value) result = set_field(result, DMI_DMSTATUS_IMPEBREAK, dmstatus.impebreak); + result = set_field(result, DMI_DMSTATUS_ALLHAVERESET, + havereset[dmcontrol.hartsel]); + result = set_field(result, DMI_DMSTATUS_ANYHAVERESET, + havereset[dmcontrol.hartsel]); result = set_field(result, DMI_DMSTATUS_ALLNONEXISTENT, dmstatus.allnonexistant); result = set_field(result, DMI_DMSTATUS_ALLUNAVAIL, dmstatus.allunavail); result = set_field(result, DMI_DMSTATUS_ALLRUNNING, dmstatus.allrunning); @@ -664,6 +669,9 @@ bool debug_module_t::dmi_write(unsigned address, uint32_t value) dmcontrol.ndmreset = get_field(value, DMI_DMCONTROL_NDMRESET); dmcontrol.hartsel = get_field(value, ((1L<<hartsellen)-1) << DMI_DMCONTROL_HARTSEL_OFFSET); + if (get_field(value, DMI_DMCONTROL_ACKHAVERESET)) { + havereset[dmcontrol.hartsel] = false; + } } processor_t *proc = current_proc(); if (proc) { @@ -755,3 +763,9 @@ bool debug_module_t::dmi_write(unsigned address, uint32_t value) } return false; } + +void debug_module_t::proc_reset(unsigned id) +{ + havereset[id] = true; + halted[id] = false; +} |