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authorTim Newsome <tim@sifive.com>2022-01-06 14:43:37 -0800
committerGitHub <noreply@github.com>2022-01-06 14:43:37 -0800
commit39fc8c3921e8c9ffd9996a7d59df239b2488a206 (patch)
treeb088d981e104732b9f00782022fdeeac8e12fe11 /riscv/debug_module.cc
parent336a5813fd3f72d5081344466bcbd3275227dae7 (diff)
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Don't say "master" (#898)
Requested by "LfX Security - Non Inclusive Language Alerts"
Diffstat (limited to 'riscv/debug_module.cc')
-rw-r--r--riscv/debug_module.cc28
1 files changed, 14 insertions, 14 deletions
diff --git a/riscv/debug_module.cc b/riscv/debug_module.cc
index 0a0bf1f..ef25b4d 100644
--- a/riscv/debug_module.cc
+++ b/riscv/debug_module.cc
@@ -101,17 +101,17 @@ void debug_module_t::reset()
abstractauto = {0};
sbcs = {0};
- if (config.max_bus_master_bits > 0) {
+ if (config.max_sba_data_width > 0) {
sbcs.version = 1;
sbcs.asize = sizeof(reg_t) * 8;
}
- if (config.max_bus_master_bits >= 64)
+ if (config.max_sba_data_width >= 64)
sbcs.access64 = true;
- if (config.max_bus_master_bits >= 32)
+ if (config.max_sba_data_width >= 32)
sbcs.access32 = true;
- if (config.max_bus_master_bits >= 16)
+ if (config.max_sba_data_width >= 16)
sbcs.access16 = true;
- if (config.max_bus_master_bits >= 8)
+ if (config.max_sba_data_width >= 8)
sbcs.access8 = true;
challenge = random();
@@ -295,7 +295,7 @@ unsigned debug_module_t::sb_access_bits()
void debug_module_t::sb_autoincrement()
{
- if (!sbcs.autoincrement || !config.max_bus_master_bits)
+ if (!sbcs.autoincrement || !config.max_sba_data_width)
return;
uint64_t value = sbaddress[0] + sb_access_bits() / 8;
@@ -317,13 +317,13 @@ void debug_module_t::sb_read()
{
reg_t address = ((uint64_t) sbaddress[1] << 32) | sbaddress[0];
try {
- if (sbcs.sbaccess == 0 && config.max_bus_master_bits >= 8) {
+ if (sbcs.sbaccess == 0 && config.max_sba_data_width >= 8) {
sbdata[0] = sim->debug_mmu->load_uint8(address);
- } else if (sbcs.sbaccess == 1 && config.max_bus_master_bits >= 16) {
+ } else if (sbcs.sbaccess == 1 && config.max_sba_data_width >= 16) {
sbdata[0] = sim->debug_mmu->load_uint16(address);
- } else if (sbcs.sbaccess == 2 && config.max_bus_master_bits >= 32) {
+ } else if (sbcs.sbaccess == 2 && config.max_sba_data_width >= 32) {
sbdata[0] = sim->debug_mmu->load_uint32(address);
- } else if (sbcs.sbaccess == 3 && config.max_bus_master_bits >= 64) {
+ } else if (sbcs.sbaccess == 3 && config.max_sba_data_width >= 64) {
uint64_t value = sim->debug_mmu->load_uint64(address);
sbdata[0] = value;
sbdata[1] = value >> 32;
@@ -339,13 +339,13 @@ void debug_module_t::sb_write()
{
reg_t address = ((uint64_t) sbaddress[1] << 32) | sbaddress[0];
D(fprintf(stderr, "sb_write() 0x%x @ 0x%lx\n", sbdata[0], address));
- if (sbcs.sbaccess == 0 && config.max_bus_master_bits >= 8) {
+ if (sbcs.sbaccess == 0 && config.max_sba_data_width >= 8) {
sim->debug_mmu->store_uint8(address, sbdata[0]);
- } else if (sbcs.sbaccess == 1 && config.max_bus_master_bits >= 16) {
+ } else if (sbcs.sbaccess == 1 && config.max_sba_data_width >= 16) {
sim->debug_mmu->store_uint16(address, sbdata[0]);
- } else if (sbcs.sbaccess == 2 && config.max_bus_master_bits >= 32) {
+ } else if (sbcs.sbaccess == 2 && config.max_sba_data_width >= 32) {
sim->debug_mmu->store_uint32(address, sbdata[0]);
- } else if (sbcs.sbaccess == 3 && config.max_bus_master_bits >= 64) {
+ } else if (sbcs.sbaccess == 3 && config.max_sba_data_width >= 64) {
sim->debug_mmu->store_uint64(address,
(((uint64_t) sbdata[1]) << 32) | sbdata[0]);
} else {