diff options
| author | Andrew Waterman <andrew@sifive.com> | 2022-09-22 17:34:33 -0700 |
|---|---|---|
| committer | Andrew Waterman <andrew@sifive.com> | 2022-10-04 15:40:01 -0700 |
| commit | ce69fb5db97ecf240336b7826dd9dddeb32e5dca (patch) | |
| tree | f78647d0eafa9abc414f5ded2a3663c7506cfd9c /riscv/csrs.h | |
| parent | a51e44ed228e48fc1dbf24ec7dc23cbd61a7874a (diff) | |
| download | spike-ce69fb5db97ecf240336b7826dd9dddeb32e5dca.zip spike-ce69fb5db97ecf240336b7826dd9dddeb32e5dca.tar.gz spike-ce69fb5db97ecf240336b7826dd9dddeb32e5dca.tar.bz2 | |
Suppress most unused variable warnings
Diffstat (limited to 'riscv/csrs.h')
| -rw-r--r-- | riscv/csrs.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/riscv/csrs.h b/riscv/csrs.h index 1cc2d74..70fa2f4 100644 --- a/riscv/csrs.h +++ b/riscv/csrs.h @@ -521,7 +521,7 @@ class time_counter_csr_t: public csr_t { void sync(const reg_t val) noexcept; protected: - virtual bool unlogged_write(const reg_t val) noexcept override { return false; }; + virtual bool unlogged_write(const reg_t UNUSED val) noexcept override { return false; }; private: reg_t shadow_val; }; |