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| author | Greg Chadwick <gac@lowrisc.org> | 2022-08-11 21:09:57 +0100 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2022-08-11 13:09:57 -0700 |
| commit | ac117cc35aa2bc5296f7a7bfd817a539e269919f (patch) | |
| tree | 722b561653796cf339d1b64c6a303543d0bac576 /riscv/csrs.h | |
| parent | f04675c96c5c4668848431f4c729363060ce13e7 (diff) | |
| download | spike-ac117cc35aa2bc5296f7a7bfd817a539e269919f.zip spike-ac117cc35aa2bc5296f7a7bfd817a539e269919f.tar.gz spike-ac117cc35aa2bc5296f7a7bfd817a539e269919f.tar.bz2 | |
Unify PMPCFGx behaviour with PMPADDRx where PMP is disabled (#1068)
Previously any access to the PMPADDRx CSRs when no PMP regions were
configured would result in an illegal instruction trap, whilst
PMPCFGx registers would act as WARL, ignoring writes and reading as 0.
This unifies the behaviour so both PMPADDRx and PMPCFGx CSRs produce an
illegal instruction trap when accessed when no PMP regions are
configured.
Diffstat (limited to 'riscv/csrs.h')
| -rw-r--r-- | riscv/csrs.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/riscv/csrs.h b/riscv/csrs.h index 85a4d50..cabd61e 100644 --- a/riscv/csrs.h +++ b/riscv/csrs.h @@ -124,6 +124,7 @@ typedef std::shared_ptr<pmpaddr_csr_t> pmpaddr_csr_t_p; class pmpcfg_csr_t: public csr_t { public: pmpcfg_csr_t(processor_t* const proc, const reg_t addr); + virtual void verify_permissions(insn_t insn, bool write) const override; virtual reg_t read() const noexcept override; protected: virtual bool unlogged_write(const reg_t val) noexcept override; |