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author | Andrew Waterman <andrew@sifive.com> | 2022-07-18 15:10:53 -0700 |
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committer | GitHub <noreply@github.com> | 2022-07-18 15:10:53 -0700 |
commit | 84b9d03c088af3a92505c82ff3160d984387248c (patch) | |
tree | c9df154cb7ec58a7d15a62776cbbf0bf522170eb /riscv/csrs.h | |
parent | 3742db886a8ae7b03c5e7e0ececf997a2fc16cfd (diff) | |
parent | c0b3fdcbaba99576393c57607985a0009bb2ebb1 (diff) | |
download | spike-84b9d03c088af3a92505c82ff3160d984387248c.zip spike-84b9d03c088af3a92505c82ff3160d984387248c.tar.gz spike-84b9d03c088af3a92505c82ff3160d984387248c.tar.bz2 |
Merge pull request #1041 from plctlab/plct-new-csrs
add support for m/henvcfgh and mconfigptr CSRs
Diffstat (limited to 'riscv/csrs.h')
-rw-r--r-- | riscv/csrs.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/riscv/csrs.h b/riscv/csrs.h index 0df38bc..2ca1d99 100644 --- a/riscv/csrs.h +++ b/riscv/csrs.h @@ -247,6 +247,7 @@ class mstatus_csr_t final: public base_status_csr_t { protected: virtual bool unlogged_write(const reg_t val) noexcept override; private: + reg_t compute_mstatus_initial_value() const noexcept; reg_t val; }; |