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author | Scott Johnson <scott.johnson@arilinc.com> | 2021-03-24 18:00:03 -0700 |
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committer | Andrew Waterman <aswaterman@gmail.com> | 2021-09-08 07:59:02 -0700 |
commit | cb75703a7fc8e4bd610234a642e36bbde479987d (patch) | |
tree | bc99a36f0147809ea257137fb8ee4790dc9d201b /riscv/csrs.h | |
parent | 7e44eb629aa3b5af7b4515dbce7e9bfc8dbaff4f (diff) | |
download | spike-cb75703a7fc8e4bd610234a642e36bbde479987d.zip spike-cb75703a7fc8e4bd610234a642e36bbde479987d.tar.gz spike-cb75703a7fc8e4bd610234a642e36bbde479987d.tar.bz2 |
Move backdoor write method to mip-specialized class
Since that's the only one that needs it.
Diffstat (limited to 'riscv/csrs.h')
-rw-r--r-- | riscv/csrs.h | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/riscv/csrs.h b/riscv/csrs.h index 8b9e5cc..405d0f3 100644 --- a/riscv/csrs.h +++ b/riscv/csrs.h @@ -268,19 +268,21 @@ class mip_or_mie_csr_t: public logged_csr_t { void write_with_mask(const reg_t mask, const reg_t val) noexcept; - // Does not log. Used by external things (clint) that wiggle bits in mip. - void backdoor_write_with_mask(const reg_t mask, const reg_t val) noexcept; protected: virtual bool unlogged_write(const reg_t val) noexcept override final; + reg_t val; private: virtual reg_t write_mask() const noexcept = 0; - reg_t val; }; +// mip is special because some of the bits are driven by hardware pins class mip_csr_t: public mip_or_mie_csr_t { public: mip_csr_t(processor_t* const proc, const reg_t addr); + + // Does not log. Used by external things (clint) that wiggle bits in mip. + void backdoor_write_with_mask(const reg_t mask, const reg_t val) noexcept; private: virtual reg_t write_mask() const noexcept override; }; |