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author | Scott Johnson <scott.johnson@arilinc.com> | 2021-03-08 14:32:02 -0800 |
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committer | Andrew Waterman <aswaterman@gmail.com> | 2021-09-08 07:59:02 -0700 |
commit | 5c1d635c6e569c03933e96b57053c2a2e988bcb0 (patch) | |
tree | 92d929c6101e58784cb4cf2b8a27ff9dff084264 /riscv/csrs.h | |
parent | 82bf328e92c9d348617a8466abed4a2c0e94280b (diff) | |
download | spike-5c1d635c6e569c03933e96b57053c2a2e988bcb0.zip spike-5c1d635c6e569c03933e96b57053c2a2e988bcb0.tar.gz spike-5c1d635c6e569c03933e96b57053c2a2e988bcb0.tar.bz2 |
Convert sie/hie/vsie to csr_t family
Diffstat (limited to 'riscv/csrs.h')
-rw-r--r-- | riscv/csrs.h | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/riscv/csrs.h b/riscv/csrs.h index 4c52568..98e1eff 100644 --- a/riscv/csrs.h +++ b/riscv/csrs.h @@ -304,15 +304,19 @@ class generic_int_accessor_t { generic_int_accessor_t(state_t* const state, const reg_t read_mask, const reg_t ip_write_mask, + const reg_t ie_write_mask, const bool mask_mideleg, const bool mask_hideleg, const int shiftamt); reg_t ip_read() const noexcept; void ip_write(const reg_t val) noexcept; + reg_t ie_read() const noexcept; + void ie_write(const reg_t val) noexcept; private: state_t* const state; const reg_t read_mask; const reg_t ip_write_mask; + const reg_t ie_write_mask; const bool mask_mideleg; const bool mask_hideleg; const int shiftamt; @@ -332,5 +336,15 @@ class mip_proxy_csr_t: public csr_t { generic_int_accessor_t_p accr; }; +// For all CSRs that are simply (masked & shifted) views into mie +class mie_proxy_csr_t: public csr_t { + public: + mie_proxy_csr_t(processor_t* const proc, const reg_t addr, generic_int_accessor_t_p accr); + virtual reg_t read() const noexcept override; + virtual void write(const reg_t val) noexcept override; + private: + generic_int_accessor_t_p accr; +}; + #endif |