diff options
| author | Jerry Zhao <jerryz123@berkeley.edu> | 2022-12-19 11:59:54 -0800 |
|---|---|---|
| committer | Jerry Zhao <jerryz123@berkeley.edu> | 2022-12-20 10:09:08 -0800 |
| commit | 1b06630727d9271c12d96b7aea435a005f9d1aa7 (patch) | |
| tree | 83ff19bc17a60d5f1e96502eb7997c9f3856dc79 /riscv/clint.cc | |
| parent | 203bc302b08b992c6fe80a92b85c82203f23808a (diff) | |
| download | spike-1b06630727d9271c12d96b7aea435a005f9d1aa7.zip spike-1b06630727d9271c12d96b7aea435a005f9d1aa7.tar.gz spike-1b06630727d9271c12d96b7aea435a005f9d1aa7.tar.bz2 | |
Allow reads/writes to reserved CLINT regions
Previously, all loads/stores to reserved regions caused access faults.
Now, loads to reserved regions return 0, while writes are dropped.
This more closely matches actual hardware implementations
Diffstat (limited to 'riscv/clint.cc')
| -rw-r--r-- | riscv/clint.cc | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/riscv/clint.cc b/riscv/clint.cc index 3f2d4d7..3d41668 100644 --- a/riscv/clint.cc +++ b/riscv/clint.cc @@ -39,6 +39,8 @@ bool clint_t::load(reg_t addr, size_t len, uint8_t* bytes) memcpy(bytes, (uint8_t*)&mtimecmp[0] + addr - MTIMECMP_BASE, len); } else if (addr >= MTIME_BASE && addr + len <= MTIME_BASE + sizeof(mtime_t)) { memcpy(bytes, (uint8_t*)&mtime + addr - MTIME_BASE, len); + } else if (addr + len <= CLINT_SIZE) { + memset(bytes, 0, len); } else { return false; } @@ -62,6 +64,8 @@ bool clint_t::store(reg_t addr, size_t len, const uint8_t* bytes) memcpy((uint8_t*)&mtimecmp[0] + addr - MTIMECMP_BASE, bytes, len); } else if (addr >= MTIME_BASE && addr + len <= MTIME_BASE + sizeof(mtime_t)) { memcpy((uint8_t*)&mtime + addr - MTIME_BASE, bytes, len); + } else if (addr + len <= CLINT_SIZE) { + // Do nothing } else { return false; } |