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author | Chih-Min Chao <chihmin.chao@sifive.com> | 2019-06-07 01:31:12 -0700 |
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committer | Chih-Min Chao <chihmin.chao@sifive.com> | 2019-06-07 01:32:33 -0700 |
commit | 17bfc2e5df578baa1758403ffd35a701de3267bd (patch) | |
tree | b55586eb9e6ba5a7ddf1fadeaab34b92d793fcbe /riscv/arith.h | |
parent | 1b51865f7e6f4a3d076b75fef659efdb06962a3c (diff) | |
download | spike-17bfc2e5df578baa1758403ffd35a701de3267bd.zip spike-17bfc2e5df578baa1758403ffd35a701de3267bd.tar.gz spike-17bfc2e5df578baa1758403ffd35a701de3267bd.tar.bz2 |
rvv: merge mulhu.h and arith.h
Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com>
Diffstat (limited to 'riscv/arith.h')
-rw-r--r-- | riscv/arith.h | 40 |
1 files changed, 38 insertions, 2 deletions
diff --git a/riscv/arith.h b/riscv/arith.h index d909a11..b4370cb 100644 --- a/riscv/arith.h +++ b/riscv/arith.h @@ -2,8 +2,44 @@ #ifndef _RISCV_ARITH_H #define _RISCV_ARITH_H -#include <limits.h> -#include <stdint.h> + +#include <cstdint> +#include <climits> + +inline uint64_t mulhu(uint64_t a, uint64_t b) +{ + uint64_t t; + uint32_t y1, y2, y3; + uint64_t a0 = (uint32_t)a, a1 = a >> 32; + uint64_t b0 = (uint32_t)b, b1 = b >> 32; + + t = a1*b0 + ((a0*b0) >> 32); + y1 = t; + y2 = t >> 32; + + t = a0*b1 + y1; + y1 = t; + + t = a1*b1 + y2 + (t >> 32); + y2 = t; + y3 = t >> 32; + + return ((uint64_t)y3 << 32) | y2; +} + +inline int64_t mulh(int64_t a, int64_t b) +{ + int negate = (a < 0) != (b < 0); + uint64_t res = mulhu(a < 0 ? -a : a, b < 0 ? -b : b); + return negate ? ~res + (a * b == 0) : res; +} + +inline int64_t mulhsu(int64_t a, uint64_t b) +{ + int negate = a < 0; + uint64_t res = mulhu(a < 0 ? -a : a, b); + return negate ? ~res + (a * b == 0) : res; +} //ref: https://locklessinc.com/articles/sat_arithmetic/ template<typename T, typename UT> |