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| author | Andrew Waterman <andrew@sifive.com> | 2019-11-12 18:37:07 -0800 |
|---|---|---|
| committer | Andrew Waterman <andrew@sifive.com> | 2019-11-12 18:37:07 -0800 |
| commit | 9a8ee5efdc97a44d3509abd616297edaf7e3800e (patch) | |
| tree | d46a33f70db3bc58833ed2277b32ffa3fb817410 /riscv-riscv.pc.in | |
| parent | 9b06f14085396b99c2a7e33cac8be8ee54948a52 (diff) | |
| download | spike-9a8ee5efdc97a44d3509abd616297edaf7e3800e.zip spike-9a8ee5efdc97a44d3509abd616297edaf7e3800e.tar.gz spike-9a8ee5efdc97a44d3509abd616297edaf7e3800e.tar.bz2 | |
Remove S-mode interrupts when S-mode not present
Diffstat (limited to 'riscv-riscv.pc.in')
0 files changed, 0 insertions, 0 deletions