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author | Weiwei Li <liweiwei@iscas.ac.cn> | 2022-07-17 09:46:09 +0800 |
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committer | Weiwei Li <liweiwei@iscas.ac.cn> | 2022-07-17 09:54:34 +0800 |
commit | f82e54124345f348abaa80ec82d67528a9a8f774 (patch) | |
tree | b43df7994d97aee4e98094bee808182b21256404 /fesvr | |
parent | 61a2c0ee6306562e084b25e4734d6ae725c475b4 (diff) | |
download | spike-f82e54124345f348abaa80ec82d67528a9a8f774.zip spike-f82e54124345f348abaa80ec82d67528a9a8f774.tar.gz spike-f82e54124345f348abaa80ec82d67528a9a8f774.tar.bz2 |
remove unnecessary ifdef for RISCV_ENABLE_DUAL_ENDIAN
the default target endian is always little endian:
- mmu::is_target_big_endian() return false
- sim_t::get_target_endianness() return memif_endianness_little
when RISCV_ENABLE_DUAL_ENDIAN macro is undefined
Diffstat (limited to 'fesvr')
-rw-r--r-- | fesvr/htif.h | 8 |
1 files changed, 0 insertions, 8 deletions
diff --git a/fesvr/htif.h b/fesvr/htif.h index 3cee25f..ca5b362 100644 --- a/fesvr/htif.h +++ b/fesvr/htif.h @@ -31,26 +31,18 @@ class htif_t : public chunked_memif_t template<typename T> inline T from_target(target_endian<T> n) const { -#ifdef RISCV_ENABLE_DUAL_ENDIAN memif_endianness_t endianness = get_target_endianness(); assert(endianness == memif_endianness_little || endianness == memif_endianness_big); return endianness == memif_endianness_big? n.from_be() : n.from_le(); -#else - return n.from_le(); -#endif } template<typename T> inline target_endian<T> to_target(T n) const { -#ifdef RISCV_ENABLE_DUAL_ENDIAN memif_endianness_t endianness = get_target_endianness(); assert(endianness == memif_endianness_little || endianness == memif_endianness_big); return endianness == memif_endianness_big? target_endian<T>::to_be(n) : target_endian<T>::to_le(n); -#else - return target_endian<T>::to_le(n); -#endif } protected: |