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| author | Andrew Waterman <andrew@sifive.com> | 2022-05-12 16:14:00 -0700 |
|---|---|---|
| committer | Andrew Waterman <andrew@sifive.com> | 2022-05-12 16:15:07 -0700 |
| commit | 500d987d8750ff7e048c3e2fc0898863beb051cc (patch) | |
| tree | 97a8814438b7b83f065abc568f26c4b7794189ac /disasm | |
| parent | 2bf4c8c3dfe9ef7a454b33f70a4611c9118ce405 (diff) | |
| download | spike-500d987d8750ff7e048c3e2fc0898863beb051cc.zip spike-500d987d8750ff7e048c3e2fc0898863beb051cc.tar.gz spike-500d987d8750ff7e048c3e2fc0898863beb051cc.tar.bz2 | |
Add missing Zicbom and Zicbop extensions to disassembler fallback
Diffstat (limited to 'disasm')
| -rw-r--r-- | disasm/disasm.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/disasm/disasm.cc b/disasm/disasm.cc index 2fbc1fb..b627636 100644 --- a/disasm/disasm.cc +++ b/disasm/disasm.cc @@ -2101,7 +2101,7 @@ disassembler_t::disassembler_t(const isa_parser_t *isa) // next-highest priority: other instructions in same base ISA std::string fallback_isa_string = std::string("rv") + std::to_string(isa->get_max_xlen()) + - "gqchv_zfh_zba_zbb_zbc_zbs_zkn_zkr_zks_svinval_xbitmanip"; + "gqchv_zfh_zba_zbb_zbc_zbs_zicbom_zicboz_zkn_zkr_zks_svinval_xbitmanip"; isa_parser_t fallback_isa(fallback_isa_string.c_str(), DEFAULT_PRIV); add_instructions(&fallback_isa); |