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| author | Andrew Waterman <andrew@sifive.com> | 2022-05-13 13:57:55 -0700 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2022-05-13 13:57:55 -0700 |
| commit | ff645fb4eb9cd8a957dd8826369de8dd7e1fb8a3 (patch) | |
| tree | 644cd4ca4050e7878c17133eadb23f0d3933039c /disasm/disasm.cc | |
| parent | 918cba10e103a4cb1405b7a481111b78c2274f28 (diff) | |
| download | spike-ff645fb4eb9cd8a957dd8826369de8dd7e1fb8a3.zip spike-ff645fb4eb9cd8a957dd8826369de8dd7e1fb8a3.tar.gz spike-ff645fb4eb9cd8a957dd8826369de8dd7e1fb8a3.tar.bz2 | |
Disassemble Zicbop/Zihintpause HINT instructions (#1000)
We do not condition them on Zicbop/Zihintpause because,
definitionally, all implementations provide them.
Diffstat (limited to 'disasm/disasm.cc')
| -rw-r--r-- | disasm/disasm.cc | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/disasm/disasm.cc b/disasm/disasm.cc index b627636..c8e92d6 100644 --- a/disasm/disasm.cc +++ b/disasm/disasm.cc @@ -670,6 +670,7 @@ void disassembler_t::add_instructions(const isa_parser_t* isa) #define DEFINE_I0TYPE(name, code) DISASM_INSN(name, code, mask_rs1, {&xrd, &imm}) #define DEFINE_I1TYPE(name, code) DISASM_INSN(name, code, mask_imm, {&xrd, &xrs1}) #define DEFINE_I2TYPE(name, code) DISASM_INSN(name, code, mask_rd | mask_imm, {&xrs1}) + #define DEFINE_PREFETCH(code) DISASM_INSN(#code, code, 0, {&store_address}) #define DEFINE_LTYPE(code) DISASM_INSN(#code, code, 0, {&xrd, &bigimm}) #define DEFINE_BTYPE(code) add_btype_insn(this, #code, match_##code, mask_##code); #define DEFINE_B1TYPE(name, code) add_b1type_insn(this, name, match_##code, mask_##code); @@ -691,6 +692,14 @@ void disassembler_t::add_instructions(const isa_parser_t* isa) add_insn(new disasm_insn_t("unimp", match_csrrw|(CSR_CYCLE<<20), 0xffffffff, {})); add_insn(new disasm_insn_t("c.unimp", 0, 0xffff, {})); + // Following are HINTs, so they must precede their corresponding base-ISA + // instructions. We do not condition them on Zicbop/Zihintpause because, + // definitionally, all implementations provide them. + DEFINE_PREFETCH(prefetch_r); + DEFINE_PREFETCH(prefetch_w); + DEFINE_PREFETCH(prefetch_i); + DEFINE_NOARG(pause); + DEFINE_XLOAD(lb) DEFINE_XLOAD(lbu) DEFINE_XLOAD(lh) |