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| author | Andrew Waterman <andrew@sifive.com> | 2022-10-10 09:31:31 -0700 |
|---|---|---|
| committer | Andrew Waterman <andrew@sifive.com> | 2022-10-10 09:31:31 -0700 |
| commit | 8ff186bd0f8446ac6d129fef6836d192f2ce21b1 (patch) | |
| tree | 209f072d869d58bd5f1d54756d32d7a355370124 /disasm/disasm.cc | |
| parent | d7edd7ac550dab81b84f2001793e04b663330658 (diff) | |
| download | spike-8ff186bd0f8446ac6d129fef6836d192f2ce21b1.zip spike-8ff186bd0f8446ac6d129fef6836d192f2ce21b1.tar.gz spike-8ff186bd0f8446ac6d129fef6836d192f2ce21b1.tar.bz2 | |
Fix disassembly of RV64 srai.u
The shift amount is 6 bits wide on RV64. As with the base ISA shifts, we
ignore XLEN and unconditionally disassemble the 6-bit immediate on RV32.
Partially reverts da93bdc435b985fd354e01c26470f64c33cecaa6
Diffstat (limited to 'disasm/disasm.cc')
| -rw-r--r-- | disasm/disasm.cc | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/disasm/disasm.cc b/disasm/disasm.cc index a8ba91e..856a651 100644 --- a/disasm/disasm.cc +++ b/disasm/disasm.cc @@ -572,6 +572,11 @@ static void NOINLINE add_pitype5_insn(disassembler_t* d, const char* name, uint3 d->add_insn(new disasm_insn_t(name, match, mask, {&xrd, &xrs1, &p_imm5})); } +static void NOINLINE add_pitype6_insn(disassembler_t* d, const char* name, uint32_t match, uint32_t mask) +{ + d->add_insn(new disasm_insn_t(name, match, mask, {&xrd, &xrs1, &p_imm6})); +} + static void NOINLINE add_vector_v_insn(disassembler_t* d, const char* name, uint32_t match, uint32_t mask) { d->add_insn(new disasm_insn_t(name, match, mask, {&vd, &vs2, opt, &vm})); @@ -1683,6 +1688,7 @@ void disassembler_t::add_instructions(const isa_parser_t* isa) #define DEFINE_PI3TYPE(code) add_pitype3_insn(this, #code, match_##code, mask_##code); #define DEFINE_PI4TYPE(code) add_pitype4_insn(this, #code, match_##code, mask_##code); #define DEFINE_PI5TYPE(code) add_pitype5_insn(this, #code, match_##code, mask_##code); +#define DEFINE_PI6TYPE(code) add_pitype6_insn(this, #code, match_##code, mask_##code); #define DISASM_8_AND_16_RINSN(code) \ DEFINE_RTYPE(code##8); \ @@ -1921,7 +1927,7 @@ void disassembler_t::add_instructions(const isa_parser_t* isa) DEFINE_RTYPE(msubr32); DEFINE_RTYPE(ave); DEFINE_RTYPE(sra_u); - DEFINE_PI5TYPE(srai_u); + DEFINE_PI6TYPE(srai_u); DEFINE_PI3TYPE(insb); DEFINE_RTYPE(maddr32) |