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authorTim Newsome <tim@sifive.com>2016-04-24 08:54:19 -0700
committerTim Newsome <tim@sifive.com>2016-05-23 12:12:11 -0700
commitd999dfc0d41a119730ff8944d37dbee88bf99723 (patch)
tree2268c9d7d5f122fb81253d10bd05901eaff0ff62 /debug_rom/Makefile
parent191671a2015136c429394fd3051e4a9c1ff45352 (diff)
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Add debug_module bus device.
This should replace the ROM hack I implemented earlier, but for now both exist together. Back to the point where gdb connects, core jumps to ROM->RAM->ROM.
Diffstat (limited to 'debug_rom/Makefile')
-rw-r--r--debug_rom/Makefile2
1 files changed, 1 insertions, 1 deletions
diff --git a/debug_rom/Makefile b/debug_rom/Makefile
index d66b84f..9d286c9 100644
--- a/debug_rom/Makefile
+++ b/debug_rom/Makefile
@@ -5,7 +5,7 @@ CC = $(RISCV)/bin/riscv64-unknown-elf-gcc
OBJCOPY = $(RISCV)/bin/riscv64-unknown-elf-objcopy
%.o: %.S
- $(CC) -c $<
+ $(CC) -I.. -c $<
debug_rom.h: debug_rom.raw
xxd -i $^ | sed "s/^unsigned/static const unsigned/" > $@