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author | Andrew Waterman <andrew@sifive.com> | 2023-01-12 08:08:36 -0800 |
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committer | GitHub <noreply@github.com> | 2023-01-12 08:08:36 -0800 |
commit | 35e229ccfa08d4858f286f1354c8f6abc0f25812 (patch) | |
tree | 124dc4a6bdf9d306beaf8b29962c2798cd91b6a5 | |
parent | 469d9c6907d6df44afce48c422626194c9cd1e3c (diff) | |
parent | 6b44190063477a68f8e27728c7240c9b790760bd (diff) | |
download | spike-35e229ccfa08d4858f286f1354c8f6abc0f25812.zip spike-35e229ccfa08d4858f286f1354c8f6abc0f25812.tar.gz spike-35e229ccfa08d4858f286f1354c8f6abc0f25812.tar.bz2 |
Merge pull request #1225 from riscv-software-src/no-threads
Run Spike and HTIF in a single thread, rather than two
-rw-r--r-- | riscv/sim.cc | 39 | ||||
-rw-r--r-- | riscv/sim.h | 6 |
2 files changed, 14 insertions, 31 deletions
diff --git a/riscv/sim.cc b/riscv/sim.cc index 1de3906..74b3523 100644 --- a/riscv/sim.cc +++ b/riscv/sim.cc @@ -220,33 +220,15 @@ sim_t::~sim_t() delete debug_mmu; } -void sim_thread_main(void* arg) -{ - ((sim_t*)arg)->main(); -} - -void sim_t::main() +int sim_t::run() { if (!debug && log) set_procs_debug(true); - while (!done()) - { - if (debug || ctrlc_pressed) - interactive(); - else - step(INTERLEAVE); - if (remote_bitbang) { - remote_bitbang->tick(); - } - } -} - -int sim_t::run() -{ - host = context_t::current(); - target.init(sim_thread_main, this); htif_t::set_expected_xlen(isa.get_max_xlen()); + + // htif_t::run() will repeatedly call back into sim_t::idle(), each + // invocation of which will advance target time return htif_t::run(); } @@ -267,8 +249,6 @@ void sim_t::step(size_t n) if (clint) clint->increment(INTERLEAVE / INSNS_PER_RTC_TICK); if (ns16550) ns16550->tick(); } - - host->switch_to(); } } } @@ -427,7 +407,16 @@ void sim_t::reset() void sim_t::idle() { - target.switch_to(); + if (done()) + return; + + if (debug || ctrlc_pressed) + interactive(); + else + step(INTERLEAVE); + + if (remote_bitbang) + remote_bitbang->tick(); } void sim_t::read_chunk(addr_t taddr, size_t len, void* dst) diff --git a/riscv/sim.h b/riscv/sim.h index 21b1616..350d82f 100644 --- a/riscv/sim.h +++ b/riscv/sim.h @@ -11,7 +11,6 @@ #include "simif.h" #include <fesvr/htif.h> -#include <fesvr/context.h> #include <vector> #include <string> #include <memory> @@ -137,11 +136,6 @@ private: friend class debug_module_t; // htif - friend void sim_thread_main(void*); - void main(); - - context_t* host; - context_t target; void reset(); void idle(); void read_chunk(addr_t taddr, size_t len, void* dst); |