diff options
author | dave-estes-syzexion <53795406+dave-estes-syzexion@users.noreply.github.com> | 2019-09-18 16:24:55 -0400 |
---|---|---|
committer | Andrew Waterman <andrew@sifive.com> | 2019-09-18 13:24:55 -0700 |
commit | a515af6d3bb5146a0a68cf88adf032fe78ba4ead (patch) | |
tree | 81ba3fb8de07e39b07f08d9bc81a98e86ff950f7 | |
parent | c171379c7828ae94d969846874a7ac542dbda2c3 (diff) | |
download | spike-a515af6d3bb5146a0a68cf88adf032fe78ba4ead.zip spike-a515af6d3bb5146a0a68cf88adf032fe78ba4ead.tar.gz spike-a515af6d3bb5146a0a68cf88adf032fe78ba4ead.tar.bz2 |
Extends the commit log feature with memory writes. (#324)
* Extends the commit log feature with memory writes.
This provides a little more information for debugging instruction
traces, allowing you to maintain the state of memory as the trace
is processed.
The following sample trace output illustrates the formatting of
the new memory writes. The first line is an instruction at
location 0x80000094, containing the bytes (0x80830313) and
commiting the value 0x80000898 to the register x6. The second
line is an instruction which neither commits a register nor
writes memory. The third line writes the value 0x0 to
0x80000890.
3 0x80000094 (0x80830313) x 6 0x80000898
3 0x80000098 (0x0062d663)
3 0x8000009c (0x00028023) mem 0x80000890 0x0
* Changes addressing feedback from review.
-rw-r--r-- | riscv/execute.cc | 19 | ||||
-rw-r--r-- | riscv/mmu.h | 16 | ||||
-rw-r--r-- | riscv/processor.h | 8 |
3 files changed, 37 insertions, 6 deletions
diff --git a/riscv/execute.cc b/riscv/execute.cc index 9183f68..a623eb6 100644 --- a/riscv/execute.cc +++ b/riscv/execute.cc @@ -18,6 +18,9 @@ static void commit_log_stash_privilege(processor_t* p) static void commit_log_print_value(int width, uint64_t hi, uint64_t lo) { switch (width) { + case 8: + fprintf(stderr, "0x%01" PRIx8, (uint8_t)lo); + break; case 16: fprintf(stderr, "0x%04" PRIx16, (uint16_t)lo); break; @@ -39,6 +42,7 @@ static void commit_log_print_insn(state_t* state, reg_t pc, insn_t insn) { #ifdef RISCV_ENABLE_COMMITLOG auto& reg = state->log_reg_write; + auto& mem = state->log_mem_write; int priv = state->last_inst_priv; int xlen = state->last_inst_xlen; int flen = state->last_inst_flen; @@ -47,18 +51,23 @@ static void commit_log_print_insn(state_t* state, reg_t pc, insn_t insn) commit_log_print_value(xlen, 0, pc); fprintf(stderr, " ("); commit_log_print_value(insn.length() * 8, 0, insn.bits()); - + fprintf(stderr, ")"); if (reg.addr) { bool fp = reg.addr & 1; int rd = reg.addr >> 1; int size = fp ? flen : xlen; - fprintf(stderr, ") %c%2d ", fp ? 'f' : 'x', rd); + fprintf(stderr, " %c%2d ", fp ? 'f' : 'x', rd); commit_log_print_value(size, reg.data.v[1], reg.data.v[0]); - fprintf(stderr, "\n"); - } else { - fprintf(stderr, ")\n"); } + if (mem.size) { + fprintf(stderr, " mem "); + commit_log_print_value(xlen, 0, mem.addr); + fprintf(stderr, " "); + commit_log_print_value(mem.size << 3, 0, mem.value); + } + fprintf(stderr, "\n"); reg.addr = 0; + mem.size = 0; #endif } diff --git a/riscv/mmu.h b/riscv/mmu.h index 5fa93ff..9826cf1 100644 --- a/riscv/mmu.h +++ b/riscv/mmu.h @@ -112,6 +112,16 @@ public: load_func(int32) load_func(int64) +#ifndef RISCV_ENABLE_COMMITLOG +# define WRITE_MEM(addr, value, size) ({}) +#else +# define WRITE_MEM(addr, val, size) ({ \ + proc->state.log_mem_write.addr = addr; \ + proc->state.log_mem_write.value = val; \ + proc->state.log_mem_write.size = size; \ + }) +#endif + // template for functions that store an aligned value to memory #define store_func(type) \ void store_##type(reg_t addr, type##_t val) { \ @@ -130,7 +140,11 @@ public: } \ else \ store_slow_path(addr, sizeof(type##_t), (const uint8_t*)&val); \ - } + if (proc) { \ + size_t size = sizeof(type##_t); \ + WRITE_MEM(addr, val, size); \ + } \ + } // template for functions that perform an atomic memory operation #define amo_func(type) \ diff --git a/riscv/processor.h b/riscv/processor.h index 26b83a1..e1c8c9d 100644 --- a/riscv/processor.h +++ b/riscv/processor.h @@ -34,6 +34,13 @@ struct commit_log_reg_t freg_t data; }; +struct commit_log_mem_t +{ + reg_t addr; + uint64_t value; + uint8_t size; // bytes: 1, 2, 4, or 8 +}; + typedef struct { uint8_t prv; @@ -259,6 +266,7 @@ struct state_t #ifdef RISCV_ENABLE_COMMITLOG commit_log_reg_t log_reg_write; + commit_log_mem_t log_mem_write; reg_t last_inst_priv; int last_inst_xlen; int last_inst_flen; |