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| author | Andrew Waterman <andrew@sifive.com> | 2019-08-23 16:32:13 -0700 |
|---|---|---|
| committer | Andrew Waterman <andrew@sifive.com> | 2019-08-23 16:32:13 -0700 |
| commit | 8e3939d88b60319cf5b4fe9564a5bb9ff86066f6 (patch) | |
| tree | 573b9689da2941371e5ca1c038ffae215d8f8319 | |
| parent | 88a852836acb4c7166b1aa4102e11354bfd99234 (diff) | |
| download | spike-8e3939d88b60319cf5b4fe9564a5bb9ff86066f6.zip spike-8e3939d88b60319cf5b4fe9564a5bb9ff86066f6.tar.gz spike-8e3939d88b60319cf5b4fe9564a5bb9ff86066f6.tar.bz2 | |
Remove statement with no effect
| -rw-r--r-- | riscv/processor.cc | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/riscv/processor.cc b/riscv/processor.cc index b7ef360..da75803 100644 --- a/riscv/processor.cc +++ b/riscv/processor.cc @@ -501,7 +501,6 @@ void processor_t::set_csr(int which, reg_t val) state.mstatus = set_field(state.mstatus, MSTATUS64_SD, dirty); state.mstatus = set_field(state.mstatus, MSTATUS_UXL, xlen_to_uxl(max_xlen)); - state.mstatus = set_field(state.mstatus, MSTATUS_UXL, xlen_to_uxl(max_xlen)); state.mstatus = set_field(state.mstatus, MSTATUS_SXL, xlen_to_uxl(max_xlen)); // U-XLEN == S-XLEN == M-XLEN xlen = max_xlen; |