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author | naufal <ahmednofal@aucegypt.edu> | 2018-11-09 17:28:49 +0200 |
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committer | Andrew Waterman <aswaterman@gmail.com> | 2018-11-09 11:17:36 -0800 |
commit | 9a05a50012f5f4ab53c9646e75dc888cf4c9d832 (patch) | |
tree | 8d4a4ddc974e09eeb42514121baba8b9165c3e05 | |
parent | 4b89f26441b509159c94e5df581967f2e2ad8d6c (diff) | |
download | spike-9a05a50012f5f4ab53c9646e75dc888cf4c9d832.zip spike-9a05a50012f5f4ab53c9646e75dc888cf4c9d832.tar.gz spike-9a05a50012f5f4ab53c9646e75dc888cf4c9d832.tar.bz2 |
commands render correctly in README.md now, included in code block
-rw-r--r-- | README.md | 3 |
1 files changed, 2 insertions, 1 deletions
@@ -48,10 +48,11 @@ Adding an instruction to the simulator requires two steps: 2. Add the opcode and opcode mask to riscv/opcodes.h. Alternatively, add it to the riscv-opcodes package, and it will do so for you: - + ``` $ cd ../riscv-opcodes $ vi opcodes // add a line for the new instruction $ make install + ``` 3. Rebuild the simulator. |