vmfirst/vmpopc have been renamed to vfirst/vpopc

5 files changed, 47 insertions, 36 deletions

diff --git a/riscv/encoding.h b/riscv/encoding.h
index 406d023..1101f2c 100644
--- a/riscv/encoding.h
+++ b/riscv/encoding.h
@@ -424,9 +424,9 @@
 #define MASK_CSRRSI  0x707f
 #define MATCH_CSRRCI 0x7073
 #define MASK_CSRRCI  0x707f
-#define MATCH_HFENCE_BVMA 0x22000073
-#define MASK_HFENCE_BVMA  0xfe007fff
-#define MATCH_HFENCE_GVMA 0xa2000073
+#define MATCH_HFENCE_VVMA 0x22000073
+#define MASK_HFENCE_VVMA  0xfe007fff
+#define MATCH_HFENCE_GVMA 0x62000073
 #define MASK_HFENCE_GVMA  0xfe007fff
 #define MATCH_FADD_S 0x53
 #define MASK_FADD_S  0xfe00007f
@@ -630,6 +630,12 @@
 #define MASK_C_JALR  0xf07f
 #define MATCH_C_EBREAK 0x9002
 #define MASK_C_EBREAK  0xffff
+#define MATCH_C_SRLI_RV32 0x8001
+#define MASK_C_SRLI_RV32  0xfc03
+#define MATCH_C_SRAI_RV32 0x8401
+#define MASK_C_SRAI_RV32  0xfc03
+#define MATCH_C_SLLI_RV32 0x2
+#define MASK_C_SLLI_RV32  0xf003
 #define MATCH_C_LD 0x6000
 #define MASK_C_LD  0xe003
 #define MATCH_C_SD 0xe000
@@ -1300,10 +1306,6 @@
 #define MASK_VREDMAX_VS  0xfc00707f
 #define MATCH_VEXT_X_V 0x32002057
 #define MASK_VEXT_X_V  0xfe00707f
-#define MATCH_VMPOPC_M 0x50002057
-#define MASK_VMPOPC_M  0xfc00707f
-#define MATCH_VMFIRST_M 0x54002057
-#define MASK_VMFIRST_M  0xfc00707f
 #define MATCH_VCOMPRESS_VM 0x5c002057
 #define MASK_VCOMPRESS_VM  0xfc00707f
 #define MATCH_VMANDNOT_MM 0x60002057
@@ -1332,6 +1334,10 @@
 #define MASK_VIOTA_M  0xfc0ff07f
 #define MATCH_VID_V 0x5808a057
 #define MASK_VID_V  0xfdfff07f
+#define MATCH_VPOPC_M 0x580c2057
+#define MASK_VPOPC_M  0xfc0ff07f
+#define MATCH_VFIRST_M 0x580ca057
+#define MASK_VFIRST_M  0xfc0ff07f
 #define MATCH_VDIVU_VV 0x80002057
 #define MASK_VDIVU_VV  0xfc00707f
 #define MATCH_VDIV_VV 0x84002057
@@ -1556,19 +1562,20 @@
 #define CSR_STVAL 0x143
 #define CSR_SIP 0x144
 #define CSR_SATP 0x180
-#define CSR_BSSTATUS 0x200
-#define CSR_BSIE 0x204
-#define CSR_BSTVEC 0x205
-#define CSR_BSSCRATCH 0x240
-#define CSR_BSEPC 0x241
-#define CSR_BSCAUSE 0x242
-#define CSR_BSTVAL 0x243
-#define CSR_BSIP 0x244
-#define CSR_BSATP 0x280
-#define CSR_HSTATUS 0xa00
-#define CSR_HEDELEG 0xa02
-#define CSR_HIDELEG 0xa03
-#define CSR_HGATP 0xa80
+#define CSR_VSSTATUS 0x200
+#define CSR_VSIE 0x204
+#define CSR_VSTVEC 0x205
+#define CSR_VSSCRATCH 0x240
+#define CSR_VSEPC 0x241
+#define CSR_VSCAUSE 0x242
+#define CSR_VSTVAL 0x243
+#define CSR_VSIP 0x244
+#define CSR_VSATP 0x280
+#define CSR_HSTATUS 0x600
+#define CSR_HEDELEG 0x602
+#define CSR_HIDELEG 0x603
+#define CSR_HCOUNTEREN 0x606
+#define CSR_HGATP 0x680
 #define CSR_UTVT 0x7
 #define CSR_UNXTI 0x45
 #define CSR_UINTSTATUS 0x46
@@ -1867,7 +1874,7 @@ DECLARE_INSN(csrrc, MATCH_CSRRC, MASK_CSRRC)
 DECLARE_INSN(csrrwi, MATCH_CSRRWI, MASK_CSRRWI)
 DECLARE_INSN(csrrsi, MATCH_CSRRSI, MASK_CSRRSI)
 DECLARE_INSN(csrrci, MATCH_CSRRCI, MASK_CSRRCI)
-DECLARE_INSN(hfence_bvma, MATCH_HFENCE_BVMA, MASK_HFENCE_BVMA)
+DECLARE_INSN(hfence_vvma, MATCH_HFENCE_VVMA, MASK_HFENCE_VVMA)
 DECLARE_INSN(hfence_gvma, MATCH_HFENCE_GVMA, MASK_HFENCE_GVMA)
 DECLARE_INSN(fadd_s, MATCH_FADD_S, MASK_FADD_S)
 DECLARE_INSN(fsub_s, MATCH_FSUB_S, MASK_FSUB_S)
@@ -1970,6 +1977,9 @@ DECLARE_INSN(c_addi16sp, MATCH_C_ADDI16SP, MASK_C_ADDI16SP)
 DECLARE_INSN(c_jr, MATCH_C_JR, MASK_C_JR)
 DECLARE_INSN(c_jalr, MATCH_C_JALR, MASK_C_JALR)
 DECLARE_INSN(c_ebreak, MATCH_C_EBREAK, MASK_C_EBREAK)
+DECLARE_INSN(c_srli_rv32, MATCH_C_SRLI_RV32, MASK_C_SRLI_RV32)
+DECLARE_INSN(c_srai_rv32, MATCH_C_SRAI_RV32, MASK_C_SRAI_RV32)
+DECLARE_INSN(c_slli_rv32, MATCH_C_SLLI_RV32, MASK_C_SLLI_RV32)
 DECLARE_INSN(c_ld, MATCH_C_LD, MASK_C_LD)
 DECLARE_INSN(c_sd, MATCH_C_SD, MASK_C_SD)
 DECLARE_INSN(c_addiw, MATCH_C_ADDIW, MASK_C_ADDIW)
@@ -2305,8 +2315,6 @@ DECLARE_INSN(vredmin_vs, MATCH_VREDMIN_VS, MASK_VREDMIN_VS)
 DECLARE_INSN(vredmaxu_vs, MATCH_VREDMAXU_VS, MASK_VREDMAXU_VS)
 DECLARE_INSN(vredmax_vs, MATCH_VREDMAX_VS, MASK_VREDMAX_VS)
 DECLARE_INSN(vext_x_v, MATCH_VEXT_X_V, MASK_VEXT_X_V)
-DECLARE_INSN(vmpopc_m, MATCH_VMPOPC_M, MASK_VMPOPC_M)
-DECLARE_INSN(vmfirst_m, MATCH_VMFIRST_M, MASK_VMFIRST_M)
 DECLARE_INSN(vcompress_vm, MATCH_VCOMPRESS_VM, MASK_VCOMPRESS_VM)
 DECLARE_INSN(vmandnot_mm, MATCH_VMANDNOT_MM, MASK_VMANDNOT_MM)
 DECLARE_INSN(vmand_mm, MATCH_VMAND_MM, MASK_VMAND_MM)
@@ -2321,6 +2329,8 @@ DECLARE_INSN(vmsof_m, MATCH_VMSOF_M, MASK_VMSOF_M)
 DECLARE_INSN(vmsif_m, MATCH_VMSIF_M, MASK_VMSIF_M)
 DECLARE_INSN(viota_m, MATCH_VIOTA_M, MASK_VIOTA_M)
 DECLARE_INSN(vid_v, MATCH_VID_V, MASK_VID_V)
+DECLARE_INSN(vpopc_m, MATCH_VPOPC_M, MASK_VPOPC_M)
+DECLARE_INSN(vfirst_m, MATCH_VFIRST_M, MASK_VFIRST_M)
 DECLARE_INSN(vdivu_vv, MATCH_VDIVU_VV, MASK_VDIVU_VV)
 DECLARE_INSN(vdiv_vv, MATCH_VDIV_VV, MASK_VDIV_VV)
 DECLARE_INSN(vremu_vv, MATCH_VREMU_VV, MASK_VREMU_VV)
@@ -2464,18 +2474,19 @@ DECLARE_CSR(scause, CSR_SCAUSE)
 DECLARE_CSR(stval, CSR_STVAL)
 DECLARE_CSR(sip, CSR_SIP)
 DECLARE_CSR(satp, CSR_SATP)
-DECLARE_CSR(bsstatus, CSR_BSSTATUS)
-DECLARE_CSR(bsie, CSR_BSIE)
-DECLARE_CSR(bstvec, CSR_BSTVEC)
-DECLARE_CSR(bsscratch, CSR_BSSCRATCH)
-DECLARE_CSR(bsepc, CSR_BSEPC)
-DECLARE_CSR(bscause, CSR_BSCAUSE)
-DECLARE_CSR(bstval, CSR_BSTVAL)
-DECLARE_CSR(bsip, CSR_BSIP)
-DECLARE_CSR(bsatp, CSR_BSATP)
+DECLARE_CSR(vsstatus, CSR_VSSTATUS)
+DECLARE_CSR(vsie, CSR_VSIE)
+DECLARE_CSR(vstvec, CSR_VSTVEC)
+DECLARE_CSR(vsscratch, CSR_VSSCRATCH)
+DECLARE_CSR(vsepc, CSR_VSEPC)
+DECLARE_CSR(vscause, CSR_VSCAUSE)
+DECLARE_CSR(vstval, CSR_VSTVAL)
+DECLARE_CSR(vsip, CSR_VSIP)
+DECLARE_CSR(vsatp, CSR_VSATP)
 DECLARE_CSR(hstatus, CSR_HSTATUS)
 DECLARE_CSR(hedeleg, CSR_HEDELEG)
 DECLARE_CSR(hideleg, CSR_HIDELEG)
+DECLARE_CSR(hcounteren, CSR_HCOUNTEREN)
 DECLARE_CSR(hgatp, CSR_HGATP)
 DECLARE_CSR(utvt, CSR_UTVT)
 DECLARE_CSR(unxti, CSR_UNXTI)
diff --git a/riscv/insns/vmfirst_m.h b/riscv/insns/vfirst_m.h
index fa000ec..fa000ec 100644
--- a/riscv/insns/vmfirst_m.h
+++ b/riscv/insns/vfirst_m.h
diff --git a/riscv/insns/vmpopc_m.h b/riscv/insns/vpopc_m.h
index fed4209..fed4209 100644
--- a/riscv/insns/vmpopc_m.h
+++ b/riscv/insns/vpopc_m.h
diff --git a/riscv/riscv.mk.in b/riscv/riscv.mk.in
index aa5512c..e672eda 100644
--- a/riscv/riscv.mk.in
+++ b/riscv/riscv.mk.in
@@ -331,7 +331,7 @@ riscv_insn_ext_v_alu_int = \
 	vmerge_vim \
 	vmerge_vvm \
 	vmerge_vxm \
-	vmfirst_m \
+	vfirst_m \
 	vmin_vv \
 	vmin_vx \
 	vminu_vv \
@@ -340,7 +340,7 @@ riscv_insn_ext_v_alu_int = \
 	vmnor_mm \
 	vmor_mm \
 	vmornot_mm \
-	vmpopc_m \
+	vpopc_m \
 	vmsbc_vvm \
 	vmsbc_vxm \
 	vmsbf_m \
diff --git a/spike_main/disasm.cc b/spike_main/disasm.cc
index 0c625d4..ce42750 100644
--- a/spike_main/disasm.cc
+++ b/spike_main/disasm.cc
@@ -941,9 +941,9 @@ disassembler_t::disassembler_t(int xlen)
   DISASM_OPIV__X__INSN(vslide1down,1);
 
   //0b01_0000
-  DISASM_INSN("vmpopc.m", vmpopc_m, 0, {&xrd, &vs2, &opt, &vm});
+  DISASM_INSN("vpopc.m", vpopc_m, 0, {&xrd, &vs2, &opt, &vm});
   //vmuary0
-  DISASM_INSN("vmfirst.m", vmfirst_m, 0, {&xrd, &vs2, &opt, &vm});
+  DISASM_INSN("vfirst.m", vfirst_m, 0, {&xrd, &vs2, &opt, &vm});
   DISASM_INSN("vmsbf.m", vmsbf_m, 0, {&vd, &vs2, &opt, &vm});
   DISASM_INSN("vmsof.m", vmsof_m, 0, {&vd, &vs2, &opt, &vm});
   DISASM_INSN("vmsif.m", vmsif_m, 0, {&vd, &vs2, &opt, &vm});