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| author | Andrew Waterman <andrew@sifive.com> | 2019-07-19 00:38:04 -0700 |
|---|---|---|
| committer | Andrew Waterman <andrew@sifive.com> | 2019-07-19 00:41:36 -0700 |
| commit | f9745fb771cbae0b6508f2df172406a8cce54b15 (patch) | |
| tree | 2dc1dd17a630e2bc3a443411166986b9598bd09e | |
| parent | 7d1c8d0ac37da99b32b2b46ad55bfbb8a82daed1 (diff) | |
| download | spike-f9745fb771cbae0b6508f2df172406a8cce54b15.zip spike-f9745fb771cbae0b6508f2df172406a8cce54b15.tar.gz spike-f9745fb771cbae0b6508f2df172406a8cce54b15.tar.bz2 | |
Avoid relying on sizeof long
| -rw-r--r-- | riscv/insns/vfmv_f_s.h | 2 | ||||
| -rw-r--r-- | riscv/insns/vsmul_vv.h | 4 | ||||
| -rw-r--r-- | riscv/insns/vsmul_vx.h | 4 |
3 files changed, 5 insertions, 5 deletions
diff --git a/riscv/insns/vfmv_f_s.h b/riscv/insns/vfmv_f_s.h index b956e6f..4f2a4c0 100644 --- a/riscv/insns/vfmv_f_s.h +++ b/riscv/insns/vfmv_f_s.h @@ -23,7 +23,7 @@ default: // nan_extened if (FLEN > sew) { - vs2_0 = vs2_0 | ~((1ul << sew) - 1); + vs2_0 = vs2_0 | ~((uint64_t(1) << sew) - 1); } if (FLEN == 64) { diff --git a/riscv/insns/vsmul_vv.h b/riscv/insns/vsmul_vv.h index 70d22ae..a0c7f99 100644 --- a/riscv/insns/vsmul_vv.h +++ b/riscv/insns/vsmul_vv.h @@ -1,8 +1,8 @@ // vsmul: Signed saturating and rounding fractional multiply VRM xrm = P.VU.get_vround_mode(); -uint64_t int_max = (1ul << (P.VU.vsew - 1)) - 1; +uint64_t int_max = (uint64_t(1) << (P.VU.vsew - 1)) - 1; uint64_t int_min = - (1 << (P.VU.vsew - 1)); -uint64_t sign_mask = ((1ul << (P.VU.vsew - 1))); +uint64_t sign_mask = uint64_t(1) << (P.VU.vsew - 1); VI_VV_ULOOP ({ diff --git a/riscv/insns/vsmul_vx.h b/riscv/insns/vsmul_vx.h index ef3751b..c7909c7 100644 --- a/riscv/insns/vsmul_vx.h +++ b/riscv/insns/vsmul_vx.h @@ -1,8 +1,8 @@ // vsmul VRM xrm = P.VU.get_vround_mode(); -uint128_t int_max = (1ul << (P.VU.vsew - 1)) - 1; +uint128_t int_max = (uint64_t(1) << (P.VU.vsew - 1)) - 1; uint128_t int_min = - (1 << (P.VU.vsew - 1)); -uint128_t sign_mask = ((1ul << (P.VU.vsew - 1))); +uint128_t sign_mask = uint64_t(1) << (P.VU.vsew - 1); VI_VX_ULOOP ({ |