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| author | Greg Chadwick <mail@gregchadwick.co.uk> | 2021-08-10 00:01:26 +0100 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2021-08-09 16:01:26 -0700 |
| commit | dbe45fd4e54bfce90b684f11602f9fd8bbcc0bf0 (patch) | |
| tree | 978e3236e8b9f5d273a9b50bb7ef717e07320f92 | |
| parent | 761629f197600246226b905f97e0ae62a82ff6af (diff) | |
| download | spike-dbe45fd4e54bfce90b684f11602f9fd8bbcc0bf0.zip spike-dbe45fd4e54bfce90b684f11602f9fd8bbcc0bf0.tar.gz spike-dbe45fd4e54bfce90b684f11602f9fd8bbcc0bf0.tar.bz2 | |
Fix priority of external vs non-standard interrupts (#767)
Off by one error meant an external interrupt was prioritised over the
non-standard interrupts (going against what the comment stated was the
intended behaviour).
| -rw-r--r-- | riscv/processor.cc | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/riscv/processor.cc b/riscv/processor.cc index b0efe4c..23cd274 100644 --- a/riscv/processor.cc +++ b/riscv/processor.cc @@ -592,8 +592,8 @@ void processor_t::take_interrupt(reg_t pending_interrupts) if (!state.debug_mode && enabled_interrupts) { // nonstandard interrupts have highest priority - if (enabled_interrupts >> IRQ_M_EXT) - enabled_interrupts = enabled_interrupts >> IRQ_M_EXT << IRQ_M_EXT; + if (enabled_interrupts >> (IRQ_M_EXT + 1)) + enabled_interrupts = enabled_interrupts >> (IRQ_M_EXT + 1) << (IRQ_M_EXT + 1); // standard interrupt priority is MEI, MSI, MTI, SEI, SSI, STI else if (enabled_interrupts & MIP_MEIP) enabled_interrupts = MIP_MEIP; |