aboutsummaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorsthiruva <sthiruva@gmail.com>2020-09-30 00:39:24 +0530
committerGitHub <noreply@github.com>2020-09-29 12:09:24 -0700
commit4baf970f1b151400152c43559e601625dc03bd67 (patch)
tree159fc751c4bc0044a399343ad43d31e6cad23b52
parente7cdd757248358235f3231cecf6aafdf23201d4e (diff)
downloadspike-4baf970f1b151400152c43559e601625dc03bd67.zip
spike-4baf970f1b151400152c43559e601625dc03bd67.tar.gz
spike-4baf970f1b151400152c43559e601625dc03bd67.tar.bz2
Adding symbol lookup when --enable-commitlog is enabled (#558)
* Adding symbol lookup when --enable-commitlog is enabled * Removed the #ifdef RISCV_ENABLE_COMMITLOG for all get_symbol related function Only retained the in processor.cc where it is called. Co-authored-by: Shajid Thiruvathodi <sthiruva@valtrix.in>
-rw-r--r--fesvr/htif.cc19
-rw-r--r--fesvr/htif.h5
-rw-r--r--riscv/execute.cc5
-rw-r--r--riscv/processor.cc9
-rw-r--r--riscv/processor.h2
-rw-r--r--riscv/sim.cc5
-rw-r--r--riscv/sim.h2
-rw-r--r--riscv/simif.h3
8 files changed, 50 insertions, 0 deletions
diff --git a/fesvr/htif.cc b/fesvr/htif.cc
index 62dfaa5..f828494 100644
--- a/fesvr/htif.cc
+++ b/fesvr/htif.cc
@@ -142,6 +142,25 @@ void htif_t::load_program()
reg_t dummy_entry;
load_payload(payload, &dummy_entry);
}
+
+ for (auto i : symbols)
+ {
+ auto it = addr2symbol.find(i.second);
+ if ( it == addr2symbol.end())
+ addr2symbol[i.second] = i.first;
+ }
+
+ return;
+}
+
+const char* htif_t::get_symbol(uint64_t addr)
+{
+ auto it = addr2symbol.find(addr);
+
+ if(it == addr2symbol.end())
+ return nullptr;
+
+ return it->second.c_str();
}
void htif_t::stop()
diff --git a/fesvr/htif.h b/fesvr/htif.h
index d69bd42..5b16a60 100644
--- a/fesvr/htif.h
+++ b/fesvr/htif.h
@@ -49,6 +49,9 @@ class htif_t : public chunked_memif_t
// range to memory, because it has already been loaded through a sideband
virtual bool is_address_preloaded(addr_t taddr, size_t len) { return false; }
+ // Given an address, return symbol from addr2symbol map
+ const char* get_symbol(uint64_t addr);
+
private:
void parse_arguments(int argc, char ** argv);
void register_devices();
@@ -75,6 +78,8 @@ class htif_t : public chunked_memif_t
const std::vector<std::string>& target_args() { return targs; }
+ std::map<uint64_t, std::string> addr2symbol;
+
friend class memif_t;
friend class syscall_t;
};
diff --git a/riscv/execute.cc b/riscv/execute.cc
index 84e9c5f..7313c51 100644
--- a/riscv/execute.cc
+++ b/riscv/execute.cc
@@ -59,6 +59,11 @@ static void commit_log_print_value(FILE *log_file, int width, uint64_t val)
commit_log_print_value(log_file, width, &val);
}
+const char* processor_t::get_symbol(uint64_t addr)
+{
+ return sim->get_symbol(addr);
+}
+
static void commit_log_print_insn(processor_t *p, reg_t pc, insn_t insn)
{
FILE *log_file = p->get_log_file();
diff --git a/riscv/processor.cc b/riscv/processor.cc
index f427986..84be372 100644
--- a/riscv/processor.cc
+++ b/riscv/processor.cc
@@ -743,6 +743,15 @@ void processor_t::disasm(insn_t insn)
{
uint64_t bits = insn.bits() & ((1ULL << (8 * insn_length(insn.bits()))) - 1);
if (last_pc != state.pc || last_bits != bits) {
+
+#ifdef RISCV_ENABLE_COMMITLOG
+ const char* sym = get_symbol(state.pc);
+ if (sym != nullptr)
+ {
+ fprintf(log_file, "core %3d: >>>> %s\n", id, sym);
+ }
+#endif
+
if (executions != 1) {
fprintf(log_file, "core %3d: Executed %" PRIx64 " times\n", id, executions);
}
diff --git a/riscv/processor.h b/riscv/processor.h
index 169b43f..87df69f 100644
--- a/riscv/processor.h
+++ b/riscv/processor.h
@@ -409,6 +409,8 @@ public:
void set_pmp_num(reg_t pmp_num);
void set_pmp_granularity(reg_t pmp_granularity);
+ const char* get_symbol(uint64_t addr);
+
private:
simif_t* sim;
mmu_t* mmu; // main memory is always accessed via the mmu
diff --git a/riscv/sim.cc b/riscv/sim.cc
index 2aced1b..76bb3cd 100644
--- a/riscv/sim.cc
+++ b/riscv/sim.cc
@@ -294,6 +294,11 @@ char* sim_t::addr_to_mem(reg_t addr) {
return NULL;
}
+const char* sim_t::get_symbol(uint64_t addr)
+{
+ return htif_t::get_symbol(addr);
+}
+
// htif
void sim_t::reset()
diff --git a/riscv/sim.h b/riscv/sim.h
index c6e5582..c7e3de4 100644
--- a/riscv/sim.h
+++ b/riscv/sim.h
@@ -94,6 +94,8 @@ private:
void make_dtb();
void set_rom();
+ const char* get_symbol(uint64_t addr);
+
// presents a prompt for introspection into the simulation
void interactive();
diff --git a/riscv/simif.h b/riscv/simif.h
index 1d982b3..0e75d45 100644
--- a/riscv/simif.h
+++ b/riscv/simif.h
@@ -16,6 +16,9 @@ public:
virtual bool mmio_store(reg_t addr, size_t len, const uint8_t* bytes) = 0;
// Callback for processors to let the simulation know they were reset.
virtual void proc_reset(unsigned id) = 0;
+
+ virtual const char* get_symbol(uint64_t addr) = 0;
+
};
#endif