Merge pull request #1219 from riscv-software-src/ntriggers

Add --triggers=n to control the number of supported triggers

7 files changed, 26 insertions, 14 deletions

diff --git a/ci-tests/testlib.c b/ci-tests/testlib.c
index d06277f..f20e749 100644
--- a/ci-tests/testlib.c
+++ b/ci-tests/testlib.c
@@ -27,7 +27,8 @@ int main()
             16,
             mem_cfg,
             hartids,
-            false);
+            false,
+            4);
   std::vector<std::pair<reg_t, abstract_device_t*>> plugin_devices;
   std::vector<std::string> htif_args {"pk", "hello"};
   debug_module_config_t dm_config = {
diff --git a/riscv/cfg.h b/riscv/cfg.h
index 1fb358f..a40bbf5 100644
--- a/riscv/cfg.h
+++ b/riscv/cfg.h
@@ -71,7 +71,8 @@ public:
         const reg_t default_pmpregions,
         const std::vector<mem_cfg_t> &default_mem_layout,
         const std::vector<int> default_hartids,
-        bool default_real_time_clint)
+        bool default_real_time_clint,
+        const reg_t default_trigger_count)
     : initrd_bounds(default_initrd_bounds),
       bootargs(default_bootargs),
       isa(default_isa),
@@ -84,7 +85,8 @@ public:
       mem_layout(default_mem_layout),
       hartids(default_hartids),
       explicit_hartids(false),
-      real_time_clint(default_real_time_clint)
+      real_time_clint(default_real_time_clint),
+      trigger_count(default_trigger_count)
   {}
 
   cfg_arg_t<std::pair<reg_t, reg_t>> initrd_bounds;
@@ -101,6 +103,7 @@ public:
   cfg_arg_t<std::vector<int>>        hartids;
   bool                               explicit_hartids;
   cfg_arg_t<bool>                    real_time_clint;
+  reg_t                              trigger_count;
 
   size_t nprocs() const { return hartids().size(); }
 };
diff --git a/riscv/csrs.h b/riscv/csrs.h
index 8734339..31ba11b 100644
--- a/riscv/csrs.h
+++ b/riscv/csrs.h
@@ -637,8 +637,6 @@ class debug_mode_csr_t: public basic_csr_t {
   virtual void verify_permissions(insn_t insn, bool write) const override;
 };
 
-typedef std::shared_ptr<tdata2_csr_t> tdata2_csr_t_p;
-
 class dpc_csr_t: public epc_csr_t {
  public:
   dpc_csr_t(processor_t* const proc, const reg_t addr);
diff --git a/riscv/processor.cc b/riscv/processor.cc
index c3c5d8f..39096e9 100644
--- a/riscv/processor.cc
+++ b/riscv/processor.cc
@@ -35,7 +35,7 @@ processor_t::processor_t(const isa_parser_t *isa, const cfg_t *cfg,
   histogram_enabled(false), log_commits_enabled(false),
   log_file(log_file), sout_(sout_.rdbuf()), halt_on_reset(halt_on_reset),
   in_wfi(false),
-  impl_table(256, false), last_pc(1), executions(1), TM(4)
+  impl_table(256, false), last_pc(1), executions(1), TM(cfg->trigger_count)
 {
   VU.p = this;
   TM.proc = this;
@@ -390,11 +390,17 @@ void state_t::reset(processor_t* const proc, reg_t max_isa)
   csrmap[CSR_DCSR] = dcsr = std::make_shared<dcsr_csr_t>(proc, CSR_DCSR);
 
   csrmap[CSR_TSELECT] = tselect = std::make_shared<tselect_csr_t>(proc, CSR_TSELECT);
-
-  csrmap[CSR_TDATA1] = std::make_shared<tdata1_csr_t>(proc, CSR_TDATA1);
-  csrmap[CSR_TDATA2] = tdata2 = std::make_shared<tdata2_csr_t>(proc, CSR_TDATA2);
-  csrmap[CSR_TDATA3] = std::make_shared<tdata3_csr_t>(proc, CSR_TDATA3);
-  csrmap[CSR_TINFO] = std::make_shared<tinfo_csr_t>(proc, CSR_TINFO);
+  if (proc->get_cfg().trigger_count > 0) {
+    csrmap[CSR_TDATA1] = std::make_shared<tdata1_csr_t>(proc, CSR_TDATA1);
+    csrmap[CSR_TDATA2] = tdata2 = std::make_shared<tdata2_csr_t>(proc, CSR_TDATA2);
+    csrmap[CSR_TDATA3] = std::make_shared<tdata3_csr_t>(proc, CSR_TDATA3);
+    csrmap[CSR_TINFO] = std::make_shared<tinfo_csr_t>(proc, CSR_TINFO);
+  } else {
+    csrmap[CSR_TDATA1] = std::make_shared<const_csr_t>(proc, CSR_TDATA1, 0);
+    csrmap[CSR_TDATA2] = tdata2 = std::make_shared<const_csr_t>(proc, CSR_TDATA2, 0);
+    csrmap[CSR_TDATA3] = std::make_shared<const_csr_t>(proc, CSR_TDATA3, 0);
+    csrmap[CSR_TINFO] = std::make_shared<const_csr_t>(proc, CSR_TINFO, 0);
+  }
   unsigned scontext_length = (xlen == 32 ? 16 : 34); // debug spec suggests 16-bit for RV32 and 34-bit for RV64
   csrmap[CSR_SCONTEXT] = scontext = std::make_shared<masked_csr_t>(proc, CSR_SCONTEXT, (reg_t(1) << scontext_length) - 1, 0);
   unsigned hcontext_length = (xlen == 32 ? 6 : 13) + (proc->extension_enabled('H') ? 1 : 0); // debug spec suggest 7-bit (6-bit) for RV32 and 14-bit (13-bit) for RV64 with (without) H extension
diff --git a/riscv/processor.h b/riscv/processor.h
index 5daa6f4..a8ccac0 100644
--- a/riscv/processor.h
+++ b/riscv/processor.h
@@ -126,7 +126,7 @@ struct state_t
   csr_t_p dpc;
   dcsr_csr_t_p dcsr;
   csr_t_p tselect;
-  tdata2_csr_t_p tdata2;
+  csr_t_p tdata2;
   csr_t_p scontext;
   csr_t_p mcontext;
 
diff --git a/spike_main/spike-log-parser.cc b/spike_main/spike-log-parser.cc
index dfdb117..0020751 100644
--- a/spike_main/spike-log-parser.cc
+++ b/spike_main/spike-log-parser.cc
@@ -39,7 +39,8 @@ int main(int UNUSED argc, char** argv)
             /*default_pmpregions=*/16,
             /*default_mem_layout=*/std::vector<mem_cfg_t>(),
             /*default_hartids=*/std::vector<int>(),
-            /*default_real_time_clint=*/false);
+            /*default_real_time_clint=*/false,
+            /*default_trigger_count=*/4);
 
   isa_parser_t isa(isa_string, DEFAULT_PRIV);
   processor_t p(&isa, &cfg, 0, 0, false, nullptr, cerr);
diff --git a/spike_main/spike.cc b/spike_main/spike.cc
index 8386a49..8669375 100644
--- a/spike_main/spike.cc
+++ b/spike_main/spike.cc
@@ -71,6 +71,7 @@ static void help(int exit_code = 1)
   fprintf(stderr, "  --bootargs=<args>     Provide custom bootargs for kernel [default: console=hvc0 earlycon=sbi]\n");
   fprintf(stderr, "  --real-time-clint     Increment clint time at real-time rate\n");
   fprintf(stderr, "  --mmu-dirty           Enable hardware management of PTE accessed and dirty bits\n");
+  fprintf(stderr, "  --triggers=<n>        Number of supported triggers [default 4]\n");
   fprintf(stderr, "  --dm-progsize=<words> Progsize for the debug module [default 2]\n");
   fprintf(stderr, "  --dm-sba=<bits>       Debug system bus access supports up to "
       "<bits> wide accesses [default 0]\n");
@@ -355,7 +356,8 @@ int main(int argc, char** argv)
             /*default_pmpregions=*/16,
             /*default_mem_layout=*/parse_mem_layout("2048"),
             /*default_hartids=*/std::vector<int>(),
-            /*default_real_time_clint=*/false);
+            /*default_real_time_clint=*/false,
+            /*default_trigger_count=*/4);
 
   auto const device_parser = [&plugin_devices](const char *s) {
     const std::string str(s);
@@ -439,6 +441,7 @@ int main(int argc, char** argv)
   parser.option(0, "bootargs", 1, [&](const char* s){cfg.bootargs = s;});
   parser.option(0, "real-time-clint", 0, [&](const char UNUSED *s){cfg.real_time_clint = true;});
   parser.option(0, "mmu-dirty", 0, [&](const char UNUSED *s){cfg.dirty_enabled = true;});
+  parser.option(0, "triggers", 1, [&](const char *s){cfg.trigger_count = atoul_safe(s);});
   parser.option(0, "extlib", 1, [&](const char *s){
     void *lib = dlopen(s, RTLD_NOW | RTLD_GLOBAL);
     if (lib == NULL) {