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author | Scott Johnson <scott.johnson@arilinc.com> | 2021-09-07 11:52:21 -0700 |
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committer | Andrew Waterman <aswaterman@gmail.com> | 2021-09-08 07:59:02 -0700 |
commit | 83502ad4afd3e3387aed4c45b290d00fd2fbc2ee (patch) | |
tree | 142da7c45028301961e8cfc8cb4a01cfe95aab9a | |
parent | 629b1e6ff3fbfc2a3be25c4686bfac92f78d2bb0 (diff) | |
download | spike-83502ad4afd3e3387aed4c45b290d00fd2fbc2ee.zip spike-83502ad4afd3e3387aed4c45b290d00fd2fbc2ee.tar.gz spike-83502ad4afd3e3387aed4c45b290d00fd2fbc2ee.tar.bz2 |
Remove class logged_csr_t
-rw-r--r-- | riscv/csrs.cc | 27 | ||||
-rw-r--r-- | riscv/csrs.h | 27 |
2 files changed, 21 insertions, 33 deletions
diff --git a/riscv/csrs.cc b/riscv/csrs.cc index 5973296..2e1823a 100644 --- a/riscv/csrs.cc +++ b/riscv/csrs.cc @@ -40,11 +40,6 @@ void csr_t::verify_permissions(insn_t insn, bool write) const { csr_t::~csr_t() { } -// implement class logged_csr_t -logged_csr_t::logged_csr_t(processor_t* const proc, const reg_t addr): - csr_t(proc, addr) { -} - void csr_t::write(const reg_t val) noexcept { const bool success = unlogged_write(val); if (success) { @@ -60,7 +55,7 @@ void csr_t::log_write() const noexcept { // implement class basic_csr_t basic_csr_t::basic_csr_t(processor_t* const proc, const reg_t addr, const reg_t init): - logged_csr_t(proc, addr), + csr_t(proc, addr), val(init) { } @@ -76,7 +71,7 @@ bool basic_csr_t::unlogged_write(const reg_t val) noexcept { // implement class pmpaddr_csr_t pmpaddr_csr_t::pmpaddr_csr_t(processor_t* const proc, const reg_t addr): - logged_csr_t(proc, addr), + csr_t(proc, addr), val(0), cfg(0), pmpidx(address - CSR_PMPADDR0) { @@ -84,7 +79,7 @@ pmpaddr_csr_t::pmpaddr_csr_t(processor_t* const proc, const reg_t addr): void pmpaddr_csr_t::verify_permissions(insn_t insn, bool write) const { - logged_csr_t::verify_permissions(insn, write); + csr_t::verify_permissions(insn, write); // If n_pmp is zero, that means pmp is not implemented hence raise // trap if it tries to access the csr. I would prefer to implement // this by not instantiating any pmpaddr_csr_t for these regs, but @@ -189,7 +184,7 @@ bool pmpaddr_csr_t::access_ok(access_type type, reg_t mode) const noexcept { // implement class pmpcfg_csr_t pmpcfg_csr_t::pmpcfg_csr_t(processor_t* const proc, const reg_t addr): - logged_csr_t(proc, addr) { + csr_t(proc, addr) { } reg_t pmpcfg_csr_t::read() const noexcept { @@ -223,7 +218,7 @@ bool pmpcfg_csr_t::unlogged_write(const reg_t val) noexcept { // implement class virtualized_csr_t virtualized_csr_t::virtualized_csr_t(processor_t* const proc, csr_t_p orig, csr_t_p virt): - logged_csr_t(proc, orig->address), + csr_t(proc, orig->address), orig_csr(orig), virt_csr(virt) { } @@ -248,7 +243,7 @@ bool virtualized_csr_t::unlogged_write(const reg_t val) noexcept { // implement class epc_csr_t epc_csr_t::epc_csr_t(processor_t* const proc, const reg_t addr): - logged_csr_t(proc, addr), + csr_t(proc, addr), val(0) { } @@ -266,7 +261,7 @@ bool epc_csr_t::unlogged_write(const reg_t val) noexcept { // implement class tvec_csr_t tvec_csr_t::tvec_csr_t(processor_t* const proc, const reg_t addr): - logged_csr_t(proc, addr), + csr_t(proc, addr), val(0) { } @@ -301,7 +296,7 @@ reg_t cause_csr_t::read() const noexcept { // implement class base_status_csr_t base_status_csr_t::base_status_csr_t(processor_t* const proc, const reg_t addr): - logged_csr_t(proc, addr), + csr_t(proc, addr), has_page(proc->extension_enabled_const('S') && proc->supports_impl(IMPL_MMU)), sstatus_write_mask(compute_sstatus_write_mask()), sstatus_read_mask(sstatus_write_mask | SSTATUS_UBE | SSTATUS_UXL @@ -517,7 +512,7 @@ bool misa_csr_t::extension_enabled_const(unsigned char ext) const noexcept { // implement class mip_or_mie_csr_t mip_or_mie_csr_t::mip_or_mie_csr_t(processor_t* const proc, const reg_t addr): - logged_csr_t(proc, addr), + csr_t(proc, addr), val(0) { } @@ -617,7 +612,7 @@ reg_t generic_int_accessor_t::deleg_mask() const { // implement class mip_proxy_csr_t mip_proxy_csr_t::mip_proxy_csr_t(processor_t* const proc, const reg_t addr, generic_int_accessor_t_p accr): - logged_csr_t(proc, addr), + csr_t(proc, addr), accr(accr) { } @@ -632,7 +627,7 @@ bool mip_proxy_csr_t::unlogged_write(const reg_t val) noexcept { // implement class mie_proxy_csr_t mie_proxy_csr_t::mie_proxy_csr_t(processor_t* const proc, const reg_t addr, generic_int_accessor_t_p accr): - logged_csr_t(proc, addr), + csr_t(proc, addr), accr(accr) { } diff --git a/riscv/csrs.h b/riscv/csrs.h index 87f00f6..e143c66 100644 --- a/riscv/csrs.h +++ b/riscv/csrs.h @@ -50,15 +50,8 @@ class csr_t { typedef std::shared_ptr<csr_t> csr_t_p; -// Parent class that records log of every write to itself -class logged_csr_t: public csr_t { - public: - logged_csr_t(processor_t* const proc, const reg_t addr); -}; - - // Basic CSRs, with XLEN bits fully readable and writable. -class basic_csr_t: public logged_csr_t { +class basic_csr_t: public csr_t { public: basic_csr_t(processor_t* const proc, const reg_t addr, const reg_t init); virtual reg_t read() const noexcept override; @@ -69,7 +62,7 @@ class basic_csr_t: public logged_csr_t { }; -class pmpaddr_csr_t: public logged_csr_t { +class pmpaddr_csr_t: public csr_t { public: pmpaddr_csr_t(processor_t* const proc, const reg_t addr); virtual void verify_permissions(insn_t insn, bool write) const override; @@ -109,7 +102,7 @@ class pmpaddr_csr_t: public logged_csr_t { typedef std::shared_ptr<pmpaddr_csr_t> pmpaddr_csr_t_p; -class pmpcfg_csr_t: public logged_csr_t { +class pmpcfg_csr_t: public csr_t { public: pmpcfg_csr_t(processor_t* const proc, const reg_t addr); virtual reg_t read() const noexcept override; @@ -126,7 +119,7 @@ class pmpcfg_csr_t: public logged_csr_t { // The csrmap will contain a virtualized_csr_t under sscratch's // address, plus the vsscratch basic_csr_t under its address. -class virtualized_csr_t: public logged_csr_t { +class virtualized_csr_t: public csr_t { public: virtualized_csr_t(processor_t* const proc, csr_t_p orig, csr_t_p virt); @@ -142,7 +135,7 @@ class virtualized_csr_t: public logged_csr_t { typedef std::shared_ptr<virtualized_csr_t> virtualized_csr_t_p; // For mepc, sepc, and vsepc -class epc_csr_t: public logged_csr_t { +class epc_csr_t: public csr_t { public: epc_csr_t(processor_t* const proc, const reg_t addr); @@ -155,7 +148,7 @@ class epc_csr_t: public logged_csr_t { // For mtvec, stvec, and vstvec -class tvec_csr_t: public logged_csr_t { +class tvec_csr_t: public csr_t { public: tvec_csr_t(processor_t* const proc, const reg_t addr); @@ -177,7 +170,7 @@ class cause_csr_t: public basic_csr_t { // For *status family of CSRs -class base_status_csr_t: public logged_csr_t { +class base_status_csr_t: public csr_t { public: base_status_csr_t(processor_t* const proc, const reg_t addr); protected: @@ -258,7 +251,7 @@ class misa_csr_t: public basic_csr_t { typedef std::shared_ptr<misa_csr_t> misa_csr_t_p; -class mip_or_mie_csr_t: public logged_csr_t { +class mip_or_mie_csr_t: public csr_t { public: mip_or_mie_csr_t(processor_t* const proc, const reg_t addr); virtual reg_t read() const noexcept override final; @@ -329,7 +322,7 @@ typedef std::shared_ptr<generic_int_accessor_t> generic_int_accessor_t_p; // For all CSRs that are simply (masked & shifted) views into mip -class mip_proxy_csr_t: public logged_csr_t { +class mip_proxy_csr_t: public csr_t { public: mip_proxy_csr_t(processor_t* const proc, const reg_t addr, generic_int_accessor_t_p accr); virtual reg_t read() const noexcept override; @@ -340,7 +333,7 @@ class mip_proxy_csr_t: public logged_csr_t { }; // For all CSRs that are simply (masked & shifted) views into mie -class mie_proxy_csr_t: public logged_csr_t { +class mie_proxy_csr_t: public csr_t { public: mie_proxy_csr_t(processor_t* const proc, const reg_t addr, generic_int_accessor_t_p accr); virtual reg_t read() const noexcept override; |