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authorAndrew Waterman <aswaterman@gmail.com>2017-11-15 16:17:40 -0800
committerGitHub <noreply@github.com>2017-11-15 16:17:40 -0800
commitf8a83a80525264761a982cdb4074cb09ac72d7de (patch)
tree3c50c6febbf5ce7df0ff64cf3568f817dc73e532
parentf5bdc2e34299e3721c9319ba92dc72149f6af8a2 (diff)
parent6c7c772b169d0e1a00998c48e63c7cae98e7aa6a (diff)
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Merge pull request #156 from p12nGH/noncontiguous_harts
Support for non-contiguous hartids
-rw-r--r--riscv/sim.cc17
-rw-r--r--riscv/sim.h2
-rw-r--r--spike_main/spike.cc17
3 files changed, 31 insertions, 5 deletions
diff --git a/riscv/sim.cc b/riscv/sim.cc
index 5aa9213..793a2c8 100644
--- a/riscv/sim.cc
+++ b/riscv/sim.cc
@@ -25,7 +25,7 @@ static void handle_signal(int sig)
sim_t::sim_t(const char* isa, size_t nprocs, bool halted, reg_t start_pc,
std::vector<std::pair<reg_t, mem_t*>> mems,
- const std::vector<std::string>& args)
+ const std::vector<std::string>& args, std::vector<int> const hartids)
: htif_t(args), debug_module(this), mems(mems), procs(std::max(nprocs, size_t(1))),
start_pc(start_pc),
current_step(0), current_proc(0), debug(false), remote_bitbang(NULL)
@@ -39,8 +39,19 @@ sim_t::sim_t(const char* isa, size_t nprocs, bool halted, reg_t start_pc,
debug_mmu = new mmu_t(this, NULL);
- for (size_t i = 0; i < procs.size(); i++) {
- procs[i] = new processor_t(isa, this, i, halted);
+ if (hartids.size() == 0) {
+ for (size_t i = 0; i < procs.size(); i++) {
+ procs[i] = new processor_t(isa, this, i, halted);
+ }
+ }
+ else {
+ if (hartids.size() != procs.size()) {
+ std::cerr << "Number of specified hartids doesn't match number of processors" << strerror(errno) << std::endl;
+ exit(1);
+ }
+ for (size_t i = 0; i < procs.size(); i++) {
+ procs[i] = new processor_t(isa, this, hartids[i], halted);
+ }
}
clint.reset(new clint_t(procs));
diff --git a/riscv/sim.h b/riscv/sim.h
index 9372cc1..b102a6b 100644
--- a/riscv/sim.h
+++ b/riscv/sim.h
@@ -21,7 +21,7 @@ class sim_t : public htif_t
public:
sim_t(const char* isa, size_t _nprocs, bool halted, reg_t start_pc,
std::vector<std::pair<reg_t, mem_t*>> mems,
- const std::vector<std::string>& args);
+ const std::vector<std::string>& args, const std::vector<int> hartids);
~sim_t();
// run the simulation to completion
diff --git a/spike_main/spike.cc b/spike_main/spike.cc
index 23f8e49..863ee81 100644
--- a/spike_main/spike.cc
+++ b/spike_main/spike.cc
@@ -28,6 +28,7 @@ static void help()
fprintf(stderr, " -H Start halted, allowing a debugger to connect\n");
fprintf(stderr, " --isa=<name> RISC-V ISA string [default %s]\n", DEFAULT_ISA);
fprintf(stderr, " --pc=<address> Override ELF entry point\n");
+ fprintf(stderr, " --hartids=<a,b,...> Explicitly specify hartids, default is 0,1,...\n");
fprintf(stderr, " --ic=<S>:<W>:<B> Instantiate a cache model with S sets,\n");
fprintf(stderr, " --dc=<S>:<W>:<B> W ways, and B-byte blocks (with S and\n");
fprintf(stderr, " --l2=<S>:<W>:<B> B both powers of 2).\n");
@@ -84,6 +85,19 @@ int main(int argc, char** argv)
const char* isa = DEFAULT_ISA;
uint16_t rbb_port = 0;
bool use_rbb = false;
+ std::vector<int> hartids;
+
+ auto const hartids_parser = [&](const char *s) {
+ std::string const str(s);
+ std::stringstream stream(str);
+
+ int n;
+ while (stream >> n)
+ {
+ hartids.push_back(n);
+ if (stream.peek() == ',') stream.ignore();
+ }
+ };
option_parser_t parser;
parser.help(&help);
@@ -97,6 +111,7 @@ int main(int argc, char** argv)
parser.option('H', 0, 0, [&](const char* s){halted = true;});
parser.option(0, "rbb-port", 1, [&](const char* s){use_rbb = true; rbb_port = atoi(s);});
parser.option(0, "pc", 1, [&](const char* s){start_pc = strtoull(s, 0, 0);});
+ parser.option(0, "hartids", 1, hartids_parser);
parser.option(0, "ic", 1, [&](const char* s){ic.reset(new icache_sim_t(s));});
parser.option(0, "dc", 1, [&](const char* s){dc.reset(new dcache_sim_t(s));});
parser.option(0, "l2", 1, [&](const char* s){l2.reset(cache_sim_t::construct(s, "L2$"));});
@@ -116,7 +131,7 @@ int main(int argc, char** argv)
if (mems.empty())
mems = make_mems("2048");
- sim_t s(isa, nprocs, halted, start_pc, mems, htif_args);
+ sim_t s(isa, nprocs, halted, start_pc, mems, htif_args, std::move(hartids));
std::unique_ptr<remote_bitbang_t> remote_bitbang((remote_bitbang_t *) NULL);
std::unique_ptr<jtag_dtm_t> jtag_dtm(new jtag_dtm_t(&s.debug_module));
if (use_rbb) {