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| author | Andrew Waterman <andrew@sifive.com> | 2017-11-27 14:18:06 -0800 |
|---|---|---|
| committer | Andrew Waterman <andrew@sifive.com> | 2017-11-27 14:18:06 -0800 |
| commit | 160c1a5cee45d3842824af565e52458e2f8b3c48 (patch) | |
| tree | 43e7764709dddaee8c6eaaf482fb196e8b92ba76 | |
| parent | d7ceeabbe6bb2bfc153c6b8d9a1db98f0c975347 (diff) | |
| download | spike-160c1a5cee45d3842824af565e52458e2f8b3c48.zip spike-160c1a5cee45d3842824af565e52458e2f8b3c48.tar.gz spike-160c1a5cee45d3842824af565e52458e2f8b3c48.tar.bz2 | |
Set tval to 0 on traps with no specified tval
Simply not writing the register was not a conformant implementation.
| -rw-r--r-- | riscv/processor.cc | 6 | ||||
| -rw-r--r-- | riscv/trap.h | 2 |
2 files changed, 3 insertions, 5 deletions
diff --git a/riscv/processor.cc b/riscv/processor.cc index 722ca45..564b34f 100644 --- a/riscv/processor.cc +++ b/riscv/processor.cc @@ -272,8 +272,7 @@ void processor_t::take_trap(trap_t& t, reg_t epc) state.pc = state.stvec; state.scause = t.cause(); state.sepc = epc; - if (t.has_badaddr()) - state.sbadaddr = t.get_badaddr(); + state.sbadaddr = t.get_badaddr(); reg_t s = state.mstatus; s = set_field(s, MSTATUS_SPIE, get_field(s, MSTATUS_SIE)); @@ -286,8 +285,7 @@ void processor_t::take_trap(trap_t& t, reg_t epc) state.pc = (state.mtvec & ~(reg_t)1) + vector; state.mepc = epc; state.mcause = t.cause(); - if (t.has_badaddr()) - state.mbadaddr = t.get_badaddr(); + state.mbadaddr = t.get_badaddr(); reg_t s = state.mstatus; s = set_field(s, MSTATUS_MPIE, get_field(s, MSTATUS_MIE)); diff --git a/riscv/trap.h b/riscv/trap.h index 91e5223..1fe44eb 100644 --- a/riscv/trap.h +++ b/riscv/trap.h @@ -14,7 +14,7 @@ class trap_t trap_t(reg_t which) : which(which) {} virtual const char* name(); virtual bool has_badaddr() { return false; } - virtual reg_t get_badaddr() { abort(); } + virtual reg_t get_badaddr() { return 0; } reg_t cause() { return which; } private: char _name[16]; |