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author | Yueh-Ting (eop) Chen <yueh.ting.chen@gmail.com> | 2021-12-07 05:25:29 +0800 |
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committer | GitHub <noreply@github.com> | 2021-12-06 13:25:29 -0800 |
commit | 9f18486669df4eddf0e3d799d686a9714d348bc8 (patch) | |
tree | b02fe540429864cf8f59322b8ffcb00f0e98ef39 | |
parent | 7209834847b5ffcb6c5fe13e880b5779d1ede4f1 (diff) | |
download | spike-9f18486669df4eddf0e3d799d686a9714d348bc8.zip spike-9f18486669df4eddf0e3d799d686a9714d348bc8.tar.gz spike-9f18486669df4eddf0e3d799d686a9714d348bc8.tar.bz2 |
Simplify vmadc and vmsbc (#877)
-rw-r--r-- | riscv/decode.h | 27 | ||||
-rw-r--r-- | riscv/insns/vmadc_vim.h | 10 | ||||
-rw-r--r-- | riscv/insns/vmadc_vvm.h | 10 | ||||
-rw-r--r-- | riscv/insns/vmadc_vxm.h | 10 | ||||
-rw-r--r-- | riscv/insns/vmsbc_vvm.h | 10 | ||||
-rw-r--r-- | riscv/insns/vmsbc_vxm.h | 10 |
6 files changed, 24 insertions, 53 deletions
diff --git a/riscv/decode.h b/riscv/decode.h index 47df451..4d37530 100644 --- a/riscv/decode.h +++ b/riscv/decode.h @@ -630,6 +630,21 @@ static inline bool is_aligned(const unsigned val, const unsigned pos) } \ P.VU.vstart->write(0); +#define VI_LOOP_CARRY_BASE \ + VI_GENERAL_LOOP_BASE \ + VI_MASK_VARS \ + auto v0 = P.VU.elt<uint64_t>(0, midx); \ + const uint64_t mmask = UINT64_C(1) << mpos; \ + const uint128_t op_mask = (UINT64_MAX >> (64 - sew)); \ + uint64_t carry = insn.v_vm() == 0 ? (v0 >> mpos) & 0x1 : 0; \ + uint128_t res = 0; \ + auto &vd = P.VU.elt<uint64_t>(rd_num, midx, true); + +#define VI_LOOP_CARRY_END \ + vd = (vd & ~mmask) | (((res) << mpos) & mmask); \ + } \ + P.VU.vstart->write(0); + #define VI_LOOP_CMP_BASE \ require(P.VU.vsew >= e8 && P.VU.vsew <= e64); \ require_vector(true);\ @@ -801,12 +816,10 @@ static inline bool is_aligned(const unsigned val, const unsigned pos) auto vs2 = P.VU.elt<type_sew_t<x>::type>(rs2_num, i); \ auto rs1 = (type_sew_t<x>::type)RS1; \ auto simm5 = (type_sew_t<x>::type)insn.v_simm5(); \ - auto &vd = P.VU.elt<uint64_t>(rd_num, midx, true); #define VV_CARRY_PARAMS(x) \ auto vs2 = P.VU.elt<type_sew_t<x>::type>(rs2_num, i); \ auto vs1 = P.VU.elt<type_sew_t<x>::type>(rs1_num, i); \ - auto &vd = P.VU.elt<uint64_t>(rd_num, midx, true); #define XI_WITH_CARRY_PARAMS(x) \ auto vs2 = P.VU.elt<type_sew_t<x>::type>(rs2_num, i); \ @@ -1397,8 +1410,7 @@ VI_LOOP_END // carry/borrow bit loop #define VI_VV_LOOP_CARRY(BODY) \ VI_CHECK_MSS(true); \ - VI_GENERAL_LOOP_BASE \ - VI_MASK_VARS \ + VI_LOOP_CARRY_BASE \ if (sew == e8){ \ VV_CARRY_PARAMS(e8) \ BODY; \ @@ -1412,12 +1424,11 @@ VI_LOOP_END VV_CARRY_PARAMS(e64) \ BODY; \ } \ - VI_LOOP_END + VI_LOOP_CARRY_END #define VI_XI_LOOP_CARRY(BODY) \ VI_CHECK_MSS(false); \ - VI_GENERAL_LOOP_BASE \ - VI_MASK_VARS \ + VI_LOOP_CARRY_BASE \ if (sew == e8){ \ XI_CARRY_PARAMS(e8) \ BODY; \ @@ -1431,7 +1442,7 @@ VI_LOOP_END XI_CARRY_PARAMS(e64) \ BODY; \ } \ - VI_LOOP_END + VI_LOOP_CARRY_END #define VI_VV_LOOP_WITH_CARRY(BODY) \ require(insn.rd() != 0); \ diff --git a/riscv/insns/vmadc_vim.h b/riscv/insns/vmadc_vim.h index 9e15b74..a1f78ff 100644 --- a/riscv/insns/vmadc_vim.h +++ b/riscv/insns/vmadc_vim.h @@ -1,13 +1,5 @@ // vmadc.vim vd, vs2, simm5, v0 VI_XI_LOOP_CARRY ({ - auto v0 = P.VU.elt<uint64_t>(0, midx); - const uint64_t mmask = UINT64_C(1) << mpos; \ - const uint128_t op_mask = (UINT64_MAX >> (64 - sew)); - uint64_t carry = insn.v_vm() == 0 ? (v0 >> mpos) & 0x1 : 0; - - uint128_t res = (op_mask & simm5) + (op_mask & vs2) + carry; - - carry = (res >> sew) & 0x1u; - vd = (vd & ~mmask) | ((carry << mpos) & mmask); + res = (((op_mask & simm5) + (op_mask & vs2) + carry) >> sew) & 0x1u; }) diff --git a/riscv/insns/vmadc_vvm.h b/riscv/insns/vmadc_vvm.h index 1552880..96a7f2c 100644 --- a/riscv/insns/vmadc_vvm.h +++ b/riscv/insns/vmadc_vvm.h @@ -1,13 +1,5 @@ // vmadc.vvm vd, vs2, rs1, v0 VI_VV_LOOP_CARRY ({ - auto v0 = P.VU.elt<uint64_t>(0, midx); - const uint64_t mmask = UINT64_C(1) << mpos; \ - const uint128_t op_mask = (UINT64_MAX >> (64 - sew)); - uint64_t carry = insn.v_vm() == 0 ? (v0 >> mpos) & 0x1 : 0; - - uint128_t res = (op_mask & vs1) + (op_mask & vs2) + carry; - - carry = (res >> sew) & 0x1u; - vd = (vd & ~mmask) | ((carry << mpos) & mmask); + res = (((op_mask & vs1) + (op_mask & vs2) + carry) >> sew) & 0x1u; }) diff --git a/riscv/insns/vmadc_vxm.h b/riscv/insns/vmadc_vxm.h index 306f801..1561d85 100644 --- a/riscv/insns/vmadc_vxm.h +++ b/riscv/insns/vmadc_vxm.h @@ -1,13 +1,5 @@ // vadc.vx vd, vs2, rs1, v0 VI_XI_LOOP_CARRY ({ - auto v0 = P.VU.elt<uint64_t>(0, midx); - const uint64_t mmask = UINT64_C(1) << mpos; \ - const uint128_t op_mask = (UINT64_MAX >> (64 - sew)); - uint64_t carry = insn.v_vm() == 0 ? (v0 >> mpos) & 0x1 : 0; - - uint128_t res = (op_mask & rs1) + (op_mask & vs2) + carry; - - carry = (res >> sew) & 0x1u; - vd = (vd & ~mmask) | ((carry << mpos) & mmask); + res = (((op_mask & rs1) + (op_mask & vs2) + carry) >> sew) & 0x1u; }) diff --git a/riscv/insns/vmsbc_vvm.h b/riscv/insns/vmsbc_vvm.h index 5f91a1e..3225c62 100644 --- a/riscv/insns/vmsbc_vvm.h +++ b/riscv/insns/vmsbc_vvm.h @@ -1,13 +1,5 @@ // vmsbc.vvm vd, vs2, rs1, v0 VI_VV_LOOP_CARRY ({ - auto v0 = P.VU.elt<uint64_t>(0, midx); - const uint64_t mmask = UINT64_C(1) << mpos; - const uint128_t op_mask = (UINT64_MAX >> (64 - sew)); - uint64_t carry = insn.v_vm() == 0 ? (v0 >> mpos) & 0x1 : 0; - - uint128_t res = (op_mask & vs2) - (op_mask & vs1) - carry; - - carry = (res >> sew) & 0x1u; - vd = (vd & ~mmask) | ((carry << mpos) & mmask); + res = (((op_mask & vs2) - (op_mask & vs1) - carry) >> sew) & 0x1u; }) diff --git a/riscv/insns/vmsbc_vxm.h b/riscv/insns/vmsbc_vxm.h index 9d6012e..8cc46ba 100644 --- a/riscv/insns/vmsbc_vxm.h +++ b/riscv/insns/vmsbc_vxm.h @@ -1,13 +1,5 @@ // vmsbc.vxm vd, vs2, rs1, v0 VI_XI_LOOP_CARRY ({ - auto &v0 = P.VU.elt<uint64_t>(0, midx); - const uint64_t mmask = UINT64_C(1) << mpos; \ - const uint128_t op_mask = (UINT64_MAX >> (64 - sew)); - uint64_t carry = insn.v_vm() == 0 ? (v0 >> mpos) & 0x1 : 0; - - uint128_t res = (op_mask & vs2) - (op_mask & rs1) - carry; - - carry = (res >> sew) & 0x1u; - vd = (vd & ~mmask) | ((carry << mpos) & mmask); + res = (((op_mask & vs2) - (op_mask & rs1) - carry) >> sew) & 0x1u; }) |