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| author | Chih-Min Chao <chihmin.chao@sifive.com> | 2020-07-29 20:59:56 -0700 |
|---|---|---|
| committer | Chih-Min Chao <chihmin.chao@sifive.com> | 2020-07-29 21:38:43 -0700 |
| commit | a4482608e81e8c301967ac7b51a8fc9b6e856db8 (patch) | |
| tree | 81e805d7b530c65f25f98fdb6d7993ff2a6bb1b2 | |
| parent | a602aa595c3f2a99c77aff2fb4b8b15adf15cacc (diff) | |
| download | spike-a4482608e81e8c301967ac7b51a8fc9b6e856db8.zip spike-a4482608e81e8c301967ac7b51a8fc9b6e856db8.tar.gz spike-a4482608e81e8c301967ac7b51a8fc9b6e856db8.tar.bz2 | |
rvv: remove isa string zvamoand zvlsseg
Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com>
| -rw-r--r-- | riscv/decode.h | 5 | ||||
| -rw-r--r-- | riscv/processor.cc | 11 | ||||
| -rw-r--r-- | riscv/processor.h | 2 |
3 files changed, 0 insertions, 18 deletions
diff --git a/riscv/decode.h b/riscv/decode.h index e07020e..c5169af 100644 --- a/riscv/decode.h +++ b/riscv/decode.h @@ -492,8 +492,6 @@ static inline bool is_aligned(const unsigned val, const unsigned pos) require_align(insn.rs2(), vemul); \ require((nf * flmul) <= (NVPR / 4) && \ (insn.rd() + nf * flmul) <= NVPR); \ - if (nf > 1) \ - require(p->supports_extension(EXT_ZVLSSEG)); \ #define VI_CHECK_LD_INDEX(elt_width) \ VI_CHECK_ST_INDEX(elt_width); \ @@ -542,8 +540,6 @@ static inline bool is_aligned(const unsigned val, const unsigned pos) require_align(insn.rd(), vemul); \ require((nf * emul) <= (NVPR / 4) && \ (insn.rd() + nf * emul) <= NVPR); \ - if (nf > 1) \ - require(p->supports_extension(EXT_ZVLSSEG)); \ #define VI_CHECK_LOAD(elt_width) \ VI_CHECK_STORE(elt_width); \ @@ -1817,7 +1813,6 @@ for (reg_t i = 0; i < P.VU.vlmax && P.VU.vl != 0; ++i) { \ // #define VI_AMO(op, type, idx_type) \ require_vector; \ - require_extension(EXT_ZVAMO); \ require_align(insn.rd(), P.VU.vflmul); \ require(P.VU.vsew <= P.get_xlen() && P.VU.vsew >= 32); \ require_align(insn.rd(), P.VU.vflmul); \ diff --git a/riscv/processor.cc b/riscv/processor.cc index d59b96b..50092c8 100644 --- a/riscv/processor.cc +++ b/riscv/processor.cc @@ -260,10 +260,6 @@ void processor_t::parse_isa_string(const char* str) auto ext_str = std::string(ext, end - ext); if (ext_str == "zfh") { extension_table[EXT_ZFH] = true; - } else if (ext_str == "zvamo") { - extension_table[EXT_ZVAMO] = true; - } else if (ext_str == "zvlsseg") { - extension_table[EXT_ZVLSSEG] = true; } else if (ext_str == "zvqmac") { extension_table[EXT_ZVQMAC] = true; } else { @@ -292,13 +288,6 @@ void processor_t::parse_isa_string(const char* str) if (supports_extension('Q') && !supports_extension('D')) bad_isa_string(str, "'Q' extension requires 'D'"); - if (supports_extension(EXT_ZVAMO) && - !(supports_extension('A') && supports_extension('V'))) - bad_isa_string(str, "'Zvamo' extension requires 'A' and 'V'"); - - if (supports_extension(EXT_ZVLSSEG) && !supports_extension('V')) - bad_isa_string(str, "'Zvlsseg' extension requires 'V'"); - if (supports_extension(EXT_ZVQMAC) && !supports_extension('V')) bad_isa_string(str, "'Zvqmac' extension requires 'V'"); } diff --git a/riscv/processor.h b/riscv/processor.h index 3d540dd..6c16eb9 100644 --- a/riscv/processor.h +++ b/riscv/processor.h @@ -246,9 +246,7 @@ typedef enum { typedef enum { // 65('A') ~ 90('Z') is reserved for standard isa in misa EXT_ZFH = 0, - EXT_ZVAMO, EXT_ZVEDIV, - EXT_ZVLSSEG, EXT_ZVQMAC, } isa_extension_t; |