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authorAndrew Waterman <andrew@sifive.com>2024-06-26 18:10:27 -0700
committerAndrew Waterman <andrew@sifive.com>2024-06-26 18:10:27 -0700
commit6854a911fd4c23650a65acbf5314e2cd3e1637b9 (patch)
tree3453f0a9ea8a2ecbb92e737e7df829ad538f7ecb
parent389851ce15f35b71b6f73b818ff046cf248f692e (diff)
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Expand default disassembly ISA
-rw-r--r--disasm/disasm.cc3
1 files changed, 2 insertions, 1 deletions
diff --git a/disasm/disasm.cc b/disasm/disasm.cc
index 7deb932..c3ba62a 100644
--- a/disasm/disasm.cc
+++ b/disasm/disasm.cc
@@ -2249,7 +2249,8 @@ disassembler_t::disassembler_t(const isa_parser_t *isa)
// next-highest priority: other instructions in same base ISA
std::string fallback_isa_string = std::string("rv") + std::to_string(isa->get_max_xlen()) +
- "gqcvh_zfh_zba_zbb_zbc_zbs_zcb_zicbom_zicboz_zicond_zkn_zkr_zks_svinval_zcmop_zimop";
+ "gqcvh_zfh_zfa_zba_zbb_zbc_zbs_zcb_zicbom_zicboz_zicond_zk_zks_svinval_"
+ "zcmop_zimop_zawrs_zicfiss_zicfilp_zvknc_zvkg_zvfbfmin_zvfbfwma_zfbfmin";
isa_parser_t fallback_isa(fallback_isa_string.c_str(), DEFAULT_PRIV);
add_instructions(&fallback_isa);