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path: root/lib/pci_caps.c
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2022-02-04ignore writes to RO MSI-X registers (#642)Thanos Makatos1-32/+19
Signed-off-by: Thanos Makatos <thanos.makatos@nutanix.com> Reviewed-by: John Levon <john.levon@nutanix.com>
2021-11-30introduce device quiesce callback (#609)Thanos Makatos1-0/+19
Signed-off-by: Thanos Makatos <thanos.makatos@nutanix.com> Reviewed-by: John Leon <john.levon@nutanix.com>
2021-07-12basic write support for PXLC, PXSC, PXRS, and PXSC2 (#575)Thanos Makatos1-0/+32
Signed-off-by: Thanos Makatos <thanos.makatos@nutanix.com> Reviewed-by: John Levon <john.levon@nutanix.com>
2021-06-18superficially handle Device Control 2 and Link Control 2 (#568)Thanos Makatos1-0/+32
* superficially handle Device Control 2 and Link Control 2 Signed-off-by: Thanos Makatos <thanos.makatos@nutanix.com> Reviewed-by: John Levon <john.levon@nutanix.com>
2021-05-28hide non-ABI symbols (#538)John Levon1-3/+3
Default to hidden visibility to remove non-public symbols from API users (and improve performance a little). Every public function gets an EXPORT annotation. Signed-off-by: John Levon <john.levon@nutanix.com> Reviewed-by: Thanos Makatos <thanos.makatos@nutanix.com>
2021-05-25Handle support of PCI FLR capability (#517)Swapnil Ingle1-2/+10
* Handle support of PCI FLR capability If device supports FLR cap then call vfu_reset_cb_t when FLR is initiated by client. Signed-off-by: Swapnil Ingle <swapnil.ingle@nutanix.com> Reviewed-by: John Levon <john.levon@nutanix.com> Reviewed-by: Thanos Makatos <thanos.makatos@nutanix.com>
2021-05-15move PCI capability testing to Python (#453)John Levon1-0/+3
This also adds a couple of additional tests (as well as more fully testing the region access path). Signed-off-by: John Levon <john.levon@nutanix.com> Reviewed-by: Swapnil Ingle <swapnil.ingle@nutanix.com>
2021-04-23correct PM capability definition (#452)John Levon1-1/+14
the static size assert for the PMCS register was checking the wrong struct; however, the struct was nonetheless 4 bytes long, due to uint bitfields. This accidentally meant the containing struct pmcap was the correct size (the alignment attribute makes no difference). After fixing struct pmcs, we'll include the additional two bytes defined in the PCI PM specification, Section 3.2. These are "optional", but as elsewhere, we'll require them when adding the capability. Signed-off-by: John Levon <john.levon@nutanix.com> Reviewed-by: Thanos Makatos <thanos.makatos@nutanix.com>
2021-04-23cap_write_pm(): remove assert() (#450)John Levon1-2/+2
Replace client-triggerable assert() with a log message. Signed-off-by: John Levon <john.levon@nutanix.com> Reviewed-by: Swapnil Ingle <swapnil.ingle@nutanix.com>
2021-04-13pci: use ERROR_INT() (#430)John Levon1-18/+21
Signed-off-by: John Levon <john.levon@nutanix.com> Reviewed-by: Thanos Makatos <thanos.makatos@nutanix.com>
2021-04-07clean up newlines in logs (#423)John Levon1-35/+35
vfu_log() and err() should not take newlines. Signed-off-by: John Levon <john.levon@nutanix.com> Reviewed-by: Thanos Makatos <thanos.makatos@nutanix.com>
2021-02-18use sizeof() consistently (#351)John Levon1-11/+11
The most common way we have written this is as "sizeof()"; use this form consistently. Signed-off-by: John Levon <john.levon@nutanix.com> Reviewed-by: Thanos Makatos <thanos.makatos@nutanix.com>
2021-02-10API error return converged to one func (#325)swapnili1-10/+10
* API error return converged to one func Use ERROR_INT() or ERROR_PTR() to return errors from API's. This way if we want to change the behaviour later, we will just need to update these funcitons. Also fixed some error return cases and comments. Reviewed-by: John Levon <john.levon@nutanix.com>
2021-02-02define full PCI Express capability struct (#289)John Levon1-1/+1
Define the full-size capability as defined in the specification. Previously, we were defining the structure as in the form used by PCI Express Integrated Endpoints. It's reasonable to assume, however, that a vfio-user device is a normal PCI Express Endpoint connected over a Link. We'll go further, and define the whole structure, including the slot registers at the end that are usually only used for Ports. The presumption here is that it can't hurt to use the larger size: the only way a client could care is if it presumed the next capability was at a particular offset from this one, and we must hope nothing is that silly. This also corrects a buffer overflow: cap_size() in fact disagreed with the original size of our struct pxcap (found via clang's address sanitizer). Signed-off-by: John Levon <john.levon@nutanix.com Reviewed-by: Thanos Makatos <thanos.makatos@nutanix.com>
2021-01-20support extended capabilities (#226)John Levon1-194/+391
Provide initial support for extended capabilities, and implement handlers for the Device Serial Number and Vendor-Specific capabilities. Signed-off-by: John Levon <john.levon@nutanix.com> Reviewed-by: Swapnil Ingle <swapnil.ingle@nutanix.com>
2021-01-20re-work API for adding capabilities (#200)John Levon1-0/+547
Allow to add capabilities individually, including extended capabilities, and those to be handled via the region callback. As a side effect, rework config space accesses to handle reads that straddle capabilities and non-standard areas and use callbacks as needed. Signed-off-by: John Levon <john.levon@nutanix.com> Reviewed-by: Swapnil Ingle <swapnil.ingle@nutanix.com> Reviewed-by: Thanos Makatos <thanos.makatos@nutanix.com>