aboutsummaryrefslogtreecommitdiff
path: root/src/arm/nxp/imx/imx6q-prtwd2.dts
blob: 792b8903d3451c2fc079242cd67cb57a674d3d56 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * Copyright (c) 2018 Protonic Holland
 */

/dts-v1/;
#include "imx6q.dtsi"
#include "imx6qdl-prti6q.dtsi"
#include <dt-bindings/leds/common.h>

/ {
	model = "Protonic WD2 board";
	compatible = "prt,prtwd2", "fsl,imx6q";

	memory@10000000 {
		device_type = "memory";
		reg = <0x10000000 0x20000000>;
	};

	memory@80000000 {
		device_type = "memory";
		reg = <0x80000000 0x20000000>;
	};

	clk50m_phy: phy-clock {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <50000000>;
		clock-output-names = "enet_ref_pad";
	};

	usdhc2_wifi_pwrseq: usdhc2_wifi_pwrseq {
		compatible = "mmc-pwrseq-simple";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_wifi_npd>;
		reset-gpios = <&gpio6 10 GPIO_ACTIVE_LOW>;
	};

	/* PRTWD2 rev 1 bitbang I2C for Ethernet Switch */
	i2c {
		compatible = "i2c-gpio";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_i2c4>;
		sda-gpios = <&gpio1 22 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
		scl-gpios = <&gpio1 31 GPIO_ACTIVE_HIGH>;
		i2c-gpio,delay-us = <20>;	/* ~10 kHz */
		i2c-gpio,scl-output-only;
		#address-cells = <1>;
		#size-cells = <0>;
	};
};

&can1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_can1 &pinctrl_can1phy>;
	status = "okay";
};

&clks {
	clocks = <&clk50m_phy>;
	clock-names = "enet_ref_pad";
	assigned-clocks = <&clks IMX6QDL_CLK_ENET_REF_SEL>;
	assigned-clock-parents = <&clk50m_phy>;
};

&fec {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_enet>;
	phy-mode = "rmii";
	status = "okay";

	fixed-link {
		speed = <100>;
		pause;
		full-duplex;
	};
};

&i2c3 {
	adc@49 {
		compatible = "ti,ads1015";
		reg = <0x49>;
		#address-cells = <1>;
		#size-cells = <0>;

		/* V in */
		channel@4 {
			reg = <4>;
			ti,gain = <1>;
			ti,datarate = <3>;
		};

		/* I charge */
		channel@5 {
			reg = <5>;
			ti,gain = <1>;
			ti,datarate = <3>;
		};

		/* V bus  */
		channel@6 {
			reg = <6>;
			ti,gain = <1>;
			ti,datarate = <3>;
		};

		/* nc */
		channel@7 {
			reg = <7>;
			ti,gain = <1>;
			ti,datarate = <3>;
		};
	};
};

&usdhc2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc2>;
	no-1-8-v;
	non-removable;
	mmc-pwrseq = <&usdhc2_wifi_pwrseq>;
	#address-cells = <1>;
	#size-cells = <0>;
	status = "okay";

	wifi@1 {
		compatible = "brcm,bcm4329-fmac";
		reg = <1>;
	};
};

&iomuxc {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usb_eth_chg>;

	pinctrl_can1phy: can1phy {
		fsl,pins = <
			/* CAN1_SR */
			MX6QDL_PAD_KEY_COL3__GPIO4_IO12	0x13070
		>;
	};

	pinctrl_enet: enetgrp {
		fsl,pins = <
			/* MX6QDL_ENET_PINGRP4 */
			MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0	0x1b0b0
			MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1	0x1b0b0
			MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER	0x130b0
			MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN	0x1b0b0
			MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0	0x1b0b0
			MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1	0x1b0b0
			MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN	0x1b0b0

			MX6QDL_PAD_GPIO_16__ENET_REF_CLK	0x1b0b0
			/* Phy reset */
			MX6QDL_PAD_CSI0_DAT4__GPIO5_IO22	0x1b0b0
			/* nINTRP */
			MX6QDL_PAD_CSI0_DAT5__GPIO5_IO23	0x1b0b0
		>;
	};

	pinctrl_i2c4: i2c4grp {
		fsl,pins = <
			MX6QDL_PAD_ENET_MDIO__GPIO1_IO22	0x1f8b0
			MX6QDL_PAD_ENET_MDC__GPIO1_IO31		0x1f8b0
		>;
	};

	pinctrl_usb_eth_chg: usbethchggrp {
		fsl,pins = <
			/* USB charging control */
			MX6QDL_PAD_NANDF_CS0__GPIO6_IO11	0x130b0
			MX6QDL_PAD_NANDF_CS1__GPIO6_IO14	0x130b0
			MX6QDL_PAD_NANDF_CS2__GPIO6_IO15	0x130b0
			MX6QDL_PAD_NANDF_CS3__GPIO6_IO16	0x130b0
			>;
	};

	pinctrl_usdhc2: usdhc2grp {
		fsl,pins = <
			MX6QDL_PAD_SD2_CMD__SD2_CMD		0x170b9
			MX6QDL_PAD_SD2_CLK__SD2_CLK		0x100b9
			MX6QDL_PAD_SD2_DAT0__SD2_DATA0		0x170b9
			MX6QDL_PAD_SD2_DAT1__SD2_DATA1		0x170b9
			MX6QDL_PAD_SD2_DAT2__SD2_DATA2		0x170b9
			MX6QDL_PAD_SD2_DAT3__SD2_DATA3		0x170b9
		>;
	};

	pinctrl_wifi_npd: wifinpd {
		fsl,pins = <
			/* WL_REG_ON */
			MX6QDL_PAD_NANDF_RB0__GPIO6_IO10	0x13069
		>;
	};
};