1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
|
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright 2007,2009-2014 Freescale Semiconductor, Inc.
* Copyright (C) 2021, Bin Meng <bmeng.cn@gmail.com>
*/
#include <common.h>
#include <command.h>
#include <cpu_func.h>
#include <dm.h>
#include <env.h>
#include <event.h>
#include <init.h>
#include <log.h>
#include <net.h>
#include <pci.h>
#include <time.h>
#include <dm/simple_bus.h>
#include <dm/uclass-internal.h>
#include <asm/global_data.h>
#include <asm/processor.h>
#include <asm/mmu.h>
#include <asm/fsl_pci.h>
#include <asm/io.h>
#include <linux/libfdt.h>
#include <fdt_support.h>
#include <netdev.h>
#include <fdtdec.h>
#include <errno.h>
#include <malloc.h>
#include <virtio_types.h>
#include <virtio.h>
DECLARE_GLOBAL_DATA_PTR;
/* Virtual address range for PCI region maps */
#define SYS_PCI_MAP_START 0x80000000
#define SYS_PCI_MAP_END 0xe0000000
static void *get_fdt_virt(void)
{
if (gd->flags & GD_FLG_RELOC)
return (void *)gd->fdt_blob;
else
return (void *)CFG_SYS_TMPVIRT;
}
static uint64_t get_fdt_phys(void)
{
return (uint64_t)(uintptr_t)gd->fdt_blob;
}
static void map_fdt_as(int esel)
{
u32 mas0, mas1, mas2, mas3, mas7;
uint64_t fdt_phys = get_fdt_phys();
unsigned long fdt_phys_tlb = fdt_phys & ~0xffffful;
unsigned long fdt_virt_tlb = (ulong)get_fdt_virt() & ~0xffffful;
mas0 = MAS0_TLBSEL(1) | MAS0_ESEL(esel);
mas1 = MAS1_VALID | MAS1_TID(0) | MAS1_TS | MAS1_TSIZE(BOOKE_PAGESZ_1M);
mas2 = FSL_BOOKE_MAS2(fdt_virt_tlb, 0);
mas3 = FSL_BOOKE_MAS3(fdt_phys_tlb, 0, MAS3_SW|MAS3_SR);
mas7 = FSL_BOOKE_MAS7(fdt_phys_tlb);
write_tlb(mas0, mas1, mas2, mas3, mas7);
}
uint64_t get_phys_ccsrbar_addr_early(void)
{
void *fdt = get_fdt_virt();
uint64_t r;
int size, node;
u32 naddr;
const fdt32_t *prop;
/*
* To be able to read the FDT we need to create a temporary TLB
* map for it.
*/
map_fdt_as(10);
node = fdt_path_offset(fdt, "/soc");
naddr = fdt_address_cells(fdt, node);
prop = fdt_getprop(fdt, node, "ranges", &size);
r = fdt_translate_address(fdt, node, prop + naddr);
disable_tlb(10);
return r;
}
int checkboard(void)
{
return 0;
}
static int pci_map_region(phys_addr_t paddr, phys_size_t size, ulong *pmap_addr)
{
ulong map_addr;
if (!pmap_addr)
return 0;
map_addr = *pmap_addr;
/* Align map_addr */
map_addr += size - 1;
map_addr &= ~(size - 1);
if (map_addr + size >= SYS_PCI_MAP_END)
return -1;
/* Map virtual memory for range */
assert(!tlb_map_range(map_addr, paddr, size, TLB_MAP_IO));
*pmap_addr = map_addr + size;
return 0;
}
static void platform_bus_map_region(ulong map_addr, phys_addr_t paddr,
phys_size_t size)
{
/* Align map_addr */
map_addr += size - 1;
map_addr &= ~(size - 1);
/* Map virtual memory for range */
assert(!tlb_map_range(map_addr, paddr, size, TLB_MAP_IO));
}
int misc_init_r(void)
{
struct udevice *dev;
struct pci_region *io;
struct pci_region *mem;
struct pci_region *pre;
ulong map_addr;
int ret;
/* Ensure PCI is probed */
uclass_first_device(UCLASS_PCI, &dev);
pci_get_regions(dev, &io, &mem, &pre);
/* Start MMIO and PIO range maps above RAM */
map_addr = SYS_PCI_MAP_START;
/* Map MMIO range */
ret = pci_map_region(mem->phys_start, mem->size, &map_addr);
if (ret)
return ret;
/* Map PIO range */
ret = pci_map_region(io->phys_start, io->size, &map_addr);
if (ret)
return ret;
/*
* Make sure virtio bus is enumerated so that peripherals
* on the virtio bus can be discovered by their drivers.
*/
virtio_init();
/*
* U-Boot is relocated to RAM already, let's delete the temporary FDT
* virtual-physical mapping that was used in the pre-relocation phase.
*/
disable_tlb(find_tlb_idx((void *)CFG_SYS_TMPVIRT, 1));
/*
* Detect the presence of the platform bus node, and
* create a virtual memory mapping for it.
*/
for (ret = uclass_find_first_device(UCLASS_SIMPLE_BUS, &dev);
dev;
ret = uclass_find_next_device(&dev)) {
if (device_is_compatible(dev, "qemu,platform")) {
struct simple_bus_plat *plat = dev_get_uclass_plat(dev);
platform_bus_map_region(CONFIG_PLATFORM_BUS_MAP_ADDR,
plat->target, plat->size);
break;
}
}
return 0;
}
static int last_stage_init(void)
{
void *fdt = get_fdt_virt();
int len = 0;
const uint64_t *prop;
int chosen;
chosen = fdt_path_offset(fdt, "/chosen");
if (chosen < 0) {
printf("Couldn't find /chosen node in fdt\n");
return -EIO;
}
/* -kernel boot */
prop = fdt_getprop(fdt, chosen, "qemu,boot-kernel", &len);
if (prop && (len >= 8))
env_set_hex("qemu_kernel_addr", *prop);
return 0;
}
EVENT_SPY_SIMPLE(EVT_LAST_STAGE_INIT, last_stage_init);
static uint64_t get_linear_ram_size(void)
{
void *fdt = get_fdt_virt();
const void *prop;
int memory;
int len;
memory = fdt_path_offset(fdt, "/memory");
prop = fdt_getprop(fdt, memory, "reg", &len);
if (prop && len >= 16)
return *(uint64_t *)(prop+8);
panic("Couldn't determine RAM size");
}
phys_size_t fsl_ddr_sdram_size(void)
{
return get_linear_ram_size();
}
void init_tlbs(void)
{
phys_size_t ram_size;
/*
* Create a temporary AS=1 map for the fdt
*
* We use ESEL=0 here to overwrite the previous AS=0 map for ourselves
* which was only 4k big. This way we don't have to clear any other maps.
*/
map_fdt_as(0);
/* Fetch RAM size from the fdt */
ram_size = get_linear_ram_size();
/* And remove our fdt map again */
disable_tlb(0);
/* Create an internal map of manually created TLB maps */
init_used_tlb_cams();
/* Create a dynamic AS=0 CCSRBAR mapping */
assert(!tlb_map_range(CFG_SYS_CCSRBAR, CFG_SYS_CCSRBAR_PHYS,
1024 * 1024, TLB_MAP_IO));
/* Create a RAM map that spans all accessible RAM */
setup_ddr_tlbs(ram_size >> 20);
/* Create a map for the TLB */
assert(!tlb_map_range((ulong)get_fdt_virt(), get_fdt_phys(),
1024 * 1024, TLB_MAP_RAM));
}
static uint32_t get_cpu_freq(void)
{
void *fdt = get_fdt_virt();
int cpus_node = fdt_path_offset(fdt, "/cpus");
int cpu_node = fdt_first_subnode(fdt, cpus_node);
const char *prop = "clock-frequency";
return fdt_getprop_u32_default_node(fdt, cpu_node, 0, prop, 0);
}
void get_sys_info(sys_info_t *sys_info)
{
int freq = get_cpu_freq();
memset(sys_info, 0, sizeof(sys_info_t));
sys_info->freq_systembus = freq;
sys_info->freq_ddrbus = freq;
sys_info->freq_processor[0] = freq;
}
int get_clocks(void)
{
sys_info_t sys_info;
get_sys_info(&sys_info);
gd->cpu_clk = sys_info.freq_processor[0];
gd->bus_clk = sys_info.freq_systembus;
gd->mem_clk = sys_info.freq_ddrbus;
gd->arch.lbc_clk = sys_info.freq_ddrbus;
return 0;
}
unsigned long get_tbclk(void)
{
void *fdt = get_fdt_virt();
int cpus_node = fdt_path_offset(fdt, "/cpus");
int cpu_node = fdt_first_subnode(fdt, cpus_node);
const char *prop = "timebase-frequency";
return fdt_getprop_u32_default_node(fdt, cpu_node, 0, prop, 0);
}
/********************************************
* get_bus_freq
* return system bus freq in Hz
*********************************************/
ulong get_bus_freq(ulong dummy)
{
sys_info_t sys_info;
get_sys_info(&sys_info);
return sys_info.freq_systembus;
}
/*
* Return the number of cores on this SOC.
*/
int cpu_numcores(void)
{
/*
* The QEMU u-boot target only needs to drive the first core,
* spinning and device tree nodes get driven by QEMU itself
*/
return 1;
}
/*
* Return a 32-bit mask indicating which cores are present on this SOC.
*/
u32 cpu_mask(void)
{
return (1 << cpu_numcores()) - 1;
}
/**
* Return the virtual address of FDT that was passed by QEMU
*
* Return: virtual address of FDT received from QEMU in r3 register
*/
void *board_fdt_blob_setup(int *err)
{
*err = 0;
return get_fdt_virt();
}
/* See CFG_SYS_NS16550_CLK in arch/powerpc/include/asm/config.h */
int get_serial_clock(void)
{
return get_bus_freq(0);
}
|