blob: d8f32c93b555633bcc8540e45a8b077cf6e43ef8 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
|
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2022 Microchip Technology Inc. and its subsidiaries
*
* Author: Durai Manickam KR <durai.manickamkr@microchip.com>
*/
#include <common.h>
#include <debug_uart.h>
#include <fdtdec.h>
#include <init.h>
#include <asm/arch/at91_common.h>
#include <asm/arch/at91_rstc.h>
#include <asm/arch/at91_sfr.h>
#include <asm/arch/at91sam9_smc.h>
#include <asm/arch/clk.h>
#include <asm/arch/gpio.h>
#include <asm/global_data.h>
#include <asm/io.h>
#include <asm/mach-types.h>
DECLARE_GLOBAL_DATA_PTR;
void at91_prepare_cpu_var(void);
int board_late_init(void)
{
at91_prepare_cpu_var();
return 0;
}
#ifdef CONFIG_DEBUG_UART_BOARD_INIT
void board_debug_uart_init(void)
{
at91_seriald_hw_init();
}
#endif
int board_early_init_f(void)
{
return 0;
}
#define MAC24AA_MAC_OFFSET 0xfa
#ifdef CONFIG_MISC_INIT_R
int misc_init_r(void)
{
#ifdef CONFIG_I2C_EEPROM
at91_set_ethaddr(MAC24AA_MAC_OFFSET);
#endif
return 0;
}
#endif
int board_init(void)
{
/* address of boot parameters */
gd->bd->bi_boot_params = gd->bd->bi_dram[0].start + 0x100;
return 0;
}
int dram_init_banksize(void)
{
return fdtdec_setup_memory_banksize();
}
int dram_init(void)
{
return fdtdec_setup_mem_size_base();
}
|