arch/arm/dts/stm32mp25-u-boot.dtsi


1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102

// SPDX-License-Identifier: GPL-2.0-or-later OR BSD-3-Clause
/*
 * Copyright : STMicroelectronics 2023
 */

/ {
	aliases {
		gpio0 = &gpioa;
		gpio1 = &gpiob;
		gpio2 = &gpioc;
		gpio3 = &gpiod;
		gpio4 = &gpioe;
		gpio5 = &gpiof;
		gpio6 = &gpiog;
		gpio7 = &gpioh;
		gpio8 = &gpioi;
		gpio9 = &gpioj;
		gpio10 = &gpiok;
		gpio25 = &gpioz;
		pinctrl0 = &pinctrl;
		pinctrl1 = &pinctrl_z;
	};

	firmware {
		optee {
			bootph-all;
		};
	};

	/* need PSCI for sysreset during board_f */
	psci {
		bootph-all;
	};

	soc@0 {
		bootph-all;
	};
};

&gpioa {
	bootph-all;
};

&gpiob {
	bootph-all;
};

&gpioc {
	bootph-all;
};

&gpiod {
	bootph-all;
};

&gpioe {
	bootph-all;
};

&gpiof {
	bootph-all;
};

&gpiog {
	bootph-all;
};

&gpioh {
	bootph-all;
};

&gpioi {
	bootph-all;
};

&gpioj {
	bootph-all;
};

&gpiok {
	bootph-all;
};

&gpioz {
	bootph-all;
};

&pinctrl {
	bootph-all;
};

&rifsc {
	bootph-all;
};

&scmi_clk {
	bootph-all;
};

&syscfg {
	bootph-all;
};