From 88718be3001055fa2801a44ab10570279b3f2cb7 Mon Sep 17 00:00:00 2001 From: Miquel Raynal Date: Thu, 3 Oct 2019 19:50:03 +0200 Subject: mtd: rename CONFIG_NAND -> CONFIG_MTD_RAW_NAND Add more clarity by changing the Kconfig entry name. Signed-off-by: Miquel Raynal [trini: Re-run migration, update a few more cases] Signed-off-by: Tom Rini Reviewed-by: Boris Brezillon --- include/configs/B4860QDS.h | 6 +++--- include/configs/BSC9131RDB.h | 4 ++-- include/configs/BSC9132QDS.h | 6 +++--- include/configs/C29XPCIE.h | 8 ++++---- include/configs/P1010RDB.h | 10 +++++----- include/configs/P1022DS.h | 11 +++++------ include/configs/P2041RDB.h | 4 ++-- include/configs/T102xQDS.h | 6 +++--- include/configs/T102xRDB.h | 6 +++--- include/configs/T1040QDS.h | 4 ++-- include/configs/T104xRDB.h | 12 ++++++------ include/configs/T208xQDS.h | 6 +++--- include/configs/T208xRDB.h | 6 +++--- include/configs/T4240QDS.h | 8 ++++---- include/configs/T4240RDB.h | 4 ++-- include/configs/am335x_evm.h | 6 +++--- include/configs/am335x_guardian.h | 4 ++-- include/configs/am3517_evm.h | 6 +++--- include/configs/am43xx_evm.h | 6 +++--- include/configs/baltos.h | 6 +++--- include/configs/bav335x.h | 8 ++++---- include/configs/broadcom_bcm963158.h | 4 ++-- include/configs/broadcom_bcm968380gerg.h | 4 ++-- include/configs/broadcom_bcm968580xref.h | 4 ++-- include/configs/brppt1.h | 16 ++++++++-------- include/configs/comtrend_vr3032u.h | 4 ++-- include/configs/corenet_ds.h | 6 +++--- include/configs/da850evm.h | 4 ++-- include/configs/dra7xx_evm.h | 4 ++-- include/configs/ls2080ardb.h | 2 +- include/configs/omap3_beagle.h | 10 +++++----- include/configs/omap3_evm.h | 10 +++++----- include/configs/omap3_logic.h | 2 +- include/configs/omap3_overo.h | 6 +++--- include/configs/omap3_pandora.h | 2 +- include/configs/omapl138_lcdk.h | 2 +- include/configs/p1_p2_rdb_pc.h | 8 ++++---- include/configs/phycore_am335x_r2.h | 6 +++--- include/configs/siemens-am33x-common.h | 2 +- include/configs/ti_armv7_common.h | 2 +- include/configs/ti_armv7_omap.h | 2 +- include/configs/ti_omap3_common.h | 2 +- include/environment/ti/dfu.h | 2 +- include/environment/ti/nand.h | 2 +- 44 files changed, 121 insertions(+), 122 deletions(-) (limited to 'include') diff --git a/include/configs/B4860QDS.h b/include/configs/B4860QDS.h index d213375..1a34b95 100644 --- a/include/configs/B4860QDS.h +++ b/include/configs/B4860QDS.h @@ -12,7 +12,7 @@ #ifdef CONFIG_RAMBOOT_PBL #define CONFIG_SYS_FSL_PBL_PBI $(SRCTREE)/board/freescale/b4860qds/b4_pbi.cfg #define CONFIG_SYS_FSL_PBL_RCW $(SRCTREE)/board/freescale/b4860qds/b4_rcw.cfg -#ifndef CONFIG_NAND +#ifndef CONFIG_MTD_RAW_NAND #define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc #else @@ -309,7 +309,7 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024) -#if defined(CONFIG_NAND) +#if defined(CONFIG_MTD_RAW_NAND) #define CONFIG_SYS_CSPR0_EXT CONFIG_SYS_NAND_CSPR_EXT #define CONFIG_SYS_CSPR0 CONFIG_SYS_NAND_CSPR #define CONFIG_SYS_AMASK0 CONFIG_SYS_NAND_AMASK @@ -567,7 +567,7 @@ unsigned long get_board_ddr_clk(void); * 0x2000 (16 blocks), 8 + 1089 + 16 = 1113, enlarge it to 1130. */ #define CONFIG_SYS_FMAN_FW_ADDR (512 * 1130) -#elif defined(CONFIG_NAND) +#elif defined(CONFIG_MTD_RAW_NAND) #define CONFIG_SYS_FMAN_FW_ADDR (13 * CONFIG_SYS_NAND_BLOCK_SIZE) #elif defined(CONFIG_SRIO_PCIE_BOOT_SLAVE) /* diff --git a/include/configs/BSC9131RDB.h b/include/configs/BSC9131RDB.h index cd8589f..31879f8 100644 --- a/include/configs/BSC9131RDB.h +++ b/include/configs/BSC9131RDB.h @@ -18,7 +18,7 @@ #define CONFIG_RESET_VECTOR_ADDRESS 0x110bfffc #endif -#ifdef CONFIG_NAND +#ifdef CONFIG_MTD_RAW_NAND #define CONFIG_SPL_INIT_MINIMAL #define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" @@ -250,7 +250,7 @@ extern unsigned long get_sdram_size(void); * Environment */ #if defined(CONFIG_RAMBOOT_SPIFLASH) -#elif defined(CONFIG_NAND) +#elif defined(CONFIG_MTD_RAW_NAND) #define CONFIG_ENV_RANGE (3 * CONFIG_ENV_SIZE) #endif diff --git a/include/configs/BSC9132QDS.h b/include/configs/BSC9132QDS.h index 58841d5..4fc64a8 100644 --- a/include/configs/BSC9132QDS.h +++ b/include/configs/BSC9132QDS.h @@ -26,7 +26,7 @@ #define CONFIG_RESET_VECTOR_ADDRESS 0x110bfffc #endif -#ifdef CONFIG_NAND +#ifdef CONFIG_MTD_RAW_NAND #define CONFIG_SPL_INIT_MINIMAL #define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" @@ -307,7 +307,7 @@ combinations. this should be removed later #endif /* Set up IFC registers for boot location NOR/NAND */ -#if defined(CONFIG_NAND) || defined(CONFIG_NAND_SECBOOT) +#if defined(CONFIG_MTD_RAW_NAND) || defined(CONFIG_NAND_SECBOOT) #define CONFIG_SYS_CSPR0 CONFIG_SYS_NAND_CSPR #define CONFIG_SYS_AMASK0 CONFIG_SYS_NAND_AMASK #define CONFIG_SYS_CSOR0 CONFIG_SYS_NAND_CSOR @@ -448,7 +448,7 @@ combinations. this should be removed later #if defined(CONFIG_RAMBOOT_SDCARD) #define CONFIG_FSL_FIXED_MMC_LOCATION #define CONFIG_SYS_MMC_ENV_DEV 0 -#elif defined(CONFIG_NAND) || defined(CONFIG_NAND_SECBOOT) +#elif defined(CONFIG_MTD_RAW_NAND) || defined(CONFIG_NAND_SECBOOT) #define CONFIG_ENV_RANGE (3 * CONFIG_ENV_SIZE) #endif diff --git a/include/configs/C29XPCIE.h b/include/configs/C29XPCIE.h index dea196d..d21537c 100644 --- a/include/configs/C29XPCIE.h +++ b/include/configs/C29XPCIE.h @@ -15,7 +15,7 @@ #define CONFIG_RESET_VECTOR_ADDRESS 0x110bfffc #endif -#ifdef CONFIG_NAND +#ifdef CONFIG_MTD_RAW_NAND #ifdef CONFIG_TPL_BUILD #define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_NAND_INIT @@ -215,7 +215,7 @@ #define CONFIG_SYS_NAND_DDR_LAW 11 /* Set up IFC registers for boot location NOR/NAND */ -#ifdef CONFIG_NAND +#ifdef CONFIG_MTD_RAW_NAND #define CONFIG_SYS_CSPR0 CONFIG_SYS_NAND_CSPR #define CONFIG_SYS_AMASK0 CONFIG_SYS_NAND_AMASK #define CONFIG_SYS_CSOR0 CONFIG_SYS_NAND_CSOR @@ -300,7 +300,7 @@ #define CONFIG_SPL_RELOC_MALLOC_ADDR (CONFIG_SYS_INIT_L2_ADDR + 160 * 1024) #define CONFIG_SPL_RELOC_MALLOC_SIZE (96 << 10) #define CONFIG_SPL_GD_ADDR (CONFIG_SYS_INIT_L2_ADDR + 112 * 1024) -#elif defined(CONFIG_NAND) +#elif defined(CONFIG_MTD_RAW_NAND) #ifdef CONFIG_TPL_BUILD #define CONFIG_SYS_INIT_L2_ADDR 0xf8f80000 #define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR @@ -375,7 +375,7 @@ * Environment */ #if defined(CONFIG_SYS_RAMBOOT) -#elif defined(CONFIG_NAND) +#elif defined(CONFIG_MTD_RAW_NAND) #ifdef CONFIG_TPL_BUILD #define SPL_ENV_ADDR (CONFIG_SYS_INIT_L2_ADDR + (160 << 10)) #else diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index 9244fee..60e8904 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -49,7 +49,7 @@ #endif #endif -#ifdef CONFIG_NAND +#ifdef CONFIG_MTD_RAW_NAND #ifdef CONFIG_NXP_ESBC #define CONFIG_SPL_INIT_MINIMAL #define CONFIG_SPL_FLUSH_IMAGE @@ -388,7 +388,7 @@ extern unsigned long get_sdram_size(void); #define CONFIG_SYS_NAND_DDR_LAW 11 /* Set up IFC registers for boot location NOR/NAND */ -#if defined(CONFIG_NAND) || defined(CONFIG_NAND_SECBOOT) +#if defined(CONFIG_MTD_RAW_NAND) || defined(CONFIG_NAND_SECBOOT) #define CONFIG_SYS_CSPR0 CONFIG_SYS_NAND_CSPR #define CONFIG_SYS_AMASK0 CONFIG_SYS_NAND_AMASK #define CONFIG_SYS_CSOR0 CONFIG_SYS_NAND_CSOR @@ -484,7 +484,7 @@ extern unsigned long get_sdram_size(void); #define CONFIG_SPL_RELOC_MALLOC_ADDR (CONFIG_SYS_INIT_L2_ADDR + 128 * 1024) #define CONFIG_SPL_RELOC_MALLOC_SIZE (128 << 10) #define CONFIG_SPL_GD_ADDR (CONFIG_SYS_INIT_L2_ADDR + 96 * 1024) -#elif defined(CONFIG_NAND) +#elif defined(CONFIG_MTD_RAW_NAND) #ifdef CONFIG_TPL_BUILD #define CONFIG_SYS_INIT_L2_ADDR 0xD0000000 #define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR @@ -558,7 +558,7 @@ extern unsigned long get_sdram_size(void); * SPI interface will not be available in case of NAND boot SPI CS0 will be * used for SLIC */ -#if !defined(CONFIG_NAND) || !defined(CONFIG_NAND_SECBOOT) +#if !defined(CONFIG_MTD_RAW_NAND) || !defined(CONFIG_NAND_SECBOOT) /* eSPI - Enhanced SPI */ #endif @@ -629,7 +629,7 @@ extern unsigned long get_sdram_size(void); #if defined(CONFIG_SDCARD) #define CONFIG_FSL_FIXED_MMC_LOCATION #define CONFIG_SYS_MMC_ENV_DEV 0 -#elif defined(CONFIG_NAND) +#elif defined(CONFIG_MTD_RAW_NAND) #ifdef CONFIG_TPL_BUILD #define SPL_ENV_ADDR (CONFIG_SYS_INIT_L2_ADDR + (160 << 10)) #else diff --git a/include/configs/P1022DS.h b/include/configs/P1022DS.h index db4b94e..5cc2e06 100644 --- a/include/configs/P1022DS.h +++ b/include/configs/P1022DS.h @@ -45,7 +45,7 @@ #define CONFIG_SYS_NAND_MAX_ECCPOS 56 #define CONFIG_SYS_NAND_MAX_OOBFREE 5 -#ifdef CONFIG_NAND +#ifdef CONFIG_MTD_RAW_NAND #ifdef CONFIG_TPL_BUILD #define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_NAND_INIT @@ -187,7 +187,7 @@ (BR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS) | BR_PS_16 | BR_V) #define CONFIG_FLASH_OR_PRELIM (OR_AM_128MB | 0xff7) -#ifdef CONFIG_NAND +#ifdef CONFIG_MTD_RAW_NAND #define CONFIG_SYS_BR1_PRELIM CONFIG_FLASH_BR_PRELIM /* NOR Base Address */ #define CONFIG_SYS_OR1_PRELIM CONFIG_FLASH_OR_PRELIM /* NOR Options */ #else @@ -242,7 +242,7 @@ | OR_FCM_SCY_1 \ | OR_FCM_TRLX \ | OR_FCM_EHTR) -#ifdef CONFIG_NAND +#ifdef CONFIG_MTD_RAW_NAND #define CONFIG_SYS_BR0_PRELIM CONFIG_SYS_NAND_BR_PRELIM /* NAND Base Address */ #define CONFIG_SYS_OR0_PRELIM CONFIG_SYS_NAND_OR_PRELIM /* NAND Options */ #else @@ -298,7 +298,7 @@ #define CONFIG_SPL_RELOC_MALLOC_ADDR (CONFIG_SYS_INIT_L2_ADDR + 148 * 1024) #define CONFIG_SPL_RELOC_MALLOC_SIZE (108 << 10) #define CONFIG_SPL_GD_ADDR (CONFIG_SYS_INIT_L2_ADDR + 112 * 1024) -#elif defined(CONFIG_NAND) +#elif defined(CONFIG_MTD_RAW_NAND) #ifdef CONFIG_TPL_BUILD #define CONFIG_SYS_INIT_L2_ADDR 0xf8f80000 #define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR @@ -495,8 +495,7 @@ #if defined(CONFIG_SDCARD) #define CONFIG_FSL_FIXED_MMC_LOCATION #define CONFIG_SYS_MMC_ENV_DEV 0 -#elif defined(CONFIG_NAND) -#define CONFIG_ENV_RANGE (3 * CONFIG_ENV_SIZE) +#elif defined(CONFIG_MTD_RAW_NAND) #ifdef CONFIG_TPL_BUILD #define SPL_ENV_ADDR (CONFIG_SYS_INIT_L2_ADDR + (160 << 10)) #endif diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index d0a935c..f6472b9 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -203,7 +203,7 @@ unsigned long get_board_sys_clk(unsigned long dummy); | OR_FCM_TRLX \ | OR_FCM_EHTR) -#ifdef CONFIG_NAND +#ifdef CONFIG_MTD_RAW_NAND #define CONFIG_SYS_BR0_PRELIM CONFIG_SYS_NAND_BR_PRELIM /* NAND Base Address */ #define CONFIG_SYS_OR0_PRELIM CONFIG_SYS_NAND_OR_PRELIM /* NAND Options */ #define CONFIG_SYS_BR1_PRELIM CONFIG_SYS_FLASH_BR_PRELIM /* NOR Base Address */ @@ -401,7 +401,7 @@ unsigned long get_board_sys_clk(unsigned long dummy); * 0x2000 (16 blocks), 8 + 1650 + 16 = 1674, enlarge it to 1680. */ #define CONFIG_SYS_FMAN_FW_ADDR (512 * 1680) -#elif defined(CONFIG_NAND) +#elif defined(CONFIG_MTD_RAW_NAND) #define CONFIG_SYS_FMAN_FW_ADDR (8 * CONFIG_SYS_NAND_BLOCK_SIZE) #elif defined(CONFIG_SRIO_PCIE_BOOT_SLAVE) /* diff --git a/include/configs/T102xQDS.h b/include/configs/T102xQDS.h index c6b88c1..8ac260c 100644 --- a/include/configs/T102xQDS.h +++ b/include/configs/T102xQDS.h @@ -39,7 +39,7 @@ #define CONFIG_SYS_CCSR_DO_NOT_RELOCATE #endif -#ifdef CONFIG_NAND +#ifdef CONFIG_MTD_RAW_NAND #define CONFIG_SYS_NAND_U_BOOT_SIZE (768 << 10) #define CONFIG_SYS_NAND_U_BOOT_DST 0x00200000 #define CONFIG_SYS_NAND_U_BOOT_START 0x00200000 @@ -317,7 +317,7 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024) -#if defined(CONFIG_NAND) +#if defined(CONFIG_MTD_RAW_NAND) #define CONFIG_SYS_CSPR0_EXT CONFIG_SYS_NAND_CSPR_EXT #define CONFIG_SYS_CSPR0 CONFIG_SYS_NAND_CSPR #define CONFIG_SYS_AMASK0 CONFIG_SYS_NAND_AMASK @@ -632,7 +632,7 @@ unsigned long get_board_ddr_clk(void); */ #define CONFIG_SYS_FMAN_FW_ADDR (512 * 0x820) #define CONFIG_SYS_QE_FW_ADDR (512 * 0x920) -#elif defined(CONFIG_NAND) +#elif defined(CONFIG_MTD_RAW_NAND) #define CONFIG_SYS_FMAN_FW_ADDR (11 * CONFIG_SYS_NAND_BLOCK_SIZE) #define CONFIG_SYS_QE_FW_ADDR (12 * CONFIG_SYS_NAND_BLOCK_SIZE) #elif defined(CONFIG_SRIO_PCIE_BOOT_SLAVE) diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h index 88a6f03..43897a7 100644 --- a/include/configs/T102xRDB.h +++ b/include/configs/T102xRDB.h @@ -42,7 +42,7 @@ #define CONFIG_SYS_CCSR_DO_NOT_RELOCATE #endif -#ifdef CONFIG_NAND +#ifdef CONFIG_MTD_RAW_NAND #define CONFIG_SYS_NAND_U_BOOT_SIZE (768 << 10) #define CONFIG_SYS_NAND_U_BOOT_DST 0x30000000 #define CONFIG_SYS_NAND_U_BOOT_START 0x30000000 @@ -333,7 +333,7 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE } #define CONFIG_SYS_MAX_NAND_DEVICE 1 -#if defined(CONFIG_NAND) +#if defined(CONFIG_MTD_RAW_NAND) #define CONFIG_SYS_CSPR0_EXT CONFIG_SYS_NAND_CSPR_EXT #define CONFIG_SYS_CSPR0 CONFIG_SYS_NAND_CSPR #define CONFIG_SYS_AMASK0 CONFIG_SYS_NAND_AMASK @@ -584,7 +584,7 @@ unsigned long get_board_ddr_clk(void); */ #define CONFIG_SYS_FMAN_FW_ADDR (512 * 0x820) #define CONFIG_SYS_QE_FW_ADDR (512 * 0x920) -#elif defined(CONFIG_NAND) +#elif defined(CONFIG_MTD_RAW_NAND) #if defined(CONFIG_TARGET_T1024RDB) #define CONFIG_SYS_FMAN_FW_ADDR (3 * CONFIG_SYS_NAND_BLOCK_SIZE) #define CONFIG_SYS_QE_FW_ADDR (4 * CONFIG_SYS_NAND_BLOCK_SIZE) diff --git a/include/configs/T1040QDS.h b/include/configs/T1040QDS.h index 2881ee9..b845698 100644 --- a/include/configs/T1040QDS.h +++ b/include/configs/T1040QDS.h @@ -249,7 +249,7 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024) -#if defined(CONFIG_NAND) +#if defined(CONFIG_MTD_RAW_NAND) #define CONFIG_SYS_CSPR0_EXT CONFIG_SYS_NAND_CSPR_EXT #define CONFIG_SYS_CSPR0 CONFIG_SYS_NAND_CSPR #define CONFIG_SYS_AMASK0 CONFIG_SYS_NAND_AMASK @@ -530,7 +530,7 @@ unsigned long get_board_ddr_clk(void); * 0x2000 (16 blocks), 8 + 1650 + 16 = 1674, enlarge it to 1680. */ #define CONFIG_SYS_FMAN_FW_ADDR (512 * 1680) -#elif defined(CONFIG_NAND) +#elif defined(CONFIG_MTD_RAW_NAND) #define CONFIG_SYS_FMAN_FW_ADDR (8 * CONFIG_SYS_NAND_BLOCK_SIZE) #else #define CONFIG_SYS_FMAN_FW_ADDR 0xEFF00000 diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index a8e51e7..50b37ac 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -31,7 +31,7 @@ #define RESET_VECTOR_OFFSET 0x27FFC #define BOOT_PAGE_OFFSET 0x27000 -#ifdef CONFIG_NAND +#ifdef CONFIG_MTD_RAW_NAND #ifdef CONFIG_NXP_ESBC #define CONFIG_U_BOOT_HDR_SIZE (16 << 10) /* @@ -157,7 +157,7 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_sd_rcw.cfg #if defined(CONFIG_SPIFLASH) #elif defined(CONFIG_SDCARD) #define CONFIG_SYS_MMC_ENV_DEV 0 -#elif defined(CONFIG_NAND) +#elif defined(CONFIG_MTD_RAW_NAND) #ifdef CONFIG_NXP_ESBC #define CONFIG_RAMBOOT_NAND #define CONFIG_BOOTSCRIPT_COPY_RAM @@ -357,7 +357,7 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_sd_rcw.cfg #define CONFIG_SYS_NAND_BLOCK_SIZE (512 * 1024) -#if defined(CONFIG_NAND) +#if defined(CONFIG_MTD_RAW_NAND) #define CONFIG_SYS_CSPR0_EXT CONFIG_SYS_NAND_CSPR_EXT #define CONFIG_SYS_CSPR0 CONFIG_SYS_NAND_CSPR #define CONFIG_SYS_AMASK0 CONFIG_SYS_NAND_AMASK @@ -404,7 +404,7 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_sd_rcw.cfg #endif #ifdef CONFIG_SYS_FSL_ERRATUM_A008044 -#if defined(CONFIG_NAND) +#if defined(CONFIG_MTD_RAW_NAND) #define CONFIG_A008044_WORKAROUND #endif #endif @@ -634,7 +634,7 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_sd_rcw.cfg * 0x2000 (16 blocks), 8 + 2048 + 16 = 2072, enlarge it to 2080. */ #define CONFIG_SYS_FMAN_FW_ADDR (512 * 0x820) -#elif defined(CONFIG_NAND) +#elif defined(CONFIG_MTD_RAW_NAND) #define CONFIG_SYS_FMAN_FW_ADDR (5 * CONFIG_SYS_NAND_BLOCK_SIZE) #else #define CONFIG_SYS_FMAN_FW_ADDR 0xEFF00000 @@ -644,7 +644,7 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_sd_rcw.cfg #define CONFIG_SYS_QE_FW_ADDR 0x130000 #elif defined(CONFIG_SDCARD) #define CONFIG_SYS_QE_FW_ADDR (512 * 0x920) -#elif defined(CONFIG_NAND) +#elif defined(CONFIG_MTD_RAW_NAND) #define CONFIG_SYS_QE_FW_ADDR (7 * CONFIG_SYS_NAND_BLOCK_SIZE) #else #define CONFIG_SYS_QE_FW_ADDR 0xEFF10000 diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index f485e4e..2078b9d 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -46,7 +46,7 @@ #define CONFIG_SYS_CCSR_DO_NOT_RELOCATE #endif -#ifdef CONFIG_NAND +#ifdef CONFIG_MTD_RAW_NAND #define CONFIG_SYS_NAND_U_BOOT_SIZE (768 << 10) #define CONFIG_SYS_NAND_U_BOOT_DST 0x00200000 #define CONFIG_SYS_NAND_U_BOOT_START 0x00200000 @@ -288,7 +288,7 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024) -#if defined(CONFIG_NAND) +#if defined(CONFIG_MTD_RAW_NAND) #define CONFIG_SYS_CSPR0_EXT CONFIG_SYS_NAND_CSPR_EXT #define CONFIG_SYS_CSPR0 CONFIG_SYS_NAND_CSPR #define CONFIG_SYS_AMASK0 CONFIG_SYS_NAND_AMASK @@ -568,7 +568,7 @@ unsigned long get_board_ddr_clk(void); * 0x2000 (16 blocks), 8 + 2048 + 16 = 2072, enlarge it to 2080. */ #define CONFIG_SYS_FMAN_FW_ADDR (512 * 0x820) -#elif defined(CONFIG_NAND) +#elif defined(CONFIG_MTD_RAW_NAND) #define CONFIG_SYS_FMAN_FW_ADDR (11 * CONFIG_SYS_NAND_BLOCK_SIZE) #elif defined(CONFIG_SRIO_PCIE_BOOT_SLAVE) /* diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index 8c0b81a..68de90f 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -40,7 +40,7 @@ #define CONFIG_SYS_CCSR_DO_NOT_RELOCATE #endif -#ifdef CONFIG_NAND +#ifdef CONFIG_MTD_RAW_NAND #define CONFIG_SYS_NAND_U_BOOT_SIZE (768 << 10) #define CONFIG_SYS_NAND_U_BOOT_DST 0x00200000 #define CONFIG_SYS_NAND_U_BOOT_START 0x00200000 @@ -252,7 +252,7 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BLOCK_SIZE (512 * 1024) -#if defined(CONFIG_NAND) +#if defined(CONFIG_MTD_RAW_NAND) #define CONFIG_SYS_CSPR0_EXT CONFIG_SYS_NAND_CSPR_EXT #define CONFIG_SYS_CSPR0 CONFIG_SYS_NAND_CSPR #define CONFIG_SYS_AMASK0 CONFIG_SYS_NAND_AMASK @@ -514,7 +514,7 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_FMAN_FW_ADDR (512 * 0x820) #define CONFIG_CORTINA_FW_ADDR (512 * 0x8a0) -#elif defined(CONFIG_NAND) +#elif defined(CONFIG_MTD_RAW_NAND) #define CONFIG_SYS_FMAN_FW_ADDR (3 * CONFIG_SYS_NAND_BLOCK_SIZE) #define CONFIG_CORTINA_FW_ADDR (4 * CONFIG_SYS_NAND_BLOCK_SIZE) #elif defined(CONFIG_SRIO_PCIE_BOOT_SLAVE) diff --git a/include/configs/T4240QDS.h b/include/configs/T4240QDS.h index a7ef469..94e0ddb 100644 --- a/include/configs/T4240QDS.h +++ b/include/configs/T4240QDS.h @@ -16,7 +16,7 @@ #ifdef CONFIG_RAMBOOT_PBL #define CONFIG_SYS_FSL_PBL_PBI board/freescale/t4qds/t4_pbi.cfg -#if !defined(CONFIG_NAND) && !defined(CONFIG_SDCARD) +#if !defined(CONFIG_MTD_RAW_NAND) && !defined(CONFIG_SDCARD) #define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc #else @@ -26,7 +26,7 @@ #define RESET_VECTOR_OFFSET 0x27FFC #define BOOT_PAGE_OFFSET 0x27000 -#ifdef CONFIG_NAND +#ifdef CONFIG_MTD_RAW_NAND #define CONFIG_SYS_NAND_U_BOOT_SIZE (768 << 10) #define CONFIG_SYS_NAND_U_BOOT_DST 0x00200000 #define CONFIG_SYS_NAND_U_BOOT_START 0x00200000 @@ -223,7 +223,7 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_NAND_MAX_OOBFREE 2 #define CONFIG_SYS_NAND_MAX_ECCPOS 256 -#if defined(CONFIG_NAND) +#if defined(CONFIG_MTD_RAW_NAND) #define CONFIG_SYS_CSPR0_EXT CONFIG_SYS_NAND_CSPR_EXT #define CONFIG_SYS_CSPR0 CONFIG_SYS_NAND_CSPR #define CONFIG_SYS_AMASK0 CONFIG_SYS_NAND_AMASK @@ -385,7 +385,7 @@ unsigned long get_board_ddr_clk(void); * 0x2000 (16 blocks), 8 + 2048 + 16 = 2072, enlarge it to 2080. */ #define CONFIG_SYS_FMAN_FW_ADDR (512 * 0x820) -#elif defined(CONFIG_NAND) +#elif defined(CONFIG_MTD_RAW_NAND) #define CONFIG_SYS_FMAN_FW_ADDR (11 * CONFIG_SYS_NAND_BLOCK_SIZE) #elif defined(CONFIG_SRIO_PCIE_BOOT_SLAVE) /* diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h index 493da70..042757c 100644 --- a/include/configs/T4240RDB.h +++ b/include/configs/T4240RDB.h @@ -386,7 +386,7 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_NAND_BLOCK_SIZE (512 * 1024) -#if defined(CONFIG_NAND) +#if defined(CONFIG_MTD_RAW_NAND) #define CONFIG_SYS_CSPR0_EXT CONFIG_SYS_NAND_CSPR_EXT #define CONFIG_SYS_CSPR0 CONFIG_SYS_NAND_CSPR #define CONFIG_SYS_AMASK0 CONFIG_SYS_NAND_AMASK @@ -536,7 +536,7 @@ unsigned long get_board_ddr_clk(void); * 0x2000 (16 blocks), 8 + 2048 + 16 = 2072, enlarge it to 2080. */ #define CONFIG_SYS_FMAN_FW_ADDR (512 * 0x820) -#elif defined(CONFIG_NAND) +#elif defined(CONFIG_MTD_RAW_NAND) #define CONFIG_SYS_FMAN_FW_ADDR (8 * CONFIG_SYS_NAND_BLOCK_SIZE) #else #define CONFIG_SYS_FMAN_FW_ADDR 0xEFF00000 diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h index 085b2bc..f2f1004 100644 --- a/include/configs/am335x_evm.h +++ b/include/configs/am335x_evm.h @@ -31,7 +31,7 @@ #define V_OSCK 24000000 /* Clock output from T2 */ #define V_SCLK (V_OSCK) -#ifdef CONFIG_NAND +#ifdef CONFIG_MTD_RAW_NAND #define NANDARGS \ "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \ "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ @@ -193,7 +193,7 @@ /* USB gadget RNDIS */ #endif -#ifdef CONFIG_NAND +#ifdef CONFIG_MTD_RAW_NAND /* NAND: device related configs */ #define CONFIG_SYS_NAND_5_ADDR_CYCLE #define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \ @@ -220,7 +220,7 @@ #ifdef CONFIG_SPL_OS_BOOT #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x00200000 /* kernel offset */ #endif -#endif /* !CONFIG_NAND */ +#endif /* !CONFIG_MTD_RAW_NAND */ /* * For NOR boot, we must set this to the start of where NOR is mapped diff --git a/include/configs/am335x_guardian.h b/include/configs/am335x_guardian.h index b45b8d2..0e20d6c 100644 --- a/include/configs/am335x_guardian.h +++ b/include/configs/am335x_guardian.h @@ -68,7 +68,7 @@ /* Bootcount using the RTC block */ #define CONFIG_SYS_BOOTCOUNT_LE -#ifdef CONFIG_NAND +#ifdef CONFIG_MTD_RAW_NAND #define CONFIG_SYS_NAND_5_ADDR_CYCLE #define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \ @@ -107,6 +107,6 @@ #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS -#endif /* CONFIG_NAND */ +#endif /* CONFIG_MTD_RAW_NAND */ #endif /* ! __CONFIG_AM335X_GUARDIAN_H */ diff --git a/include/configs/am3517_evm.h b/include/configs/am3517_evm.h index 05ee21b..89c82ce 100644 --- a/include/configs/am3517_evm.h +++ b/include/configs/am3517_evm.h @@ -42,7 +42,7 @@ #define CONFIG_NET_RETRY_COUNT 10 /* Board NAND Info. */ -#ifdef CONFIG_NAND +#ifdef CONFIG_MTD_RAW_NAND #define CONFIG_SYS_NAND_5_ADDR_CYCLE #define CONFIG_SYS_NAND_PAGE_COUNT 64 #define CONFIG_SYS_NAND_PAGE_SIZE 2048 @@ -73,7 +73,7 @@ * DTB 4 * NAND_BLOCK_SIZE = 512 KiB @ 0xAA0000 * RootFS Remaining Flash Space @ 0xB20000 */ -#endif /* CONFIG_NAND */ +#endif /* CONFIG_MTD_RAW_NAND */ /* Environment information */ @@ -168,7 +168,7 @@ #define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of flash banks */ #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */ -#if defined(CONFIG_NAND) +#if defined(CONFIG_MTD_RAW_NAND) #define CONFIG_SYS_FLASH_BASE NAND_BASE #endif diff --git a/include/configs/am43xx_evm.h b/include/configs/am43xx_evm.h index 4870832..4a2c39c 100644 --- a/include/configs/am43xx_evm.h +++ b/include/configs/am43xx_evm.h @@ -203,7 +203,7 @@ #define CONFIG_SYS_RX_ETH_BUFFER 64 /* NAND support */ -#ifdef CONFIG_NAND +#ifdef CONFIG_MTD_RAW_NAND /* NAND: device related configs */ #define CONFIG_SYS_NAND_PAGE_SIZE 4096 #define CONFIG_SYS_NAND_OOBSIZE 224 @@ -260,10 +260,10 @@ "nand read ${loadaddr} NAND.kernel; " \ "bootz ${loadaddr} - ${fdtaddr}\0" #define NANDBOOT "run nandboot; " -#else /* !CONFIG_NAND */ +#else /* !CONFIG_MTD_RAW_NAND */ #define NANDARGS #define NANDBOOT -#endif /* CONFIG_NAND */ +#endif /* CONFIG_MTD_RAW_NAND */ #if defined(CONFIG_TI_SECURE_DEVICE) /* Avoid relocating onto firewalled area at end of DRAM */ diff --git a/include/configs/baltos.h b/include/configs/baltos.h index a9b14c5..42a5abd 100644 --- a/include/configs/baltos.h +++ b/include/configs/baltos.h @@ -28,7 +28,7 @@ /* FIT support */ #define CONFIG_SYS_BOOTM_LEN SZ_64M -#ifdef CONFIG_NAND +#ifdef CONFIG_MTD_RAW_NAND #define NANDARGS \ "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \ @@ -214,7 +214,7 @@ /* SPL */ #ifndef CONFIG_NOR_BOOT -#ifdef CONFIG_NAND +#ifdef CONFIG_MTD_RAW_NAND #define CONFIG_SYS_NAND_5_ADDR_CYCLE #define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \ CONFIG_SYS_NAND_PAGE_SIZE) @@ -251,7 +251,7 @@ #define CONFIG_AM335X_USB1_MODE MUSB_OTG /* NAND support */ -#ifdef CONFIG_NAND +#ifdef CONFIG_MTD_RAW_NAND #define GPMC_NAND_ECC_LP_x8_LAYOUT 1 #endif diff --git a/include/configs/bav335x.h b/include/configs/bav335x.h index a31b71e..297800e 100644 --- a/include/configs/bav335x.h +++ b/include/configs/bav335x.h @@ -31,7 +31,7 @@ #define V_OSCK 24000000 /* Clock output from T2 */ #define V_SCLK (V_OSCK) -#ifdef CONFIG_NAND +#ifdef CONFIG_MTD_RAW_NAND #define NANDARGS \ "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \ "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ @@ -336,7 +336,7 @@ DEFAULT_LINUX_BOOT_ENV \ /* USB gadget RNDIS */ #endif -#ifdef CONFIG_NAND +#ifdef CONFIG_MTD_RAW_NAND /* NAND: device related configs */ #define CONFIG_SYS_NAND_5_ADDR_CYCLE #define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \ @@ -365,7 +365,7 @@ DEFAULT_LINUX_BOOT_ENV \ #ifdef CONFIG_SPL_OS_BOOT #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x00200000 /* kernel offset */ #endif -#endif /* !CONFIG_NAND */ +#endif /* !CONFIG_MTD_RAW_NAND */ /* * For NOR boot, we must set this to the start of where NOR is mapped @@ -404,7 +404,7 @@ DEFAULT_LINUX_BOOT_ENV \ "spl-os-image fat 0 1;" \ "u-boot.img fat 0 1;" \ "uEnv.txt fat 0 1\0" -#ifdef CONFIG_NAND +#ifdef CONFIG_MTD_RAW_NAND #define DFU_ALT_INFO_NAND \ "dfu_alt_info_nand=" \ "SPL part 0 1;" \ diff --git a/include/configs/broadcom_bcm963158.h b/include/configs/broadcom_bcm963158.h index f73ee25..238ae9c 100644 --- a/include/configs/broadcom_bcm963158.h +++ b/include/configs/broadcom_bcm963158.h @@ -30,11 +30,11 @@ #define CONFIG_SKIP_LOWLEVEL_INIT -#ifdef CONFIG_NAND +#ifdef CONFIG_MTD_RAW_NAND #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_SELF_INIT #define CONFIG_SYS_NAND_ONFI_DETECTION -#endif /* CONFIG_NAND */ +#endif /* CONFIG_MTD_RAW_NAND */ /* * bcm963158 diff --git a/include/configs/broadcom_bcm968380gerg.h b/include/configs/broadcom_bcm968380gerg.h index a1c54cf..8d572f6 100644 --- a/include/configs/broadcom_bcm968380gerg.h +++ b/include/configs/broadcom_bcm968380gerg.h @@ -6,8 +6,8 @@ #include #include -#ifdef CONFIG_NAND +#ifdef CONFIG_MTD_RAW_NAND #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_SELF_INIT #define CONFIG_SYS_NAND_ONFI_DETECTION -#endif /* CONFIG_NAND */ +#endif /* CONFIG_MTD_RAW_NAND */ diff --git a/include/configs/broadcom_bcm968580xref.h b/include/configs/broadcom_bcm968580xref.h index 9561518..febe6c0 100644 --- a/include/configs/broadcom_bcm968580xref.h +++ b/include/configs/broadcom_bcm968580xref.h @@ -29,11 +29,11 @@ #define CONFIG_SKIP_LOWLEVEL_INIT -#ifdef CONFIG_NAND +#ifdef CONFIG_MTD_RAW_NAND #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_SELF_INIT #define CONFIG_SYS_NAND_ONFI_DETECTION -#endif /* CONFIG_NAND */ +#endif /* CONFIG_MTD_RAW_NAND */ /* * 968580xref diff --git a/include/configs/brppt1.h b/include/configs/brppt1.h index ccdaebd..3019b97 100644 --- a/include/configs/brppt1.h +++ b/include/configs/brppt1.h @@ -46,20 +46,20 @@ #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0x80 /* 64KiB */ /* NAND */ -#ifdef CONFIG_NAND +#ifdef CONFIG_MTD_RAW_NAND #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x140000 -#endif /* CONFIG_NAND */ +#endif /* CONFIG_MTD_RAW_NAND */ #endif /* CONFIG_SPL_OS_BOOT */ -#ifdef CONFIG_NAND +#ifdef CONFIG_MTD_RAW_NAND #define CONFIG_SPL_NAND_BASE #define CONFIG_SPL_NAND_DRIVERS #define CONFIG_SPL_NAND_ECC #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 -#endif /* CONFIG_NAND */ +#endif /* CONFIG_MTD_RAW_NAND */ -#ifdef CONFIG_NAND +#ifdef CONFIG_MTD_RAW_NAND #define NANDTGTS \ "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \ "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ @@ -74,7 +74,7 @@ "b_tgts_pme=usb0 nand net\0" #else #define NANDTGTS "" -#endif /* CONFIG_NAND */ +#endif /* CONFIG_MTD_RAW_NAND */ #define MMCSPI_TGTS \ "t30args#0=setenv bootargs ${optargs_rot} ${optargs} console=${console} " \ @@ -147,7 +147,7 @@ NANDTGTS \ " if test ${b_break} = 1; then; exit; fi; done\0" #endif /* !CONFIG_SPL_BUILD*/ -#ifdef CONFIG_NAND +#ifdef CONFIG_MTD_RAW_NAND /* * GPMC block. We support 1 device and the physical address to * access CS0 at is 0x8000000. @@ -177,7 +177,7 @@ NANDTGTS \ #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE #define CONFIG_NAND_OMAP_GPMC_WSCFG 1 -#endif /* CONFIG_NAND */ +#endif /* CONFIG_MTD_RAW_NAND */ #if defined(CONFIG_SPI) /* SPI Flash */ diff --git a/include/configs/comtrend_vr3032u.h b/include/configs/comtrend_vr3032u.h index 3c3c4df..c4c7029 100644 --- a/include/configs/comtrend_vr3032u.h +++ b/include/configs/comtrend_vr3032u.h @@ -8,8 +8,8 @@ #define CONFIG_REMAKE_ELF -#ifdef CONFIG_NAND +#ifdef CONFIG_MTD_RAW_NAND #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_SELF_INIT #define CONFIG_SYS_NAND_ONFI_DETECTION -#endif /* CONFIG_NAND */ +#endif /* CONFIG_MTD_RAW_NAND */ diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h index 4874687..bafedcb 100644 --- a/include/configs/corenet_ds.h +++ b/include/configs/corenet_ds.h @@ -15,7 +15,7 @@ #ifdef CONFIG_NXP_ESBC #define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc -#ifdef CONFIG_NAND +#ifdef CONFIG_MTD_RAW_NAND #define CONFIG_RAMBOOT_NAND #endif #define CONFIG_BOOTSCRIPT_COPY_RAM @@ -213,7 +213,7 @@ | OR_FCM_TRLX \ | OR_FCM_EHTR) -#ifdef CONFIG_NAND +#ifdef CONFIG_MTD_RAW_NAND #define CONFIG_SYS_BR0_PRELIM CONFIG_SYS_NAND_BR_PRELIM /* NAND Base Address */ #define CONFIG_SYS_OR0_PRELIM CONFIG_SYS_NAND_OR_PRELIM /* NAND Options */ #define CONFIG_SYS_BR2_PRELIM CONFIG_SYS_FLASH_BR_PRELIM /* NOR Base Address */ @@ -414,7 +414,7 @@ * 0x2000 (16 blocks), 8 + 1650 + 16 = 1674, enlarge it to 1680. */ #define CONFIG_SYS_FMAN_FW_ADDR (512 * 1680) -#elif defined(CONFIG_NAND) +#elif defined(CONFIG_MTD_RAW_NAND) #define CONFIG_SYS_FMAN_FW_ADDR (8 * CONFIG_SYS_NAND_BLOCK_SIZE) #elif defined(CONFIG_SRIO_PCIE_BOOT_SLAVE) /* diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h index e4c8dc3..5bd5cd8 100644 --- a/include/configs/da850evm.h +++ b/include/configs/da850evm.h @@ -123,7 +123,7 @@ /* * Flash & Environment */ -#ifdef CONFIG_NAND +#ifdef CONFIG_MTD_RAW_NAND #define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST #define CONFIG_SYS_NAND_PAGE_2K #define CONFIG_SYS_NAND_CS 3 @@ -226,7 +226,7 @@ #define CONFIG_CLOCKS #endif -#if !defined(CONFIG_NAND) && \ +#if !defined(CONFIG_MTD_RAW_NAND) && \ !defined(CONFIG_USE_NOR) && \ !defined(CONFIG_USE_SPIFLASH) #endif diff --git a/include/configs/dra7xx_evm.h b/include/configs/dra7xx_evm.h index 1255999..844d268 100644 --- a/include/configs/dra7xx_evm.h +++ b/include/configs/dra7xx_evm.h @@ -93,7 +93,7 @@ #define CONFIG_SCSI_AHCI_PLAT /* NAND support */ -#ifdef CONFIG_NAND +#ifdef CONFIG_MTD_RAW_NAND /* NAND: device related configs */ #define CONFIG_SYS_NAND_PAGE_SIZE 2048 #define CONFIG_SYS_NAND_OOBSIZE 64 @@ -120,7 +120,7 @@ #ifdef CONFIG_SPL_OS_BOOT #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x00200000 /* kernel offset */ #endif -#endif /* !CONFIG_NAND */ +#endif /* !CONFIG_MTD_RAW_NAND */ /* Parallel NOR Support */ #if defined(CONFIG_NOR) diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h index 926239a..b251c79 100644 --- a/include/configs/ls2080ardb.h +++ b/include/configs/ls2080ardb.h @@ -196,7 +196,7 @@ unsigned long get_board_sys_clk(void); FTIM2_GPCM_TWP(0x3E)) #define CONFIG_SYS_CS3_FTIM3 0x0 -#if defined(CONFIG_SPL) && defined(CONFIG_NAND) +#if defined(CONFIG_SPL) && defined(CONFIG_MTD_RAW_NAND) #define CONFIG_SYS_CSPR2_EXT CONFIG_SYS_NOR0_CSPR_EXT #define CONFIG_SYS_CSPR2 CONFIG_SYS_NOR0_CSPR_EARLY #define CONFIG_SYS_CSPR2_FINAL CONFIG_SYS_NOR0_CSPR diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h index 800e22b..4157d76 100644 --- a/include/configs/omap3_beagle.h +++ b/include/configs/omap3_beagle.h @@ -24,7 +24,7 @@ #define CONFIG_REVISION_TAG /* NAND */ -#if defined(CONFIG_NAND) +#if defined(CONFIG_MTD_RAW_NAND) #define CONFIG_SYS_FLASH_BASE NAND_BASE #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_5_ADDR_CYCLE @@ -45,7 +45,7 @@ #if defined(CONFIG_SPL_OS_BOOT) #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x2a0000 #endif /* CONFIG_SPL_OS_BOOT */ -#endif /* CONFIG_NAND */ +#endif /* CONFIG_MTD_RAW_NAND */ /* USB EHCI */ #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 147 @@ -67,7 +67,7 @@ #define BOOTENV_DEV_NAME_LEGACY_MMC(devtypeu, devtypel, instance) \ #devtypel #instance " " -#if defined(CONFIG_NAND) +#if defined(CONFIG_MTD_RAW_NAND) #define BOOTENV_DEV_NAND(devtypeu, devtypel, instance) \ "bootcmd_" #devtypel #instance "=" \ @@ -85,13 +85,13 @@ func(UBIFS, ubifs, 0) \ func(NAND, nand, 0) -#else /* !CONFIG_NAND */ +#else /* !CONFIG_MTD_RAW_NAND */ #define BOOT_TARGET_DEVICES(func) \ func(MMC, mmc, 0) \ func(LEGACY_MMC, legacy_mmc, 0) -#endif /* CONFIG_NAND */ +#endif /* CONFIG_MTD_RAW_NAND */ #include diff --git a/include/configs/omap3_evm.h b/include/configs/omap3_evm.h index a04499e..f1c2a9b 100644 --- a/include/configs/omap3_evm.h +++ b/include/configs/omap3_evm.h @@ -29,7 +29,7 @@ #define CONFIG_REVISION_TAG /* NAND */ -#if defined(CONFIG_NAND) +#if defined(CONFIG_MTD_RAW_NAND) #define CONFIG_SYS_FLASH_BASE NAND_BASE #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_5_ADDR_CYCLE @@ -49,7 +49,7 @@ #if defined(CONFIG_SPL_OS_BOOT) #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x2a0000 #endif /* CONFIG_SPL_OS_BOOT */ -#endif /* CONFIG_NAND */ +#endif /* CONFIG_MTD_RAW_NAND */ #define MEM_LAYOUT_ENV_SETTINGS \ DEFAULT_LINUX_BOOT_ENV @@ -61,7 +61,7 @@ #define BOOTENV_DEV_NAME_LEGACY_MMC(devtypeu, devtypel, instance) \ #devtypel #instance " " -#if defined(CONFIG_NAND) +#if defined(CONFIG_MTD_RAW_NAND) #define BOOTENV_DEV_NAND(devtypeu, devtypel, instance) \ "bootcmd_" #devtypel #instance "=" \ @@ -79,13 +79,13 @@ func(UBIFS, ubifs, 0) \ func(NAND, nand, 0) -#else /* !CONFIG_NAND */ +#else /* !CONFIG_MTD_RAW_NAND */ #define BOOT_TARGET_DEVICES(func) \ func(MMC, mmc, 0) \ func(LEGACY_MMC, legacy_mmc, 0) -#endif /* CONFIG_NAND */ +#endif /* CONFIG_MTD_RAW_NAND */ #include diff --git a/include/configs/omap3_logic.h b/include/configs/omap3_logic.h index 207cd93..ddf6d79 100644 --- a/include/configs/omap3_logic.h +++ b/include/configs/omap3_logic.h @@ -38,7 +38,7 @@ #endif /* Board NAND Info. */ -#ifdef CONFIG_NAND +#ifdef CONFIG_MTD_RAW_NAND #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */ /* NAND devices */ #define CONFIG_SYS_NAND_5_ADDR_CYCLE diff --git a/include/configs/omap3_overo.h b/include/configs/omap3_overo.h index da67cbb..04f3755 100644 --- a/include/configs/omap3_overo.h +++ b/include/configs/omap3_overo.h @@ -32,7 +32,7 @@ /* commands to include */ -#ifdef CONFIG_NAND +#ifdef CONFIG_MTD_RAW_NAND /* NAND block size is 128 KiB. Synchronize these values with * overo_nand_partitions in mach-omap2/board-overo.c in Linux: * xloader 4 * NAND_BLOCK_SIZE = 512 KiB @@ -41,7 +41,7 @@ * linux 64 * NAND_BLOCK_SIZE = 8 MiB * rootfs remainder */ -#endif /* CONFIG_NAND */ +#endif /* CONFIG_MTD_RAW_NAND */ /* Board NAND Info. */ /* Environment information */ @@ -145,7 +145,7 @@ 0x01F00000) /* 31MB */ /* FLASH and environment organization */ -#if defined(CONFIG_NAND) +#if defined(CONFIG_MTD_RAW_NAND) #define CONFIG_SYS_FLASH_BASE NAND_BASE #endif diff --git a/include/configs/omap3_pandora.h b/include/configs/omap3_pandora.h index 9e6a868..2110784 100644 --- a/include/configs/omap3_pandora.h +++ b/include/configs/omap3_pandora.h @@ -52,7 +52,7 @@ #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ 0x01F00000) /* 31MB */ -#if defined(CONFIG_NAND) +#if defined(CONFIG_MTD_RAW_NAND) #define CONFIG_SYS_FLASH_BASE NAND_BASE #endif diff --git a/include/configs/omapl138_lcdk.h b/include/configs/omapl138_lcdk.h index 2c499d8..aac7f18 100644 --- a/include/configs/omapl138_lcdk.h +++ b/include/configs/omapl138_lcdk.h @@ -116,7 +116,7 @@ /* * Flash & Environment */ -#ifdef CONFIG_NAND +#ifdef CONFIG_MTD_RAW_NAND #define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST #define CONFIG_SYS_NAND_PAGE_2K #define CONFIG_SYS_NAND_CS 3 diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index 39cec35..c42f1a9 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -163,7 +163,7 @@ #endif #endif -#ifdef CONFIG_NAND +#ifdef CONFIG_MTD_RAW_NAND #ifdef CONFIG_TPL_BUILD #define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_NAND_INIT @@ -442,7 +442,7 @@ OR_GPCM_SCY | OR_GPCM_TRLX | OR_GPCM_EHTR | \ OR_GPCM_EAD) -#ifdef CONFIG_NAND +#ifdef CONFIG_MTD_RAW_NAND #define CONFIG_SYS_BR0_PRELIM CONFIG_SYS_NAND_BR_PRELIM /* NAND Base Addr */ #define CONFIG_SYS_OR0_PRELIM CONFIG_SYS_NAND_OR_PRELIM /* NAND Options */ #define CONFIG_SYS_BR1_PRELIM CONFIG_FLASH_BR_PRELIM /* NOR Base Address */ @@ -498,7 +498,7 @@ #else #define CONFIG_SPL_RELOC_MALLOC_SIZE (108 << 10) #endif -#elif defined(CONFIG_NAND) +#elif defined(CONFIG_MTD_RAW_NAND) #ifdef CONFIG_TPL_BUILD #define CONFIG_SYS_INIT_L2_ADDR 0xf8f80000 #define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR @@ -699,7 +699,7 @@ #if defined(CONFIG_SDCARD) #define CONFIG_FSL_FIXED_MMC_LOCATION #define CONFIG_SYS_MMC_ENV_DEV 0 -#elif defined(CONFIG_NAND) +#elif defined(CONFIG_MTD_RAW_NAND) #define CONFIG_ENV_RANGE (3 * CONFIG_ENV_SIZE) #ifdef CONFIG_TPL_BUILD #define SPL_ENV_ADDR (CONFIG_SYS_INIT_L2_ADDR + (160 << 10)) diff --git a/include/configs/phycore_am335x_r2.h b/include/configs/phycore_am335x_r2.h index ca28b6f..58fa216 100644 --- a/include/configs/phycore_am335x_r2.h +++ b/include/configs/phycore_am335x_r2.h @@ -18,7 +18,7 @@ #define CONFIG_SYS_MMC_ENV_DEV 0 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 -#ifdef CONFIG_NAND +#ifdef CONFIG_MTD_RAW_NAND #define NANDARGS \ "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \ "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ @@ -87,7 +87,7 @@ #define CONFIG_POWER_TPS65910 -#ifdef CONFIG_NAND +#ifdef CONFIG_MTD_RAW_NAND /* NAND: device related configs */ #define CONFIG_SYS_NAND_5_ADDR_CYCLE #define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \ @@ -114,7 +114,7 @@ #ifdef CONFIG_SPL_OS_BOOT #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x00200000 /* kernel offset */ #endif -#endif /* !CONFIG_NAND */ +#endif /* !CONFIG_MTD_RAW_NAND */ /* CPU */ diff --git a/include/configs/siemens-am33x-common.h b/include/configs/siemens-am33x-common.h index 09e4836..cab2876 100644 --- a/include/configs/siemens-am33x-common.h +++ b/include/configs/siemens-am33x-common.h @@ -179,7 +179,7 @@ #define CONFIG_NET_RETRY_COUNT 10 /* NAND support */ -#ifdef CONFIG_NAND +#ifdef CONFIG_MTD_RAW_NAND /* UBI Support */ /* Commen environment */ diff --git a/include/configs/ti_armv7_common.h b/include/configs/ti_armv7_common.h index 6d15304..adc7861 100644 --- a/include/configs/ti_armv7_common.h +++ b/include/configs/ti_armv7_common.h @@ -174,7 +174,7 @@ /* General parts of the framework, required. */ -#ifdef CONFIG_NAND +#ifdef CONFIG_MTD_RAW_NAND #define CONFIG_SPL_NAND_BASE #define CONFIG_SPL_NAND_DRIVERS #define CONFIG_SPL_NAND_ECC diff --git a/include/configs/ti_armv7_omap.h b/include/configs/ti_armv7_omap.h index 98b5839..727c648 100644 --- a/include/configs/ti_armv7_omap.h +++ b/include/configs/ti_armv7_omap.h @@ -15,7 +15,7 @@ * GPMC NAND block. We support 1 device and the physical address to * access CS0 at is 0x8000000. */ -#ifdef CONFIG_NAND +#ifdef CONFIG_MTD_RAW_NAND #ifndef CONFIG_SYS_NAND_BASE #define CONFIG_SYS_NAND_BASE 0x8000000 #endif diff --git a/include/configs/ti_omap3_common.h b/include/configs/ti_omap3_common.h index 5d9c8ef..3d7cb17 100644 --- a/include/configs/ti_omap3_common.h +++ b/include/configs/ti_omap3_common.h @@ -58,7 +58,7 @@ #define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_SDRAM_BASE + \ (64 << 20)) -#ifdef CONFIG_NAND +#ifdef CONFIG_MTD_RAW_NAND #define CONFIG_SYS_NAND_BASE 0x30000000 #endif diff --git a/include/environment/ti/dfu.h b/include/environment/ti/dfu.h index 9f7ea03..720c345 100644 --- a/include/environment/ti/dfu.h +++ b/include/environment/ti/dfu.h @@ -39,7 +39,7 @@ "u-boot.img fat 1 1;" \ "uEnv.txt fat 1 1\0" -#ifdef CONFIG_NAND +#ifdef CONFIG_MTD_RAW_NAND #define DFU_ALT_INFO_NAND \ "dfu_alt_info_nand=" \ "SPL part 0 1;" \ diff --git a/include/environment/ti/nand.h b/include/environment/ti/nand.h index f838cb3..f2482e8 100644 --- a/include/environment/ti/nand.h +++ b/include/environment/ti/nand.h @@ -5,7 +5,7 @@ * Environment variable definitions for NAND on TI boards. */ -#ifdef CONFIG_NAND +#ifdef CONFIG_MTD_RAW_NAND #define NANDARGS \ "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \ "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ -- cgit v1.1