From 8475c869c30cbeef1695396b43bc240cc0d35f5a Mon Sep 17 00:00:00 2001 From: Przemyslaw Marczak Date: Wed, 22 Jan 2014 11:24:10 +0100 Subject: s5p: gpio: change gpio coding method for s5p gpio. Old s5p gpio coding method was not clean and was not working properly for all parts and banks. New method is clean and easy to extend. Gpio coding mask: 0x000000ff - pin number 0x00ffff00 - bank offset 0xff000000 - part number Signed-off-by: Przemyslaw Marczak Signed-off-by: Minkyu Kang --- include/configs/s5p_goni.h | 4 ++-- include/configs/s5pc210_universal.h | 12 ++++++------ include/configs/trats.h | 4 ++-- 3 files changed, 10 insertions(+), 10 deletions(-) (limited to 'include') diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h index 0590d20..4cdf937 100644 --- a/include/configs/s5p_goni.h +++ b/include/configs/s5p_goni.h @@ -208,8 +208,8 @@ /* * I2C Settings */ -#define CONFIG_SOFT_I2C_GPIO_SCL s5pc110_gpio_get_nr(j4, 3) -#define CONFIG_SOFT_I2C_GPIO_SDA s5pc110_gpio_get_nr(j4, 0) +#define CONFIG_SOFT_I2C_GPIO_SCL s5pc110_gpio_get(j4, 3) +#define CONFIG_SOFT_I2C_GPIO_SDA s5pc110_gpio_get(j4, 0) #define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */ diff --git a/include/configs/s5pc210_universal.h b/include/configs/s5pc210_universal.h index d9e4c56..02a1c99 100644 --- a/include/configs/s5pc210_universal.h +++ b/include/configs/s5pc210_universal.h @@ -229,8 +229,8 @@ /* * I2C Settings */ -#define CONFIG_SOFT_I2C_GPIO_SCL exynos4_gpio_part1_get_nr(b, 7) -#define CONFIG_SOFT_I2C_GPIO_SDA exynos4_gpio_part1_get_nr(b, 6) +#define CONFIG_SOFT_I2C_GPIO_SCL exynos4_gpio_get(1, b, 7) +#define CONFIG_SOFT_I2C_GPIO_SDA exynos4_gpio_get(1, b, 6) #define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */ @@ -253,10 +253,10 @@ */ #define CONFIG_SOFT_SPI #define CONFIG_SOFT_SPI_MODE SPI_MODE_3 -#define CONFIG_SOFT_SPI_GPIO_SCLK exynos4_gpio_part2_get_nr(y3, 1) -#define CONFIG_SOFT_SPI_GPIO_MOSI exynos4_gpio_part2_get_nr(y3, 3) -#define CONFIG_SOFT_SPI_GPIO_MISO exynos4_gpio_part2_get_nr(y3, 0) -#define CONFIG_SOFT_SPI_GPIO_CS exynos4_gpio_part2_get_nr(y4, 3) +#define CONFIG_SOFT_SPI_GPIO_SCLK exynos4_gpio_get(2, y3, 1) +#define CONFIG_SOFT_SPI_GPIO_MOSI exynos4_gpio_get(2, y3, 3) +#define CONFIG_SOFT_SPI_GPIO_MISO exynos4_gpio_get(2, y3, 0) +#define CONFIG_SOFT_SPI_GPIO_CS exynos4_gpio_get(2, y4, 3) #define SPI_DELAY udelay(1) #undef SPI_INIT diff --git a/include/configs/trats.h b/include/configs/trats.h index fdd8b46..9a92783 100644 --- a/include/configs/trats.h +++ b/include/configs/trats.h @@ -287,8 +287,8 @@ #include /* I2C FG */ -#define CONFIG_SOFT_I2C_GPIO_SCL exynos4_gpio_part2_get_nr(y4, 1) -#define CONFIG_SOFT_I2C_GPIO_SDA exynos4_gpio_part2_get_nr(y4, 0) +#define CONFIG_SOFT_I2C_GPIO_SCL exynos4_gpio_get(2, y4, 1) +#define CONFIG_SOFT_I2C_GPIO_SDA exynos4_gpio_get(2, y4, 0) #define CONFIG_POWER #define CONFIG_POWER_I2C -- cgit v1.1 From 7f39b0678275c773301da15d3a7cc1ea7ca87171 Mon Sep 17 00:00:00 2001 From: Przemyslaw Marczak Date: Wed, 22 Jan 2014 11:24:11 +0100 Subject: trats2: Code cleanup. Remove wrong and unused env variables Trats2 is not as GT-I8800. Signed-off-by: Przemyslaw Marczak Acked-by: Jaehoon Chung Cc: Piotr Wilczek Signed-off-by: Minkyu Kang --- include/power/max77686_pmic.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/power/max77686_pmic.h b/include/power/max77686_pmic.h index 16e9016..c2a772a 100644 --- a/include/power/max77686_pmic.h +++ b/include/power/max77686_pmic.h @@ -8,6 +8,8 @@ #ifndef __MAX77686_H_ #define __MAX77686_H_ +#include + enum { MAX77686_REG_PMIC_ID = 0x0, MAX77686_REG_PMIC_INTSRC, -- cgit v1.1 From 679549d1802f0ee8e66576ecfc766d30b4040983 Mon Sep 17 00:00:00 2001 From: Przemyslaw Marczak Date: Wed, 22 Jan 2014 11:24:12 +0100 Subject: samsung: common: Add file for common functions, draw_logo() cleanup. Changes: new file: - board/samsung/common/misc.c depends on: CONFIG_MISC_COMMON - move draw_logo() to misc.c configs: trats, trats2, universal: - enable CONFIG_MISC_COMMON, - enable CONFIG_MISC_INIT_R, - add misc_init_r() and call draw_logo() in it. Signed-off-by: Przemyslaw Marczak Signed-off-by: Minkyu Kang --- include/configs/s5pc210_universal.h | 5 +++++ include/configs/trats.h | 5 +++++ include/configs/trats2.h | 6 +++++- include/samsung/misc.h | 8 ++++++++ 4 files changed, 23 insertions(+), 1 deletion(-) create mode 100644 include/samsung/misc.h (limited to 'include') diff --git a/include/configs/s5pc210_universal.h b/include/configs/s5pc210_universal.h index 02a1c99..6b98bed 100644 --- a/include/configs/s5pc210_universal.h +++ b/include/configs/s5pc210_universal.h @@ -269,6 +269,11 @@ void universal_spi_sda(int bit); int universal_spi_read(void); #endif +/* Common misc for Samsung */ +#define CONFIG_MISC_COMMON + +#define CONFIG_MISC_INIT_R + /* * LCD Settings */ diff --git a/include/configs/trats.h b/include/configs/trats.h index 9a92783..7a9c60b 100644 --- a/include/configs/trats.h +++ b/include/configs/trats.h @@ -306,6 +306,11 @@ #define CONFIG_USB_GADGET_VBUS_DRAW 2 #define CONFIG_USB_CABLE_CHECK +/* Common misc for Samsung */ +#define CONFIG_MISC_COMMON + +#define CONFIG_MISC_INIT_R + /* LCD */ #define CONFIG_EXYNOS_FB #define CONFIG_LCD diff --git a/include/configs/trats2.h b/include/configs/trats2.h index 83633b0..b4ca1ff 100644 --- a/include/configs/trats2.h +++ b/include/configs/trats2.h @@ -277,7 +277,6 @@ #define CONFIG_EFI_PARTITION #define CONFIG_PARTITION_UUIDS -#define CONFIG_MISC_INIT_R #define CONFIG_BOARD_EARLY_INIT_F /* I2C */ @@ -318,6 +317,11 @@ int get_soft_i2c_sda_pin(void); #define CONFIG_USB_GADGET_VBUS_DRAW 2 #define CONFIG_USB_CABLE_CHECK +/* Common misc for Samsung */ +#define CONFIG_MISC_COMMON + +#define CONFIG_MISC_INIT_R + /* LCD */ #define CONFIG_EXYNOS_FB #define CONFIG_LCD diff --git a/include/samsung/misc.h b/include/samsung/misc.h new file mode 100644 index 0000000..8ea9223 --- /dev/null +++ b/include/samsung/misc.h @@ -0,0 +1,8 @@ +#ifndef __SAMSUNG_MISC_COMMON_H__ +#define __SAMSUNG_MISC_COMMON_H__ + +#ifdef CONFIG_CMD_BMP +void draw_logo(void); +#endif + +#endif /* __SAMSUNG_MISC_COMMON_H__ */ -- cgit v1.1 From 903afe18bb272d6d5c12e0be22b0f8fd35fa6f1b Mon Sep 17 00:00:00 2001 From: Przemyslaw Marczak Date: Fri, 29 Nov 2013 18:30:43 +0100 Subject: lib: tizen: change Tizen logo with the new one. Changes: - check image bpp instead of resolution when returns logo address - remove 32bpp logo - add 16bpp logo in two formats: bmp and gzipped bmp - init logo address with "0" for unsupported bpp mode - update boards configs with proper image size for gunzip - extend structure vidinfo by two fields: logo_x_offset and logo_y_offset. Signed-off-by: Przemyslaw Marczak Tested-by: Hyungwon Hwang Signed-off-by: Minkyu Kang --- include/configs/s5pc210_universal.h | 2 +- include/configs/trats.h | 2 +- include/configs/trats2.h | 2 +- include/lcd.h | 2 ++ 4 files changed, 5 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/include/configs/s5pc210_universal.h b/include/configs/s5pc210_universal.h index 6b98bed..67b08fc 100644 --- a/include/configs/s5pc210_universal.h +++ b/include/configs/s5pc210_universal.h @@ -284,6 +284,6 @@ int universal_spi_read(void); #define CONFIG_LD9040 #define CONFIG_EXYNOS_MIPI_DSIM #define CONFIG_VIDEO_BMP_GZIP -#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE ((520 * 120 * 4) + (1 << 12)) +#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE ((500 * 160 * 4) + 54) #endif /* __CONFIG_H */ diff --git a/include/configs/trats.h b/include/configs/trats.h index 7a9c60b..7babc0f 100644 --- a/include/configs/trats.h +++ b/include/configs/trats.h @@ -320,7 +320,7 @@ #define CONFIG_S6E8AX0 #define CONFIG_EXYNOS_MIPI_DSIM #define CONFIG_VIDEO_BMP_GZIP -#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE ((500 * 120 * 4) + (1 << 12)) +#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE ((500 * 160 * 4) + 54) #define CONFIG_CMD_USB_MASS_STORAGE #define CONFIG_USB_GADGET_MASS_STORAGE diff --git a/include/configs/trats2.h b/include/configs/trats2.h index b4ca1ff..a66358b 100644 --- a/include/configs/trats2.h +++ b/include/configs/trats2.h @@ -331,7 +331,7 @@ int get_soft_i2c_sda_pin(void); #define CONFIG_S6E8AX0 #define CONFIG_EXYNOS_MIPI_DSIM #define CONFIG_VIDEO_BMP_GZIP -#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE ((500 * 250 * 4) + (1 << 12)) +#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE ((500 * 160 * 4) + 54) #define CONFIG_CMD_USB_MASS_STORAGE #define CONFIG_USB_GADGET_MASS_STORAGE diff --git a/include/lcd.h b/include/lcd.h index 40e8d2a..d06d6f1 100644 --- a/include/lcd.h +++ b/include/lcd.h @@ -223,6 +223,8 @@ typedef struct vidinfo { unsigned int logo_on; unsigned int logo_width; unsigned int logo_height; + int logo_x_offset; + int logo_y_offset; unsigned long logo_addr; unsigned int rgb_mode; unsigned int resolution; -- cgit v1.1 From 2df21cb3ea478766ee4a8d9f0dc6640a58df721b Mon Sep 17 00:00:00 2001 From: Przemyslaw Marczak Date: Wed, 22 Jan 2014 11:24:16 +0100 Subject: samsung: boards: update display configs with 16bpp mode. 16 bpp mode is required by LCD console mode. This change updates exynos board files. Signed-off-by: Przemyslaw Marczak Signed-off-by: Minkyu Kang --- include/configs/s5pc210_universal.h | 2 +- include/configs/trats.h | 2 +- include/configs/trats2.h | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/include/configs/s5pc210_universal.h b/include/configs/s5pc210_universal.h index 67b08fc..93b9dfb0 100644 --- a/include/configs/s5pc210_universal.h +++ b/include/configs/s5pc210_universal.h @@ -280,7 +280,7 @@ int universal_spi_read(void); #define CONFIG_EXYNOS_FB #define CONFIG_LCD #define CONFIG_CMD_BMP -#define CONFIG_BMP_32BPP +#define CONFIG_BMP_16BPP #define CONFIG_LD9040 #define CONFIG_EXYNOS_MIPI_DSIM #define CONFIG_VIDEO_BMP_GZIP diff --git a/include/configs/trats.h b/include/configs/trats.h index 7babc0f..5022f40 100644 --- a/include/configs/trats.h +++ b/include/configs/trats.h @@ -315,7 +315,7 @@ #define CONFIG_EXYNOS_FB #define CONFIG_LCD #define CONFIG_CMD_BMP -#define CONFIG_BMP_32BPP +#define CONFIG_BMP_16BPP #define CONFIG_FB_ADDR 0x52504000 #define CONFIG_S6E8AX0 #define CONFIG_EXYNOS_MIPI_DSIM diff --git a/include/configs/trats2.h b/include/configs/trats2.h index a66358b..a97ecb2 100644 --- a/include/configs/trats2.h +++ b/include/configs/trats2.h @@ -326,7 +326,7 @@ int get_soft_i2c_sda_pin(void); #define CONFIG_EXYNOS_FB #define CONFIG_LCD #define CONFIG_CMD_BMP -#define CONFIG_BMP_32BPP +#define CONFIG_BMP_16BPP #define CONFIG_FB_ADDR 0x52504000 #define CONFIG_S6E8AX0 #define CONFIG_EXYNOS_MIPI_DSIM -- cgit v1.1 From 9d29a682a8dbe40b8d1af45197a87d49472fc105 Mon Sep 17 00:00:00 2001 From: Przemyslaw Marczak Date: Wed, 22 Jan 2014 11:24:17 +0100 Subject: samsung: misc: Add LCD download menu. This simple LCD menu allows run one of download mode on device without writing on console or for fast and easy upgrade. This feature check user keys combination at boot: - power key + volume up - download menu - power key + volume down - thor mode (without menu) New configs: - CONFIG_LCD_MENU - CONFIG_LCD_MENU_BOARD For proper effect this feature needs following definitions: Power key: - KEY_PWR_PMIC_NAME - (string) pmic which supports power key check Register address: - KEY_PWR_STATUS_REG - KEY_PWR_INTERRUPT_REG Register power key mask: - KEY_PWR_STATUS_MASK - KEY_PWR_INTERRUPT_MASK Gpio numbers: - KEY_PWR_INTERRUPT_MASK - KEY_VOL_DOWN_GPIO Functions needs to be called: - keys_init() - for set proper gpio direction - check_boot_mode() - menu - main function Signed-off-by: Przemyslaw Marczak Signed-off-by: Minkyu Kang --- include/samsung/misc.h | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) (limited to 'include') diff --git a/include/samsung/misc.h b/include/samsung/misc.h index 8ea9223..1a6d47f 100644 --- a/include/samsung/misc.h +++ b/include/samsung/misc.h @@ -1,6 +1,23 @@ #ifndef __SAMSUNG_MISC_COMMON_H__ #define __SAMSUNG_MISC_COMMON_H__ +#ifdef CONFIG_LCD_MENU +enum { + BOOT_MODE_INFO, + BOOT_MODE_THOR, + BOOT_MODE_UMS, + BOOT_MODE_DFU, + BOOT_MODE_EXIT, +}; + +#ifdef CONFIG_REVISION_TAG +u32 get_board_rev(void); +#endif + +void keys_init(void); +void check_boot_mode(void); +#endif /* CONFIG_LCD_MENU */ + #ifdef CONFIG_CMD_BMP void draw_logo(void); #endif -- cgit v1.1 From 00e64ab6471e154a06d89bbfffba2bbe6e2150ad Mon Sep 17 00:00:00 2001 From: Przemyslaw Marczak Date: Wed, 22 Jan 2014 11:24:18 +0100 Subject: trats: add LCD download menu support Signed-off-by: Przemyslaw Marczak Acked-by: Lukasz Majewski Signed-off-by: Minkyu Kang --- include/configs/trats.h | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) (limited to 'include') diff --git a/include/configs/trats.h b/include/configs/trats.h index 5022f40..a623371 100644 --- a/include/configs/trats.h +++ b/include/configs/trats.h @@ -311,6 +311,28 @@ #define CONFIG_MISC_INIT_R +/* Download menu - Samsung common */ +#define CONFIG_LCD_MENU +#define CONFIG_LCD_MENU_BOARD + +/* Download menu - definitions for check keys */ +#ifndef __ASSEMBLY__ +#include + +#define KEY_PWR_PMIC_NAME "MAX8997_PMIC" +#define KEY_PWR_STATUS_REG MAX8997_REG_STATUS1 +#define KEY_PWR_STATUS_MASK (1 << 0) +#define KEY_PWR_INTERRUPT_REG MAX8997_REG_INT1 +#define KEY_PWR_INTERRUPT_MASK (1 << 0) + +#define KEY_VOL_UP_GPIO exynos4_gpio_get(2, x2, 0) +#define KEY_VOL_DOWN_GPIO exynos4_gpio_get(2, x2, 1) +#endif /* __ASSEMBLY__ */ + +/* LCD console */ +#define LCD_BPP LCD_COLOR16 +#define CONFIG_SYS_WHITE_ON_BLACK + /* LCD */ #define CONFIG_EXYNOS_FB #define CONFIG_LCD -- cgit v1.1 From f64236a907acf852f9b0421497aa6563e10e1d37 Mon Sep 17 00:00:00 2001 From: Przemyslaw Marczak Date: Wed, 22 Jan 2014 11:24:19 +0100 Subject: trats2: add LCD download menu support Signed-off-by: Przemyslaw Marczak Signed-off-by: Minkyu Kang --- include/configs/trats2.h | 22 ++++++++++++++++++++++ include/power/pmic.h | 1 - 2 files changed, 22 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/trats2.h b/include/configs/trats2.h index a97ecb2..095f253 100644 --- a/include/configs/trats2.h +++ b/include/configs/trats2.h @@ -322,6 +322,28 @@ int get_soft_i2c_sda_pin(void); #define CONFIG_MISC_INIT_R +/* Download menu - Samsung common */ +#define CONFIG_LCD_MENU +#define CONFIG_LCD_MENU_BOARD + +/* Download menu - definitions for check keys */ +#ifndef __ASSEMBLY__ +#include + +#define KEY_PWR_PMIC_NAME "MAX77686_PMIC" +#define KEY_PWR_STATUS_REG MAX77686_REG_PMIC_STATUS1 +#define KEY_PWR_STATUS_MASK (1 << 0) +#define KEY_PWR_INTERRUPT_REG MAX77686_REG_PMIC_INT1 +#define KEY_PWR_INTERRUPT_MASK (1 << 1) + +#define KEY_VOL_UP_GPIO exynos4x12_gpio_get(2, x2, 2) +#define KEY_VOL_DOWN_GPIO exynos4x12_gpio_get(2, x3, 3) +#endif /* __ASSEMBLY__ */ + +/* LCD console */ +#define LCD_BPP LCD_COLOR16 +#define CONFIG_SYS_WHITE_ON_BLACK + /* LCD */ #define CONFIG_EXYNOS_FB #define CONFIG_LCD diff --git a/include/power/pmic.h b/include/power/pmic.h index 0e7aa31..8f282dd 100644 --- a/include/power/pmic.h +++ b/include/power/pmic.h @@ -8,7 +8,6 @@ #ifndef __CORE_PMIC_H_ #define __CORE_PMIC_H_ -#include #include #include #include -- cgit v1.1 From 82b0a0556172a17aca23cd07cf1dc3bd86248b97 Mon Sep 17 00:00:00 2001 From: Przemyslaw Marczak Date: Wed, 22 Jan 2014 11:24:20 +0100 Subject: universal: add LCD download menu support Signed-off-by: Przemyslaw Marczak Signed-off-by: Minkyu Kang --- include/configs/s5pc210_universal.h | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) (limited to 'include') diff --git a/include/configs/s5pc210_universal.h b/include/configs/s5pc210_universal.h index 93b9dfb0..bfb044b 100644 --- a/include/configs/s5pc210_universal.h +++ b/include/configs/s5pc210_universal.h @@ -274,6 +274,28 @@ int universal_spi_read(void); #define CONFIG_MISC_INIT_R +/* Download menu - Samsung common */ +#define CONFIG_LCD_MENU +#define CONFIG_LCD_MENU_BOARD + +/* Download menu - definitions for check keys */ +#ifndef __ASSEMBLY__ +#include + +#define KEY_PWR_PMIC_NAME "MAX8998_PMIC" +#define KEY_PWR_STATUS_REG MAX8998_REG_STATUS1 +#define KEY_PWR_STATUS_MASK (1 << 7) +#define KEY_PWR_INTERRUPT_REG MAX8998_REG_IRQ1 +#define KEY_PWR_INTERRUPT_MASK (1 << 7) + +#define KEY_VOL_UP_GPIO exynos4_gpio_get(2, x2, 0) +#define KEY_VOL_DOWN_GPIO exynos4_gpio_get(2, x2, 1) +#endif /* __ASSEMBLY__ */ + +/* LCD console */ +#define LCD_BPP LCD_COLOR16 +#define CONFIG_SYS_WHITE_ON_BLACK + /* * LCD Settings */ -- cgit v1.1 From a0afc6f37851fe324418fff9655abedfe2d975a2 Mon Sep 17 00:00:00 2001 From: Przemyslaw Marczak Date: Wed, 22 Jan 2014 12:02:47 +0100 Subject: config: trats: trats2: extend dfu_alt_info by env update settings This change allows updating environment stored on MMC by dfu or thor. New setting: - "params.bin mmc 0x38 0x8" File params.bin can be generated by: tools/mkenvimage. e.g. ./mkenvimage -s 4096 -o params.bin Every new env variable in text file should start with a new line. Sample env text file: - board/samsung/common/dfu_sample_env.txt Requirements: - file name: "params.bin" - file size: 4096 Bytes - the same as CONFIG_ENV_SIZE. Other size will cause CRC miscalculation at boot. Signed-off-by: Przemyslaw Marczak CC: Piotr Wilczek CC: Lukasz Majewski Acked-by: Lukasz Majewski Acked-by: Jaehoon Chung Signed-off-by: Minkyu Kang --- include/configs/trats.h | 3 ++- include/configs/trats2.h | 3 ++- 2 files changed, 4 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/configs/trats.h b/include/configs/trats.h index a623371..41de414 100644 --- a/include/configs/trats.h +++ b/include/configs/trats.h @@ -147,7 +147,8 @@ ""PARTS_BOOT" part 0 2;" \ ""PARTS_ROOT" part 0 5;" \ ""PARTS_DATA" part 0 6;" \ - ""PARTS_UMS" part 0 7\0" + ""PARTS_UMS" part 0 7;" \ + "params.bin mmc 0x38 0x8\0" #define CONFIG_ENV_OVERWRITE #define CONFIG_SYS_CONSOLE_INFO_QUIET diff --git a/include/configs/trats2.h b/include/configs/trats2.h index 095f253..b72f492 100644 --- a/include/configs/trats2.h +++ b/include/configs/trats2.h @@ -178,7 +178,8 @@ ""PARTS_BOOT" part 0 2;" \ ""PARTS_ROOT" part 0 5;" \ ""PARTS_DATA" part 0 6;" \ - ""PARTS_UMS" part 0 7\0" + ""PARTS_UMS" part 0 7;" \ + "params.bin mmc 0x38 0x8\0" #define CONFIG_EXTRA_ENV_SETTINGS \ "bootk=" \ -- cgit v1.1 From 5b7672fc49af1b771a7e318522b010fd5b11c4ab Mon Sep 17 00:00:00 2001 From: Prabhakar Kushwaha Date: Mon, 27 Jan 2014 15:55:20 +0530 Subject: boards/t1040qds: Adds ethernet support for T1040 Enable entherent for T1040QDS. It enables FM1@DTSEC3, FM1@DTSEC4, FM1@DTSEC5 Define MDIO related configs Added eth.c file Update t1040.c to support RGMII and SGMII Update t1040qds.c to support ethernet Define the PHY address Signed-off-by: Arpit Goel Signed-off-by: Bhupesh Sharma Signed-off-by: Poonam Aggrwal Signed-off-by: Priyanka Jain Signed-off-by: Prabhakar Kushwaha [York Sun: remove dash from commit message] Signed-off-by: York Sun --- include/configs/T1040QDS.h | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/include/configs/T1040QDS.h b/include/configs/T1040QDS.h index 8234a82..75ea125 100644 --- a/include/configs/T1040QDS.h +++ b/include/configs/T1040QDS.h @@ -611,9 +611,8 @@ unsigned long get_board_ddr_clk(void); #endif #ifdef CONFIG_FMAN_ENET -#define CONFIG_SYS_FM1_DTSEC5_PHY_ADDR 0x10 -#define CONFIG_SYS_FM1_DTSEC6_PHY_ADDR 0x11 -#define CONFIG_SYS_FM1_10GEC1_PHY_ADDR 4 +#define CONFIG_SYS_FM1_DTSEC4_PHY_ADDR 0x01 +#define CONFIG_SYS_FM1_DTSEC5_PHY_ADDR 0x02 #define CONFIG_SYS_FM1_DTSEC1_RISER_PHY_ADDR 0x1c #define CONFIG_SYS_FM1_DTSEC2_RISER_PHY_ADDR 0x1d -- cgit v1.1 From 9b444be32230160ee6b3e4dbf625b4201ac3897d Mon Sep 17 00:00:00 2001 From: Priyanka Jain Date: Mon, 27 Jan 2014 14:07:11 +0530 Subject: powerpc/t104xrdb: Update T1040RDB.h in config folder Add usb2 node entry in "hwconfig string" Remove controller interleaving from hwconfig string as T1040 has only one DDR conroller SPI related macros which were earlier under #ifdef CONFIG_SPIFLASH are move outside so that they are defined for all cases as these macros are also used by other u-boot code Add CONFIG_SYS_CSPR2_EXT to make CPLD accessible Signed-off-by: Poonam Aggrwal Signed-off-by: Priyanka Jain [York Sun: Minor change to commit message] Signed-off-by: York Sun --- include/configs/T1040RDB.h | 15 ++++++++------- 1 file changed, 8 insertions(+), 7 deletions(-) (limited to 'include') diff --git a/include/configs/T1040RDB.h b/include/configs/T1040RDB.h index 5e988c2..611b95c 100644 --- a/include/configs/T1040RDB.h +++ b/include/configs/T1040RDB.h @@ -79,10 +79,6 @@ #if defined(CONFIG_SPIFLASH) #define CONFIG_SYS_EXTRA_ENV_RELOC #define CONFIG_ENV_IS_IN_SPI_FLASH -#define CONFIG_ENV_SPI_BUS 0 -#define CONFIG_ENV_SPI_CS 0 -#define CONFIG_ENV_SPI_MAX_HZ 10000000 -#define CONFIG_ENV_SPI_MODE 0 #define CONFIG_ENV_SIZE 0x2000 /* 8KB */ #define CONFIG_ENV_OFFSET 0x100000 /* 1MB */ #define CONFIG_ENV_SECT_SIZE 0x10000 @@ -202,6 +198,7 @@ /* CPLD on IFC */ #define CONFIG_SYS_CPLD_BASE 0xffdf0000 #define CONFIG_SYS_CPLD_BASE_PHYS (0xf00000000ull | CONFIG_SYS_CPLD_BASE) +#define CONFIG_SYS_CSPR2_EXT (0xf) #define CONFIG_SYS_CSPR2 (CSPR_PHYS_ADDR(CONFIG_SYS_CPLD_BASE_PHYS) \ | CSPR_PORT_SIZE_8 \ | CSPR_MSEL_GPCM \ @@ -386,6 +383,10 @@ #define CONFIG_CMD_SF #define CONFIG_SF_DEFAULT_SPEED 10000000 #define CONFIG_SF_DEFAULT_MODE 0 +#define CONFIG_ENV_SPI_BUS 0 +#define CONFIG_ENV_SPI_CS 0 +#define CONFIG_ENV_SPI_MAX_HZ 10000000 +#define CONFIG_ENV_SPI_MODE 0 /* * General PCI @@ -627,9 +628,9 @@ #define __USB_PHY_TYPE utmi #define CONFIG_EXTRA_ENV_SETTINGS \ - "hwconfig=fsl_ddr:ctlr_intlv=cacheline," \ - "bank_intlv=cs0_cs1;" \ - "usb1:dr_mode=host,phy_type=" __stringify(__USB_PHY_TYPE) "\0"\ + "hwconfig=fsl_ddr:bank_intlv=cs0_cs1;" \ + "usb1:dr_mode=host,phy_type=" __stringify(__USB_PHY_TYPE) ";"\ + "usb2:dr_mode=host,phy_type=" __stringify(__USB_PHY_TYPE) "\0"\ "netdev=eth0\0" \ "uboot=" __stringify(CONFIG_UBOOTPATH) "\0" \ "ubootaddr=" __stringify(CONFIG_SYS_TEXT_BASE) "\0" \ -- cgit v1.1 From 48aee3913d1e99b9f0b91ff0eb52700b4dd24d25 Mon Sep 17 00:00:00 2001 From: Prabhakar Kushwaha Date: Mon, 27 Jan 2014 14:41:55 +0530 Subject: powerpc/t104xrdb: Update T1042RDB.h in config folder Add usb2 node entry to hwconfig default Remove DDR controller interleaving from hwconfig Move SPI related macros out of "#ifdef CONFIG_SPIFLASH" Add CONFIG_SYS_CSPR2_EXT to make CPLD accessible in u-boot Signed-off-by: Prabhakar Kushwaha [York Sun: Fix commit message] Signed-off-by: York Sun --- include/configs/T1042RDB_PI.h | 15 ++++++++------- 1 file changed, 8 insertions(+), 7 deletions(-) (limited to 'include') diff --git a/include/configs/T1042RDB_PI.h b/include/configs/T1042RDB_PI.h index aafa813..1cbc375 100644 --- a/include/configs/T1042RDB_PI.h +++ b/include/configs/T1042RDB_PI.h @@ -79,10 +79,6 @@ #if defined(CONFIG_SPIFLASH) #define CONFIG_SYS_EXTRA_ENV_RELOC #define CONFIG_ENV_IS_IN_SPI_FLASH -#define CONFIG_ENV_SPI_BUS 0 -#define CONFIG_ENV_SPI_CS 0 -#define CONFIG_ENV_SPI_MAX_HZ 10000000 -#define CONFIG_ENV_SPI_MODE 0 #define CONFIG_ENV_SIZE 0x2000 /* 8KB */ #define CONFIG_ENV_OFFSET 0x100000 /* 1MB */ #define CONFIG_ENV_SECT_SIZE 0x10000 @@ -202,6 +198,7 @@ /* CPLD on IFC */ #define CONFIG_SYS_CPLD_BASE 0xffdf0000 #define CONFIG_SYS_CPLD_BASE_PHYS (0xf00000000ull | CONFIG_SYS_CPLD_BASE) +#define CONFIG_SYS_CSPR2_EXT (0xf) #define CONFIG_SYS_CSPR2 (CSPR_PHYS_ADDR(CONFIG_SYS_CPLD_BASE_PHYS) \ | CSPR_PORT_SIZE_8 \ | CSPR_MSEL_GPCM \ @@ -394,6 +391,10 @@ #define CONFIG_CMD_SF #define CONFIG_SF_DEFAULT_SPEED 10000000 #define CONFIG_SF_DEFAULT_MODE 0 +#define CONFIG_ENV_SPI_BUS 0 +#define CONFIG_ENV_SPI_CS 0 +#define CONFIG_ENV_SPI_MAX_HZ 10000000 +#define CONFIG_ENV_SPI_MODE 0 /* * General PCI @@ -631,9 +632,9 @@ #define __USB_PHY_TYPE utmi #define CONFIG_EXTRA_ENV_SETTINGS \ - "hwconfig=fsl_ddr:ctlr_intlv=cacheline," \ - "bank_intlv=cs0_cs1;" \ - "usb1:dr_mode=host,phy_type=" __stringify(__USB_PHY_TYPE) "\0"\ + "hwconfig=fsl_ddr:bank_intlv=cs0_cs1;" \ + "usb1:dr_mode=host,phy_type=" __stringify(__USB_PHY_TYPE) ";"\ + "usb2:dr_mode=host,phy_type=" __stringify(__USB_PHY_TYPE) "\0"\ "netdev=eth0\0" \ "uboot=" __stringify(CONFIG_UBOOTPATH) "\0" \ "ubootaddr=" __stringify(CONFIG_SYS_TEXT_BASE) "\0" \ -- cgit v1.1 From 714fd406daab6a98b2ee8d301c4888c113fdd818 Mon Sep 17 00:00:00 2001 From: Priyanka Jain Date: Thu, 30 Jan 2014 11:30:04 +0530 Subject: powerpc/t104xrdb: Add basic ethernet support This covers only non-L2 switch ethernet interfaces i.e. RGMII and SGMII interface for both T1040RDB and T1042RDB_PI T1040RDB is configured as serdes protocol 0x66 which can support following interfaces 2 RGMIIS on DTSEC4, DTSEC5 1 SGMII on DTSEC3 T1042RDB_PI is configured as serdes protocol 0x06 which can support following interfaces 2 RGMIIS on DTSEC4, DTSEC5 Signed-off-by: Poonam Aggrwal Signed-off-by: Priyanka Jain [York Sun: Minor change in commit message] Signed-off-by: York Sun --- include/configs/T1040RDB.h | 9 ++++----- include/configs/T1042RDB_PI.h | 5 ++++- 2 files changed, 8 insertions(+), 6 deletions(-) (limited to 'include') diff --git a/include/configs/T1040RDB.h b/include/configs/T1040RDB.h index 611b95c..7cfda50 100644 --- a/include/configs/T1040RDB.h +++ b/include/configs/T1040RDB.h @@ -544,13 +544,12 @@ #endif #ifdef CONFIG_FMAN_ENET -#define CONFIG_SYS_FM1_DTSEC1_RISER_PHY_ADDR 0x1c -#define CONFIG_SYS_FM1_DTSEC2_RISER_PHY_ADDR 0x1d -#define CONFIG_SYS_FM1_DTSEC3_RISER_PHY_ADDR 0x1e -#define CONFIG_SYS_FM1_DTSEC4_RISER_PHY_ADDR 0x1f +#define CONFIG_SYS_SGMII1_PHY_ADDR 0x03 +#define CONFIG_SYS_RGMII1_PHY_ADDR 0x01 +#define CONFIG_SYS_RGMII2_PHY_ADDR 0x02 #define CONFIG_MII /* MII PHY management */ -#define CONFIG_ETHPRIME "FM1@DTSEC1" +#define CONFIG_ETHPRIME "FM1@DTSEC4" #define CONFIG_PHY_GIGE /* Include GbE speed/duplex detection */ #endif diff --git a/include/configs/T1042RDB_PI.h b/include/configs/T1042RDB_PI.h index 1cbc375..ed9ca8a 100644 --- a/include/configs/T1042RDB_PI.h +++ b/include/configs/T1042RDB_PI.h @@ -552,8 +552,11 @@ #endif #ifdef CONFIG_FMAN_ENET +#define CONFIG_SYS_RGMII1_PHY_ADDR 0x01 +#define CONFIG_SYS_RGMII2_PHY_ADDR 0x02 + #define CONFIG_MII /* MII PHY management */ -#define CONFIG_ETHPRIME "FM1@DTSEC1" +#define CONFIG_ETHPRIME "FM1@DTSEC4" #define CONFIG_PHY_GIGE /* Include GbE speed/duplex detection */ #endif -- cgit v1.1 From dd21f09669ee65500f1f9bce5c4024cf817f3c79 Mon Sep 17 00:00:00 2001 From: Rainer Boschung Date: Mon, 27 Jan 2014 11:49:04 +0100 Subject: kmp204x: support for QRIO1 bootcounter Make use of the QRIO1 32bit register at 0x20 as bootcounter register Check for BOOTCOUNT_MAGIC pattern when before bootcounter value is read Signed-off-by: Rainer Boschung Signed-off-by: Valentin Longchamp [York Sun: Minor change to commit message] Signed-off-by: York Sun --- include/configs/km/kmp204x-common.h | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/configs/km/kmp204x-common.h b/include/configs/km/kmp204x-common.h index 2466649..0461815 100644 --- a/include/configs/km/kmp204x-common.h +++ b/include/configs/km/kmp204x-common.h @@ -148,8 +148,6 @@ unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_KM_KERNEL_ADDR 0x1000000 /* max kernel size 15.5Mbytes */ #define CONFIG_KM_FDT_ADDR 0x1F80000 /* max dtb size 0.5Mbytes */ -#define CONFIG_BOOTCOUNT_LIMIT - /* * Local Bus Definitions */ @@ -206,6 +204,10 @@ unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_SYS_BR1_PRELIM CONFIG_SYS_QRIO_BR_PRELIM /* QRIO Base Address */ #define CONFIG_SYS_OR1_PRELIM CONFIG_SYS_QRIO_OR_PRELIM /* QRIO Options */ +/* bootcounter in QRIO */ +#define CONFIG_BOOTCOUNT_LIMIT +#define CONFIG_SYS_BOOTCOUNT_ADDR (CONFIG_SYS_QRIO_BASE + 0x20) + #define CONFIG_BOARD_EARLY_INIT_F #define CONFIG_BOARD_EARLY_INIT_R /* call board_early_init_r function */ #define CONFIG_MISC_INIT_R -- cgit v1.1 From f3e74d0a9fd8cdcbdc59b7c5a702aacc51908dca Mon Sep 17 00:00:00 2001 From: Rainer Boschung Date: Mon, 3 Feb 2014 08:45:40 +0100 Subject: kmp204x: I2C deblocking support This patch adds support for using some GPIOs that are connected to the I2C bus to force the bus lines state and perform some bus deblocking sequences. The KM common deblocking algorithm from board/keymile/common/common.c is used. The GPIO lines used for deblocking the I2C bus are some external GPIOs provided by the QRIO CPLD: - SCL = GPIOA_20 - SDA = GPIOA_21 The QRIO GPIOs act in an open-drain-like manner, for 0 the line is driven low and for 1 the GPIO is set as input and the line gets pulled-up. Signed-off-by: Rainer Boschung Signed-off-by: Valentin Longchamp Reviewed-by: York Sun --- include/configs/km/kmp204x-common.h | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'include') diff --git a/include/configs/km/kmp204x-common.h b/include/configs/km/kmp204x-common.h index 0461815..afb2246 100644 --- a/include/configs/km/kmp204x-common.h +++ b/include/configs/km/kmp204x-common.h @@ -210,6 +210,7 @@ unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_BOARD_EARLY_INIT_F #define CONFIG_BOARD_EARLY_INIT_R /* call board_early_init_r function */ +#define CONFIG_MISC_INIT_F #define CONFIG_MISC_INIT_R #define CONFIG_LAST_STAGE_INIT @@ -265,7 +266,10 @@ unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_FIT_VERBOSE /* enable fit_format_{error,warning}() */ /* I2C */ + #define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_INIT_BOARD +#define CONFIG_SYS_I2C_SPEED 100000 /* deblocking */ #define CONFIG_SYS_NUM_I2C_BUSES 3 #define CONFIG_SYS_I2C_MAX_HOPS 1 #define CONFIG_SYS_I2C_FSL /* Use FSL I2C driver */ @@ -278,6 +282,12 @@ unsigned long get_board_sys_clk(unsigned long dummy); {0, {{I2C_MUX_PCA9547, 0x70, 1 } } }, \ {0, {{I2C_MUX_PCA9547, 0x70, 2 } } }, \ } +#ifndef __ASSEMBLY__ +void set_sda(int state); +void set_scl(int state); +int get_sda(void); +int get_scl(void); +#endif #define CONFIG_KM_IVM_BUS 1 /* I2C1 (Mux-Port 1)*/ -- cgit v1.1 From e95bbc8bac38918d2533b987a5c1b44e5bafe2d6 Mon Sep 17 00:00:00 2001 From: Valentin Longchamp Date: Mon, 27 Jan 2014 11:49:08 +0100 Subject: kmp204x: add support for the kmcoge4 board The kmcoge4 board is the product board derived from the kmlion1 prototype. The main difference between the 2 boards is that the kmcoge4 does not configure the Local Bus controller for LCS2. Signed-off-by: Valentin Longchamp [York Sun: Minor change to boards.cfg to keep targets in order] Signed-off-by: York Sun --- include/configs/kmp204x.h | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/kmp204x.h b/include/configs/kmp204x.h index 4158c8d..8bb3571 100644 --- a/include/configs/kmp204x.h +++ b/include/configs/kmp204x.h @@ -13,6 +13,11 @@ #define CONFIG_HOSTNAME kmlion1 #define CONFIG_KM_BOARD_NAME "kmlion1" +/* KMCOGE4 */ +#elif defined(CONFIG_KMCOGE4) +#define CONFIG_HOSTNAME kmcoge4 +#define CONFIG_KM_BOARD_NAME "kmcoge4" + #else #error ("Board not supported") #endif @@ -42,6 +47,7 @@ #define CONFIG_SYS_BR2_PRELIM CONFIG_SYS_LBAPP1_BR_PRELIM /* Local bus app1 Options */ #define CONFIG_SYS_OR2_PRELIM CONFIG_SYS_LBAPP1_OR_PRELIM +#endif /* App2 Local bus */ #define CONFIG_SYS_LBAPP2_BASE 0xE0000000 @@ -63,6 +69,5 @@ #define CONFIG_SYS_BR3_PRELIM CONFIG_SYS_LBAPP2_BR_PRELIM /* Local bus app2 Options */ #define CONFIG_SYS_OR3_PRELIM CONFIG_SYS_LBAPP2_OR_PRELIM -#endif #endif /* __CONFIG_H */ -- cgit v1.1 From cf7707a1df14e644d378c6d36f27e17dd666ac34 Mon Sep 17 00:00:00 2001 From: Valentin Longchamp Date: Mon, 27 Jan 2014 11:49:10 +0100 Subject: KM: add the KM_UBI_PART_BOOT_OPTS #define This define can be used if the ubi boot partition (defined for all Keymile boards with KM_UBI_PARTITION_NAME_BOOT #define to ubi0) needs some additionnal boot options. This is the case for the kmp204x boards since u-boot does not support NAND Flash subpage accesses on this platform, an additionnal argument that defines the VID offstet must be given to the kernel. The UBI cmd line option now looks like this "ubi.mtd=ubi0,2048" on this platform. Signed-off-by: Valentin Longchamp Reviewed-by: York Sun --- include/configs/km/keymile-common.h | 10 ++++++++-- include/configs/km/kmp204x-common.h | 4 ++++ 2 files changed, 12 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/configs/km/keymile-common.h b/include/configs/km/keymile-common.h index 2a15ad4..a4e0f7c 100644 --- a/include/configs/km/keymile-common.h +++ b/include/configs/km/keymile-common.h @@ -99,11 +99,16 @@ #define CONFIG_KM_UBI_PARTITION_NAME_BOOT "ubi0" #endif /* CONFIG_KM_UBI_PARTITION_NAME_BOOT */ +#ifndef CONFIG_KM_UBI_PART_BOOT_OPTS +#define CONFIG_KM_UBI_PART_BOOT_OPTS "" +#endif /* CONFIG_KM_UBI_PART_BOOT_OPTS */ + #ifndef CONFIG_KM_UBI_PARTITION_NAME_APP /* one flash chip only called boot */ /* boot: CONFIG_KM_UBI_PARTITION_NAME_BOOT */ # define CONFIG_KM_UBI_LINUX_MTD \ - "ubi.mtd=" CONFIG_KM_UBI_PARTITION_NAME_BOOT + "ubi.mtd=" CONFIG_KM_UBI_PARTITION_NAME_BOOT \ + CONFIG_KM_UBI_PART_BOOT_OPTS # define CONFIG_KM_DEV_ENV_FLASH_BOOT_UBI \ "ubiattach=ubi part " CONFIG_KM_UBI_PARTITION_NAME_BOOT "\0" #else /* CONFIG_KM_UBI_PARTITION_NAME_APP */ @@ -111,7 +116,8 @@ /* boot: CONFIG_KM_UBI_PARTITION_NAME_BOOT */ /* app: CONFIG_KM_UBI_PARTITION_NAME_APP */ # define CONFIG_KM_UBI_LINUX_MTD \ - "ubi.mtd=" CONFIG_KM_UBI_PARTITION_NAME_BOOT " " \ + "ubi.mtd=" CONFIG_KM_UBI_PARTITION_NAME_BOOT \ + CONFIG_KM_UBI_PART_BOOT_OPTS " " \ "ubi.mtd=" CONFIG_KM_UBI_PARTITION_NAME_APP # define CONFIG_KM_DEV_ENV_FLASH_BOOT_UBI \ "ubiattach=if test ${boot_bank} -eq 0; then; " \ diff --git a/include/configs/km/kmp204x-common.h b/include/configs/km/kmp204x-common.h index afb2246..e55b722 100644 --- a/include/configs/km/kmp204x-common.h +++ b/include/configs/km/kmp204x-common.h @@ -15,6 +15,10 @@ #define CONFIG_KM_DEF_NETDEV "netdev=eth0\0" +/* an additionnal option is required for UBI as subpage access is + * supported in u-boot */ +#define CONFIG_KM_UBI_PART_BOOT_OPTS ",2048" + #define CONFIG_NAND_ECC_BCH /* common KM defines */ -- cgit v1.1 From 47c1180c022bf67615349257dc3de98388bac398 Mon Sep 17 00:00:00 2001 From: Valentin Longchamp Date: Mon, 27 Jan 2014 11:49:11 +0100 Subject: kmp204x: enable support for SPANSION SPI NOR The new prototype and the final series was moved from Micron to Spansion to have a better reset sequence that is easier to support. Signed-off-by: Valentin Longchamp Reviewed-by: York Sun --- include/configs/km/kmp204x-common.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/configs/km/kmp204x-common.h b/include/configs/km/kmp204x-common.h index e55b722..b9e1bac 100644 --- a/include/configs/km/kmp204x-common.h +++ b/include/configs/km/kmp204x-common.h @@ -302,6 +302,7 @@ int get_scl(void); #define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_BAR /* 4 byte-addressing */ #define CONFIG_SPI_FLASH_STMICRO +#define CONFIG_SPI_FLASH_SPANSION #define CONFIG_CMD_SF #define CONFIG_SF_DEFAULT_SPEED 20000000 #define CONFIG_SF_DEFAULT_MODE 0 -- cgit v1.1 From 1b4175d6fa12b8012c119889ad5cc1e65c3cf6ba Mon Sep 17 00:00:00 2001 From: Prabhakar Kushwaha Date: Sat, 18 Jan 2014 12:28:30 +0530 Subject: driver/ifc:Change accessor function to take care of endianness IFC registers can be of type Little Endian or big Endian depending upon Freescale SoC. Here SoC defines the register type of IFC IP. So update acessor functions with common IFC acessor functions to take care both type of endianness. Signed-off-by: Prabhakar Kushwaha Acked-by: York Sun --- include/fsl_ifc.h | 42 +++++++++++++++++++++++++++++------------- 1 file changed, 29 insertions(+), 13 deletions(-) (limited to 'include') diff --git a/include/fsl_ifc.h b/include/fsl_ifc.h index be6c107..58a6efd 100644 --- a/include/fsl_ifc.h +++ b/include/fsl_ifc.h @@ -12,6 +12,20 @@ #include #include + +#ifdef CONFIG_SYS_FSL_IFC_LE +#define ifc_in32(a) in_le32(a) +#define ifc_out32(a, v) out_le32(a, v) +#define ifc_in16(a) in_le16(a) +#elif defined(CONFIG_SYS_FSL_IFC_BE) +#define ifc_in32(a) in_be32(a) +#define ifc_out32(a, v) out_be32(a, v) +#define ifc_in16(a) in_be16(a) +#else +#error Neither CONFIG_SYS_FSL_IFC_LE nor CONFIG_SYS_FSL_IFC_BE is defined +#endif + + /* * CSPR - Chip Select Property Register */ @@ -773,20 +787,22 @@ extern void init_early_memctl_regs(void); #define IFC_BASE_ADDR ((struct fsl_ifc *)CONFIG_SYS_IFC_ADDR) -#define get_ifc_cspr_ext(i) (in_be32(&(IFC_BASE_ADDR)->cspr_cs[i].cspr_ext)) -#define get_ifc_cspr(i) (in_be32(&(IFC_BASE_ADDR)->cspr_cs[i].cspr)) -#define get_ifc_csor_ext(i) (in_be32(&(IFC_BASE_ADDR)->csor_cs[i].csor_ext)) -#define get_ifc_csor(i) (in_be32(&(IFC_BASE_ADDR)->csor_cs[i].csor)) -#define get_ifc_amask(i) (in_be32(&(IFC_BASE_ADDR)->amask_cs[i].amask)) -#define get_ifc_ftim(i, j) (in_be32(&(IFC_BASE_ADDR)->ftim_cs[i].ftim[j])) - -#define set_ifc_cspr_ext(i, v) (out_be32(&(IFC_BASE_ADDR)->cspr_cs[i].cspr_ext, v)) -#define set_ifc_cspr(i, v) (out_be32(&(IFC_BASE_ADDR)->cspr_cs[i].cspr, v)) -#define set_ifc_csor_ext(i, v) (out_be32(&(IFC_BASE_ADDR)->csor_cs[i].csor_ext, v)) -#define set_ifc_csor(i, v) (out_be32(&(IFC_BASE_ADDR)->csor_cs[i].csor, v)) -#define set_ifc_amask(i, v) (out_be32(&(IFC_BASE_ADDR)->amask_cs[i].amask, v)) +#define get_ifc_cspr_ext(i) (ifc_in32(&(IFC_BASE_ADDR)->cspr_cs[i].cspr_ext)) +#define get_ifc_cspr(i) (ifc_in32(&(IFC_BASE_ADDR)->cspr_cs[i].cspr)) +#define get_ifc_csor_ext(i) (ifc_in32(&(IFC_BASE_ADDR)->csor_cs[i].csor_ext)) +#define get_ifc_csor(i) (ifc_in32(&(IFC_BASE_ADDR)->csor_cs[i].csor)) +#define get_ifc_amask(i) (ifc_in32(&(IFC_BASE_ADDR)->amask_cs[i].amask)) +#define get_ifc_ftim(i, j) (ifc_in32(&(IFC_BASE_ADDR)->ftim_cs[i].ftim[j])) + +#define set_ifc_cspr_ext(i, v) \ + (ifc_out32(&(IFC_BASE_ADDR)->cspr_cs[i].cspr_ext, v)) +#define set_ifc_cspr(i, v) (ifc_out32(&(IFC_BASE_ADDR)->cspr_cs[i].cspr, v)) +#define set_ifc_csor_ext(i, v) \ + (ifc_out32(&(IFC_BASE_ADDR)->csor_cs[i].csor_ext, v)) +#define set_ifc_csor(i, v) (ifc_out32(&(IFC_BASE_ADDR)->csor_cs[i].csor, v)) +#define set_ifc_amask(i, v) (ifc_out32(&(IFC_BASE_ADDR)->amask_cs[i].amask, v)) #define set_ifc_ftim(i, j, v) \ - (out_be32(&(IFC_BASE_ADDR)->ftim_cs[i].ftim[j], v)) + (ifc_out32(&(IFC_BASE_ADDR)->ftim_cs[i].ftim[j], v)) enum ifc_chip_sel { IFC_CS0, -- cgit v1.1 From b9b53a60ae1148fa478c21f19fe89b8991ef0692 Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Thu, 23 Jan 2014 13:17:01 -0700 Subject: ARM: tegra: set env vars to indicate Cardhu A04 support The U-Boot "cardhu" build supports only revision 4 of the Cardhu board and later compatible revisions. Hence, set $board_name in the default environment to "cardhu-a04" rather than just "cardhu". The Linux kernel has separate DTs for Cardhu A02 and A04, although the former isn't really supported any more. Consequently, the kernel DT file that matches the U-Boot cardhu build is "tegra30-cardhu-a04.dtb" rather than "tegra30-cardhu.dtb". Set the $fdtfile default environment variable to reflect this. Signed-off-by: Stephen Warren Signed-off-by: Tom Warren --- include/configs/cardhu.h | 4 ++++ include/configs/tegra-common-post.h | 7 ++++++- 2 files changed, 10 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/cardhu.h b/include/configs/cardhu.h index 4abb03e..e80d1a6 100644 --- a/include/configs/cardhu.h +++ b/include/configs/cardhu.h @@ -30,6 +30,10 @@ #define V_PROMPT "Tegra30 (Cardhu) # " #define CONFIG_TEGRA_BOARD_STRING "NVIDIA Cardhu" +#define BOARD_EXTRA_ENV_SETTINGS \ + "board_name=cardhu-a04\0" \ + "fdtfile=tegra30-cardhu-a04.dtb\0" + /* Board-specific serial config */ #define CONFIG_SERIAL_MULTI #define CONFIG_TEGRA_ENABLE_UARTA diff --git a/include/configs/tegra-common-post.h b/include/configs/tegra-common-post.h index a3242fe..020b9b1 100644 --- a/include/configs/tegra-common-post.h +++ b/include/configs/tegra-common-post.h @@ -129,10 +129,15 @@ "stderr=serial" STDOUT_LCD "\0" \ "" +#ifndef BOARD_EXTRA_ENV_SETTINGS +#define BOARD_EXTRA_ENV_SETTINGS +#endif + #define CONFIG_EXTRA_ENV_SETTINGS \ TEGRA_DEVICE_SETTINGS \ MEM_LAYOUT_ENV_SETTINGS \ - BOOTCMDS_COMMON + BOOTCMDS_COMMON \ + BOARD_EXTRA_ENV_SETTINGS #if defined(CONFIG_TEGRA20_SFLASH) || defined(CONFIG_TEGRA20_SLINK) || defined(CONFIG_TEGRA114_SPI) #define CONFIG_FDT_SPI -- cgit v1.1 From 09266b270fb8bba934317d2d5a22063ac45bf960 Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Thu, 23 Jan 2014 13:17:05 -0700 Subject: ARM: tegra: clear $usb_need_init each boot $usb_need_init prevents "usb start" from being run multiple times for each boot attempt, i.e. once for USB storage, another for PXE, and another for DHCP. However, the flag that's used to determine when to run "usb start" is never cleared, so a subsequent "boot" command will never probe for a freshly plugged in USB device. Fix this so that new USB devices will be probed once per boot attempt. Signed-off-by: Stephen Warren Signed-off-by: Tom Warren --- include/configs/tegra-common-post.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/configs/tegra-common-post.h b/include/configs/tegra-common-post.h index 020b9b1..e1a3bbc 100644 --- a/include/configs/tegra-common-post.h +++ b/include/configs/tegra-common-post.h @@ -99,6 +99,7 @@ BOOTCMDS_DHCP #define CONFIG_BOOTCOMMAND \ + "set usb_need_init; " \ "for target in ${boot_targets}; do run bootcmd_${target}; done" #endif -- cgit v1.1 From a73ca4789fddce35936dd8decb1522f08b6cb620 Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Fri, 24 Jan 2014 12:46:06 -0700 Subject: mmc: tegra: support Tegra124 Tegra124's MMC controller is very similar to earlier SoC generations, and can be supported by the same driver. However, there are some non-backwards-compatible HW differences, and hence a new DT compatible value must be used to describe the HW. This patch updates the driver to support that new compatible value. That said, the HW differences are only relevant when enabling certain high-performance transfer modes. Since the driver is currently very simple and doesn't enable those modes, we don't actually need to address any of these HW differences in the code yet, hence the simple nature of this patch. Signed-off-by: Stephen Warren Acked-by: Pantelis Antoniou Tested-by: Thierry Reding Acked-by: Simon Glass Signed-off-by: Tom Warren --- include/fdtdec.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/fdtdec.h b/include/fdtdec.h index 433d6a7..19bab79 100644 --- a/include/fdtdec.h +++ b/include/fdtdec.h @@ -59,6 +59,7 @@ enum fdt_compat_id { COMPAT_NVIDIA_TEGRA20_NAND, /* Tegra2 NAND controller */ COMPAT_NVIDIA_TEGRA20_PWM, /* Tegra 2 PWM controller */ COMPAT_NVIDIA_TEGRA20_DC, /* Tegra 2 Display controller */ + COMPAT_NVIDIA_TEGRA124_SDMMC, /* Tegra124 SDMMC controller */ COMPAT_NVIDIA_TEGRA30_SDMMC, /* Tegra30 SDMMC controller */ COMPAT_NVIDIA_TEGRA20_SDMMC, /* Tegra20 SDMMC controller */ COMPAT_NVIDIA_TEGRA20_SFLASH, /* Tegra 2 SPI flash controller */ -- cgit v1.1 From f7dc4ac37c8e2448aa88209e5d00fa377ca98ced Mon Sep 17 00:00:00 2001 From: Tom Warren Date: Fri, 24 Jan 2014 12:46:18 -0700 Subject: ARM: tegra: add Venice2 (Tegra124) board These are the board files for Venice2 (Tegra124), plus the AS3722 PMIC files. PMIC init will be moved to pmic_common_init later. This builds/boots on Venice2, SPI/MMC/USB/I2C all work. Audio, display and WB/LP0 are not supported yet. Signed-off-by: Tom Warren Signed-off-by: Stephen Warren Tested-by: Thierry Reding Signed-off-by: Tom Warren --- include/configs/tegra124-common.h | 82 +++++++++++++++++++++++++++++++++++++++ include/configs/venice2.h | 79 +++++++++++++++++++++++++++++++++++++ 2 files changed, 161 insertions(+) create mode 100644 include/configs/tegra124-common.h create mode 100644 include/configs/venice2.h (limited to 'include') diff --git a/include/configs/tegra124-common.h b/include/configs/tegra124-common.h new file mode 100644 index 0000000..32d5bc9 --- /dev/null +++ b/include/configs/tegra124-common.h @@ -0,0 +1,82 @@ +/* + * (C) Copyright 2013 + * NVIDIA Corporation + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _TEGRA124_COMMON_H_ +#define _TEGRA124_COMMON_H_ + +#include "tegra-common.h" + +/* Cortex-A15 uses a cache line size of 64 bytes */ +#define CONFIG_SYS_CACHELINE_SIZE 64 + +/* + * NS16550 Configuration + */ +#define V_NS16550_CLK 408000000 /* 408MHz (pllp_out0) */ + +/* + * High Level Configuration Options + */ +#define CONFIG_TEGRA124 /* is an NVIDIA Tegra124 core */ + +/* Environment information, boards can override if required */ +#define CONFIG_LOADADDR 0x80408000 /* def. location for kernel */ + +/* + * Miscellaneous configurable options + */ +#define CONFIG_SYS_LOAD_ADDR 0x80A00800 /* default */ +#define CONFIG_STACKBASE 0x82800000 /* 40MB */ + +/*----------------------------------------------------------------------- + * Physical Memory Map + */ +#define CONFIG_SYS_TEXT_BASE 0x8010E000 + +/* + * Memory layout for where various images get loaded by boot scripts: + * + * scriptaddr can be pretty much anywhere that doesn't conflict with something + * else. Put it above BOOTMAPSZ to eliminate conflicts. + * + * pxefile_addr_r can be pretty much anywhere that doesn't conflict with + * something else. Put it above BOOTMAPSZ to eliminate conflicts. + * + * kernel_addr_r must be within the first 128M of RAM in order for the + * kernel's CONFIG_AUTO_ZRELADDR option to work. Since the kernel will + * decompress itself to 0x8000 after the start of RAM, kernel_addr_r + * should not overlap that area, or the kernel will have to copy itself + * somewhere else before decompression. Similarly, the address of any other + * data passed to the kernel shouldn't overlap the start of RAM. Pushing + * this up to 16M allows for a sizable kernel to be decompressed below the + * compressed load address. + * + * fdt_addr_r simply shouldn't overlap anything else. Choosing 32M allows for + * the compressed kernel to be up to 16M too. + * + * ramdisk_addr_r simply shouldn't overlap anything else. Choosing 33M allows + * for the FDT/DTB to be up to 1M, which is hopefully plenty. + */ +#define MEM_LAYOUT_ENV_SETTINGS \ + "scriptaddr=0x90000000\0" \ + "pxefile_addr_r=0x90100000\0" \ + "kernel_addr_r=0x81000000\0" \ + "fdt_addr_r=0x82000000\0" \ + "ramdisk_addr_r=0x82100000\0" + +/* Defines for SPL */ +#define CONFIG_SPL_TEXT_BASE 0x80108000 +#define CONFIG_SYS_SPL_MALLOC_START 0x80090000 +#define CONFIG_SPL_STACK 0x800ffffc + +/* Total I2C ports on Tegra124 */ +#define TEGRA_I2C_NUM_CONTROLLERS 5 + +/* For USB EHCI controller */ +#define CONFIG_EHCI_IS_TDI + +#endif /* _TEGRA124_COMMON_H_ */ diff --git a/include/configs/venice2.h b/include/configs/venice2.h new file mode 100644 index 0000000..91808e9 --- /dev/null +++ b/include/configs/venice2.h @@ -0,0 +1,79 @@ +/* + * (C) Copyright 2013-2014 + * NVIDIA Corporation + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#include + +#include "tegra124-common.h" + +/* Enable fdt support for Venice2. Flash the image in u-boot-dtb.bin */ +#define CONFIG_DEFAULT_DEVICE_TREE tegra124-venice2 +#define CONFIG_OF_CONTROL +#define CONFIG_OF_SEPARATE + +/* High-level configuration options */ +#define V_PROMPT "Tegra124 (Venice2) # " +#define CONFIG_TEGRA_BOARD_STRING "NVIDIA Venice2" + +/* Board-specific serial config */ +#define CONFIG_SERIAL_MULTI +#define CONFIG_TEGRA_ENABLE_UARTA +#define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE + +#define CONFIG_BOARD_EARLY_INIT_F + +/* I2C */ +#define CONFIG_SYS_I2C_TEGRA +#define CONFIG_SYS_I2C_INIT_BOARD +#define CONFIG_I2C_MULTI_BUS +#define CONFIG_SYS_MAX_I2C_BUS TEGRA_I2C_NUM_CONTROLLERS +#define CONFIG_SYS_I2C_SPEED 100000 +#define CONFIG_CMD_I2C +#define CONFIG_SYS_I2C + +/* SD/MMC */ +#define CONFIG_MMC +#define CONFIG_GENERIC_MMC +#define CONFIG_TEGRA_MMC +#define CONFIG_CMD_MMC + +/* Environment in eMMC, at the end of 2nd "boot sector" */ +#define CONFIG_ENV_IS_IN_MMC +#define CONFIG_SYS_MMC_ENV_DEV 0 +#define CONFIG_SYS_MMC_ENV_PART 2 +#define CONFIG_ENV_OFFSET (-CONFIG_ENV_SIZE) + +/* SPI */ +#define CONFIG_TEGRA114_SPI /* Compatible w/ Tegra114 SPI */ +#define CONFIG_TEGRA114_SPI_CTRLS 6 +#define CONFIG_SPI_FLASH +#define CONFIG_SPI_FLASH_WINBOND +#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 +#define CONFIG_SF_DEFAULT_SPEED 24000000 +#define CONFIG_CMD_SPI +#define CONFIG_CMD_SF +#define CONFIG_SPI_FLASH_SIZE (4 << 20) + +/* USB Host support */ +#define CONFIG_USB_EHCI +#define CONFIG_USB_EHCI_TEGRA +#define CONFIG_USB_STORAGE +#define CONFIG_CMD_USB + +/* USB networking support */ +#define CONFIG_USB_HOST_ETHER +#define CONFIG_USB_ETHER_ASIX + +/* General networking support */ +#define CONFIG_CMD_NET +#define CONFIG_CMD_DHCP + +#include "tegra-common-post.h" + +#endif /* __CONFIG_H */ -- cgit v1.1 From 7bc5c8c93032a7b86e268a172955e15b84f1aac3 Mon Sep 17 00:00:00 2001 From: Jim Lin Date: Fri, 24 Jan 2014 12:46:19 -0700 Subject: ARM: tegra: fix "bootp" issue for Tegra124 too Fix the timeout issue after running "bootp" command in U-Boot console. TXFIFOTHRES bits of TXFILLTUNING register should be set to 0x10 after a controller reset and before RUN bit is set (per technical reference manual). Signed-off-by: Jim Lin Signed-off-by: Stephen Warren Tested-by: Thierry Reding Signed-off-by: Tom Warren --- include/configs/tegra124-common.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/configs/tegra124-common.h b/include/configs/tegra124-common.h index 32d5bc9..0a4541b 100644 --- a/include/configs/tegra124-common.h +++ b/include/configs/tegra124-common.h @@ -78,5 +78,6 @@ /* For USB EHCI controller */ #define CONFIG_EHCI_IS_TDI +#define CONFIG_USB_EHCI_TXFIFO_THRESH 0x10 #endif /* _TEGRA124_COMMON_H_ */ -- cgit v1.1 From 08d0d6f32ecf75a6c5dede5fc9ee84b84d8b90e7 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Thu, 21 Nov 2013 13:39:02 -0800 Subject: common: Add new clk command Command provides just dump subcommand for showing clock frequencies in a soc. Signed-off-by: Michal Simek Acked-by: Stefano Babic --- include/clk.h | 6 ++++++ include/config_cmd_all.h | 1 + 2 files changed, 7 insertions(+) create mode 100644 include/clk.h (limited to 'include') diff --git a/include/clk.h b/include/clk.h new file mode 100644 index 0000000..df4570c --- /dev/null +++ b/include/clk.h @@ -0,0 +1,6 @@ +#ifndef _CLK_H_ +#define _CLK_H_ + +int soc_clk_dump(void); + +#endif /* _CLK_H_ */ diff --git a/include/config_cmd_all.h b/include/config_cmd_all.h index d847069..3e8983f 100644 --- a/include/config_cmd_all.h +++ b/include/config_cmd_all.h @@ -23,6 +23,7 @@ #define CONFIG_CMD_BSP /* Board Specific functions */ #define CONFIG_CMD_CACHE /* icache, dcache */ #define CONFIG_CMD_CDP /* Cisco Discovery Protocol */ +#define CONFIG_CMD_CLK /* Clock support */ #define CONFIG_CMD_CONSOLE /* coninfo */ #define CONFIG_CMD_DATE /* support for RTC, date/time...*/ #define CONFIG_CMD_DHCP /* DHCP Support */ -- cgit v1.1 From 22ff7f4d195b49ca7db5b2a0c3aa2c987ab88c34 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Tue, 21 Jan 2014 07:26:58 +0100 Subject: microblaze: Enable buffer write for NOR flashes It speeds up writing a lot. Signed-off-by: Michal Simek --- include/configs/microblaze-generic.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/microblaze-generic.h b/include/configs/microblaze-generic.h index aa8d59d..35e5a4a 100644 --- a/include/configs/microblaze-generic.h +++ b/include/configs/microblaze-generic.h @@ -200,7 +200,8 @@ # define CONFIG_SYS_MAX_FLASH_SECT 512 /* hardware flash protection */ # define CONFIG_SYS_FLASH_PROTECTION - +/* use buffered writes (20x faster) */ +# define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 # ifdef RAMENV # define CONFIG_ENV_IS_NOWHERE 1 # define CONFIG_ENV_SIZE 0x1000 -- cgit v1.1 From 9d24274509cdd463992dc1fb1a2820d6a4b6d21d Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Tue, 21 Jan 2014 07:30:37 +0100 Subject: microblaze: Add SPL support Add support for U-BOOT SPL. NOR and RAM mode are supported. There are 3 images in NOR flash. u-boot.img, dtb and kernel. Signed-off-by: Michal Simek --- include/configs/microblaze-generic.h | 60 ++++++++++++++++++++++++++++++++++++ 1 file changed, 60 insertions(+) (limited to 'include') diff --git a/include/configs/microblaze-generic.h b/include/configs/microblaze-generic.h index 35e5a4a..486787e 100644 --- a/include/configs/microblaze-generic.h +++ b/include/configs/microblaze-generic.h @@ -447,4 +447,64 @@ # undef CONFIG_PHYLIB #endif +/* SPL part */ +#define CONFIG_SPL +#define CONFIG_CMD_SPL +#define CONFIG_SPL_FRAMEWORK +#define CONFIG_SPL_LIBCOMMON_SUPPORT +#define CONFIG_SPL_LIBGENERIC_SUPPORT +#define CONFIG_SPL_SERIAL_SUPPORT +#define CONFIG_SPL_BOARD_INIT + +#define CONFIG_SPL_LDSCRIPT "arch/microblaze/cpu/u-boot-spl.lds" + +#define CONFIG_SPL_RAM_DEVICE +#define CONFIG_SPL_NOR_SUPPORT + +/* for booting directly linux */ +#define CONFIG_SPL_OS_BOOT + +#define CONFIG_SYS_OS_BASE (CONFIG_SYS_FLASH_BASE + \ + 0x60000) +#define CONFIG_SYS_FDT_BASE (CONFIG_SYS_FLASH_BASE + \ + 0x40000) +#define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_TEXT_BASE + \ + 0x1000000) + +/* SP location before relocation, must use scratch RAM */ +/* BRAM start */ +#define CONFIG_SYS_INIT_RAM_ADDR 0x0 +/* BRAM size - will be generated */ +#define CONFIG_SYS_INIT_RAM_SIZE 0x10000 +/* Stack pointer prior relocation, must situated at on-chip RAM */ +#define CONFIG_SYS_SPL_MALLOC_END (CONFIG_SYS_INIT_RAM_ADDR + \ + CONFIG_SYS_INIT_RAM_SIZE - \ + GENERATED_GBL_DATA_SIZE) + +#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100 + +/* + * The main reason to do it in this way is that MALLOC_START + * can't be defined - common/spl/spl.c + */ +#if (CONFIG_SYS_SPL_MALLOC_SIZE != 0) +# define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_SPL_MALLOC_END - \ + CONFIG_SYS_SPL_MALLOC_SIZE) +# define CONFIG_SPL_STACK_ADDR CONFIG_SYS_SPL_MALLOC_START +#else +# define CONFIG_SPL_STACK_ADDR CONFIG_SYS_SPL_MALLOC_END +#endif + +/* Just for sure that there is a space for stack */ +#define CONFIG_SPL_STACK_SIZE 0x100 + +#define CONFIG_SYS_UBOOT_BASE CONFIG_SYS_FLASH_BASE +#define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE + +#define CONFIG_SPL_MAX_FOOTPRINT (CONFIG_SYS_INIT_RAM_SIZE - \ + CONFIG_SYS_INIT_RAM_ADDR - \ + GENERATED_GBL_DATA_SIZE - \ + CONFIG_SYS_SPL_MALLOC_SIZE - \ + CONFIG_SPL_STACK_SIZE) + #endif /* __CONFIG_H */ -- cgit v1.1 From 13a49c3a739bec2414c2833e0393469aab93e870 Mon Sep 17 00:00:00 2001 From: Dennis Gilmore Date: Tue, 4 Feb 2014 05:25:47 -0600 Subject: config: add config_distro_defaults.h describe a set of default features that distros can rely on being available. having this common definition means that distros can easily support systems implementing them. Signed-off-by: Dennis Gilmore --- include/config_distro_defaults.h | 55 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 55 insertions(+) create mode 100644 include/config_distro_defaults.h (limited to 'include') diff --git a/include/config_distro_defaults.h b/include/config_distro_defaults.h new file mode 100644 index 0000000..11b5b79 --- /dev/null +++ b/include/config_distro_defaults.h @@ -0,0 +1,55 @@ +/* + * Copyright 2013-2014 Red Hat, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _CONFIG_CMD_DISTRO_DEFAULTS_H +#define _CONFIG_CMD_DISTRO_DEFAULTS_H + +/* + * List of all commands and options that when defined enables support for features + * required by distros to support boards in a standardised and consitant manner. + */ + +#define CONFIG_BOOTP_BOOTPATH +#define CONFIG_BOOTP_DNS +#define CONFIG_BOOTP_GATEWAY +#define CONFIG_BOOTP_HOSTNAME +#define CONFIG_BOOTP_PXE +#define CONFIG_BOOTP_SUBNETMASK + +#if defined(__arm__) +#define CONFIG_BOOTP_PXE_CLIENTARCH 0x100 +#if defined(__ARM_ARCH_7__) || defined(__ARM_ARCH_7A__) +#define CONFIG_BOOTP_VCI_STRING "U-boot.armv7" +#else +#define CONFIG_BOOTP_VCI_STRING "U-boot.arm" +#endif +#endif + +#define CONFIG_OF_LIBFDT + +#define CONFIG_CMD_BOOTZ +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_ELF +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_EXT4 +#define CONFIG_CMD_FAT +#define CONFIG_CMD_FS_GENERIC +#define CONFIG_CMD_MII +#define CONFIG_CMD_NET +#define CONFIG_CMD_PING +#define CONFIG_CMD_PXE + +#define CONFIG_CMDLINE_EDITING +#define CONFIG_AUTO_COMPLETE +#define CONFIG_BOOTDELAY 2 +#define CONFIG_SYS_LONGHELP +#define CONFIG_MENU +#define CONFIG_DOS_PARTITION +#define CONFIG_EFI_PARTITION +#define CONFIG_SUPPORT_RAW_INITRD +#define CONFIG_SYS_HUSH_PARSER + +#endif /* _CONFIG_CMD_DISTRO_DEFAULTS_H */ -- cgit v1.1 From e141652b9cd0cb4f899f7a0fd71c8a438300e365 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Wed, 5 Feb 2014 08:04:38 -0500 Subject: config: Fix line lengths in include/config_distro_defaults.h Signed-off-by: Tom Rini --- include/config_distro_defaults.h | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/config_distro_defaults.h b/include/config_distro_defaults.h index 11b5b79..5d18a4b 100644 --- a/include/config_distro_defaults.h +++ b/include/config_distro_defaults.h @@ -8,8 +8,9 @@ #define _CONFIG_CMD_DISTRO_DEFAULTS_H /* - * List of all commands and options that when defined enables support for features - * required by distros to support boards in a standardised and consitant manner. + * List of all commands and options that when defined enables support for + * features required by distros to support boards in a standardised and + * consitant manner. */ #define CONFIG_BOOTP_BOOTPATH -- cgit v1.1 From e0059eaef18dbdc65ee420a337aecfa555e8d493 Mon Sep 17 00:00:00 2001 From: Lukasz Majewski Date: Wed, 5 Feb 2014 10:10:44 +0100 Subject: usb:udc:samsung: Zero copy approach for data passed to Samsung's UDC driver The Samsung's UDC driver is not anymore copying data from USB requests to aligned internal buffers. Now it works directly in data allocated in the upper layers like UMS, DFU, THOR. This change is possible since those gadgets now must take care to allocate buffers aligned to cache line (CONFIG_SYS_CACHELINE_SIZE). This can be achieved by using DEFINE_CACHE_ALIGN_BUFFER() or ALLOC_CACHE_ALIGN_BUFFER() macros. Those take care to allocate buffer aligned to cache line in both starting address and its size. Sometimes it is enough to just use memalign() with size being a multiplication of cache line size. Test condition - test HW + measurement: Trats - Exynos4210 rev.1 - test HW Trats2 - Exynos4412 rev.1 400 MiB compressed rootfs image download with `thor 0 mmc 0` Measurement: Transmission speed: 27.04 MiB/s Signed-off-by: Lukasz Majewski Cc: Marek Vasut --- include/usb/s3c_udc.h | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) (limited to 'include') diff --git a/include/usb/s3c_udc.h b/include/usb/s3c_udc.h index 734c6cd..6dead2f 100644 --- a/include/usb/s3c_udc.h +++ b/include/usb/s3c_udc.h @@ -19,7 +19,7 @@ /*-------------------------------------------------------------------------*/ /* DMA bounce buffer size, 16K is enough even for mass storage */ -#define DMA_BUFFER_SIZE (4096*4) +#define DMA_BUFFER_SIZE (16*SZ_1K) #define EP0_FIFO_SIZE 64 #define EP_FIFO_SIZE 512 @@ -81,9 +81,6 @@ struct s3c_udc { struct s3c_plat_otg_data *pdata; - void *dma_buf[S3C_MAX_ENDPOINTS+1]; - dma_addr_t dma_addr[S3C_MAX_ENDPOINTS+1]; - int ep0state; struct s3c_ep ep[S3C_MAX_ENDPOINTS]; -- cgit v1.1 From 373ee048a8bdc3291aa88b93da183a0bc3b34a22 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Tue, 28 Jan 2014 00:04:58 +0100 Subject: ARM: IXP: Remove actux1 board The board is unmaintained, just like the rest of the IXP. Signed-off-by: Marek Vasut Cc: Albert Aribaud Cc: Michael Schwingen Cc: Tom Rini --- include/configs/actux1.h | 226 ----------------------------------------------- 1 file changed, 226 deletions(-) delete mode 100644 include/configs/actux1.h (limited to 'include') diff --git a/include/configs/actux1.h b/include/configs/actux1.h deleted file mode 100644 index 9b8bd78..0000000 --- a/include/configs/actux1.h +++ /dev/null @@ -1,226 +0,0 @@ -/* - * (C) Copyright 2007 - * Michael Schwingen, michael@schwingen.org - * - * Configuration settings for the AcTux-1 board. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -#define CONFIG_IXP425 1 -#define CONFIG_ACTUX1 1 - -#define CONFIG_MACH_TYPE 1479 - -#define CONFIG_DISPLAY_CPUINFO 1 -#define CONFIG_DISPLAY_BOARDINFO 1 - -#define CONFIG_IXP_SERIAL -#define CONFIG_SYS_IXP425_CONSOLE IXP425_UART2 -#define CONFIG_BAUDRATE 115200 -#define CONFIG_BOOTDELAY 3 -#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */ -#define CONFIG_BOARD_EARLY_INIT_F 1 -#define CONFIG_SYS_LDSCRIPT "board/actux1/u-boot.lds" - -/*************************************************************** - * U-boot generic defines start here. - ***************************************************************/ -/* - * Size of malloc() pool - */ -#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) - -/* allow to overwrite serial and ethaddr */ -#define CONFIG_ENV_OVERWRITE - -/* Command line configuration. */ -#include - -#define CONFIG_CMD_ELF -#ifdef CONFIG_PCI -#define CONFIG_CMD_PCI -#define CONFIG_PCI_PNP -#define CONFIG_IXP_PCI -#define CONFIG_PCI_SCAN_SHOW -#define CONFIG_CMD_PCI_ENUM -#endif - -#define CONFIG_BOOTCOMMAND "run boot_flash" -/* enable passing of ATAGs */ -#define CONFIG_CMDLINE_TAG 1 -#define CONFIG_SETUP_MEMORY_TAGS 1 -#define CONFIG_INITRD_TAG 1 -#define CONFIG_REVISION_TAG 1 - -#if defined(CONFIG_CMD_KGDB) -# define CONFIG_KGDB_BAUDRATE 230400 -#endif - -/* Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP -/* Console I/O Buffer Size */ -#define CONFIG_SYS_CBSIZE 256 -/* Print Buffer Size */ -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) -/* max number of command args */ -#define CONFIG_SYS_MAXARGS 16 -/* Boot Argument Buffer Size */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE - -#define CONFIG_SYS_MEMTEST_START 0x00400000 -#define CONFIG_SYS_MEMTEST_END 0x00800000 - -/* timer clock - 2* OSC_IN system clock */ -#define CONFIG_IXP425_TIMER_CLK 66666666 - -/* default load address */ -#define CONFIG_SYS_LOAD_ADDR 0x00010000 - -/* valid baudrates */ -#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, \ - 115200, 230400 } -#define CONFIG_SERIAL_RTS_ACTIVE 1 - -/* Expansion bus settings */ -#define CONFIG_SYS_EXP_CS0 0xbd113842 - -/* SDRAM settings */ -#define CONFIG_NR_DRAM_BANKS 1 -#define PHYS_SDRAM_1 0x00000000 -#define CONFIG_SYS_SDRAM_BASE 0x00000000 - -#ifdef CONFIG_RAM_32MB -# define CONFIG_SYS_SDR_CONFIG 0x18 -# define PHYS_SDRAM_1_SIZE 0x02000000 -# define CONFIG_SYS_SDRAM_REFRESH_CNT 0x81a -# define CONFIG_SYS_SDR_MODE_CONFIG 0x1 -# define CONFIG_SYS_DRAM_SIZE 0x02000000 -#else /* 16MB SDRAM */ -# define CONFIG_SYS_SDR_CONFIG 0x3A -# define PHYS_SDRAM_1_SIZE 0x01000000 -# define CONFIG_SYS_SDRAM_REFRESH_CNT 0x81a -# define CONFIG_SYS_SDR_MODE_CONFIG 0x1 -# define CONFIG_SYS_DRAM_SIZE 0x01000000 -#endif - -/* FLASH organization */ -#define CONFIG_SYS_TEXT_BASE 0x50000000 -#ifdef CONFIG_FLASH2X2 -# define CONFIG_SYS_MAX_FLASH_BANKS 2 -/* max number of sectors on one chip */ -# define CONFIG_SYS_MAX_FLASH_SECT 40 -# define PHYS_FLASH_1 0x50000000 -# define PHYS_FLASH_2 0x50200000 -# define CONFIG_SYS_FLASH_BANKS_LIST { PHYS_FLASH_1, PHYS_FLASH_2 } -#endif -#ifdef CONFIG_FLASH1X8 -# define CONFIG_SYS_MAX_FLASH_BANKS 1 -/* max number of sectors on one chip */ -# define CONFIG_SYS_MAX_FLASH_SECT 140 -# define PHYS_FLASH_1 0x50000000 -# define CONFIG_SYS_FLASH_BANKS_LIST { PHYS_FLASH_1 } -#endif - -#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 -#define CONFIG_SYS_MONITOR_BASE PHYS_FLASH_1 -#define CONFIG_SYS_MONITOR_LEN (256 << 10) -#define CONFIG_BOARD_SIZE_LIMIT 262144 - -/* Use common CFI driver */ -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_FLASH_CFI_DRIVER -/* no byte writes on IXP4xx */ -#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT -/* print 'E' for empty sector on flinfo */ -#define CONFIG_SYS_FLASH_EMPTY_INFO - -/* Ethernet */ - -/* include IXP4xx NPE support */ -#define CONFIG_IXP4XX_NPE 1 -/* NPE0 PHY address */ -#define CONFIG_PHY_ADDR 0 -/* NPE1 PHY address (HW Release E only) */ -#define CONFIG_PHY1_ADDR 1 -/* MII PHY management */ -#define CONFIG_MII 1 -/* Number of ethernet rx buffers & descriptors */ -#define CONFIG_SYS_RX_ETH_BUFFER 16 -#define CONFIG_RESET_PHY_R 1 - -#define CONFIG_HAS_ETH1 1 - -#define CONFIG_CMD_DHCP -#define CONFIG_CMD_NET -#define CONFIG_CMD_MII -#define CONFIG_CMD_PING -#undef CONFIG_CMD_NFS - -/* BOOTP options */ -#define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME - -/* Cache Configuration */ -#define CONFIG_SYS_CACHELINE_SIZE 32 - -/* - * environment organization: - * one flash sector, embedded in uboot area (bottom bootblock flash) - */ -#define CONFIG_ENV_IS_IN_FLASH 1 -#define CONFIG_ENV_SIZE 0x2000 -#define CONFIG_ENV_ADDR (PHYS_FLASH_1 + 0x4000) -#define CONFIG_SYS_USE_PPCENV 1 - -#define CONFIG_EXTRA_ENV_SETTINGS \ - "npe_ucode=50040000\0" \ - "mtd=IXP4XX-Flash.0:256k(uboot),64k(ucode),1152k(linux),-(root)\0" \ - "kerneladdr=50050000\0" \ - "kernelfile=actux1/uImage\0" \ - "rootfile=actux1/rootfs\0" \ - "rootaddr=50170000\0" \ - "loadaddr=10000\0" \ - "updateboot_ser=mw.b 10000 ff 40000;" \ - " loady ${loadaddr};" \ - " run eraseboot writeboot\0" \ - "updateboot_net=mw.b 10000 ff 40000;" \ - " tftp ${loadaddr} actux1/u-boot.bin;" \ - " run eraseboot writeboot\0" \ - "eraseboot=protect off 50000000 50003fff;" \ - " protect off 50006000 5003ffff;" \ - " erase 50000000 50003fff;" \ - " erase 50006000 5003ffff\0" \ - "writeboot=cp.b 10000 50000000 4000;" \ - " cp.b 16000 50006000 3a000\0" \ - "updateucode=loady;" \ - " era ${npe_ucode} +${filesize};" \ - " cp.b ${loadaddr} ${npe_ucode} ${filesize}\0" \ - "updateroot=tftp ${loadaddr} ${rootfile};" \ - " era ${rootaddr} +${filesize};" \ - " cp.b ${loadaddr} ${rootaddr} ${filesize}\0" \ - "updatekern=tftp ${loadaddr} ${kernelfile};" \ - " era ${kerneladdr} +${filesize};" \ - " cp.b ${loadaddr} ${kerneladdr} ${filesize}\0" \ - "flashargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock3" \ - " rootfstype=squashfs,jffs2 init=/etc/preinit\0" \ - "netargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock3" \ - " rootfstype=squashfs,jffs2 init=/etc/preinit\0" \ - "addtty=setenv bootargs ${bootargs} console=ttyS1,${baudrate}\0" \ - "addeth=setenv bootargs ${bootargs} ethaddr=${ethaddr}\0" \ - "boot_flash=run flashargs addtty addeth;" \ - " bootm ${kerneladdr}\0" \ - "boot_net=run netargs addtty addeth;" \ - " tftpboot ${loadaddr} ${kernelfile};" \ - " bootm\0" - -/* additions for new relocation code, must be added to all boards */ -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE) - -#endif /* __CONFIG_H */ -- cgit v1.1 From 13e0ee7f9acf6f1af0db7147ea8d157668f45ca6 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Tue, 28 Jan 2014 00:06:45 +0100 Subject: ARM: IXP: Remove actux2 board The board is unmaintained, just like the rest of the IXP. Signed-off-by: Marek Vasut Cc: Albert Aribaud Cc: Michael Schwingen Cc: Tom Rini --- include/configs/actux2.h | 206 ----------------------------------------------- 1 file changed, 206 deletions(-) delete mode 100644 include/configs/actux2.h (limited to 'include') diff --git a/include/configs/actux2.h b/include/configs/actux2.h deleted file mode 100644 index f0cbff7..0000000 --- a/include/configs/actux2.h +++ /dev/null @@ -1,206 +0,0 @@ -/* - * (C) Copyright 2007 - * Michael Schwingen, michael@schwingen.org - * - * Configuration settings for the AcTux-2 board. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -#define CONFIG_IXP425 1 -#define CONFIG_ACTUX2 1 - -#define CONFIG_MACH_TYPE 1480 - -#define CONFIG_DISPLAY_CPUINFO 1 -#define CONFIG_DISPLAY_BOARDINFO 1 - -#define CONFIG_IXP_SERIAL -#define CONFIG_SYS_IXP425_CONSOLE IXP425_UART2 -#define CONFIG_BAUDRATE 115200 -#define CONFIG_BOOTDELAY 5 -#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */ -#define CONFIG_BOARD_EARLY_INIT_F 1 -#define CONFIG_SYS_LDSCRIPT "board/actux2/u-boot.lds" - -/*************************************************************** - * U-boot generic defines start here. - ***************************************************************/ -/* Size of malloc() pool */ -#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) - -/* allow to overwrite serial and ethaddr */ -#define CONFIG_ENV_OVERWRITE - -/* Command line configuration. */ -#include - -#define CONFIG_CMD_ELF -#undef CONFIG_CMD_PCI -#undef CONFIG_PCI - -#define CONFIG_BOOTCOMMAND "run boot_flash" -/* enable passing of ATAGs */ -#define CONFIG_CMDLINE_TAG 1 -#define CONFIG_SETUP_MEMORY_TAGS 1 -#define CONFIG_INITRD_TAG 1 -#define CONFIG_REVISION_TAG 1 - -#if defined(CONFIG_CMD_KGDB) -# define CONFIG_KGDB_BAUDRATE 230400 -#endif - -/* Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP -/* Console I/O Buffer Size */ -#define CONFIG_SYS_CBSIZE 256 -/* Print Buffer Size */ -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) -/* max number of command args */ -#define CONFIG_SYS_MAXARGS 16 -/* Boot Argument Buffer Size */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE - -#define CONFIG_SYS_MEMTEST_START 0x00400000 -#define CONFIG_SYS_MEMTEST_END 0x00800000 - -/* timer clock - 2* OSC_IN system clock */ -#define CONFIG_IXP425_TIMER_CLK 66666666 - -/* default load address */ -#define CONFIG_SYS_LOAD_ADDR 0x00010000 - -/* valid baudrates */ -#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, \ - 115200, 230400 } -#define CONFIG_SERIAL_RTS_ACTIVE 1 - -/* Expansion bus settings */ -#define CONFIG_SYS_EXP_CS0 0xbd113042 - -/* SDRAM settings */ -#define CONFIG_NR_DRAM_BANKS 1 -#define PHYS_SDRAM_1 0x00000000 -#define CONFIG_SYS_SDRAM_BASE 0x00000000 - -/* 16MB SDRAM */ -#define CONFIG_SYS_SDR_CONFIG 0x3A -#define PHYS_SDRAM_1_SIZE 0x01000000 -#define CONFIG_SYS_SDRAM_REFRESH_CNT 0x81a -#define CONFIG_SYS_SDR_MODE_CONFIG 0x1 -#define CONFIG_SYS_DRAM_SIZE 0x01000000 - -/* FLASH organization */ -#define CONFIG_SYS_TEXT_BASE 0x50000000 -#define CONFIG_SYS_MAX_FLASH_BANKS 1 -/* max number of sectors on one chip */ -#define CONFIG_SYS_MAX_FLASH_SECT 140 -#define PHYS_FLASH_1 0x50000000 -#define CONFIG_SYS_FLASH_BANKS_LIST { PHYS_FLASH_1 } - -#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 -#define CONFIG_SYS_MONITOR_BASE PHYS_FLASH_1 -#define CONFIG_SYS_MONITOR_LEN (256 << 10) -#define CONFIG_BOARD_SIZE_LIMIT 262144 - -/* Use common CFI driver */ -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_FLASH_CFI_DRIVER -/* no byte writes on IXP4xx */ -#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT - -/* print 'E' for empty sector on flinfo */ -#define CONFIG_SYS_FLASH_EMPTY_INFO - -/* Ethernet */ - -/* include IXP4xx NPE support */ -#define CONFIG_IXP4XX_NPE 1 -/* NPE0 PHY address */ -#define CONFIG_PHY_ADDR 0x00 -/* MII PHY management */ -#define CONFIG_MII 1 -/* fixed-speed switch without standard PHY registers on MII */ -#define CONFIG_MII_NPE0_FIXEDLINK 1 -#define CONFIG_MII_NPE0_SPEED 100 -#define CONFIG_MII_NPE0_FULLDUPLEX 1 - -/* Number of ethernet rx buffers & descriptors */ -#define CONFIG_SYS_RX_ETH_BUFFER 16 -#define CONFIG_RESET_PHY_R 1 -/* ethernet switch connected to MII port */ -#define CONFIG_MII_ETHSWITCH 1 - -#define CONFIG_CMD_DHCP -#define CONFIG_CMD_NET -#define CONFIG_CMD_MII -#define CONFIG_CMD_PING -#undef CONFIG_CMD_NFS - -/* BOOTP options */ -#define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME - -/* Cache Configuration */ -#define CONFIG_SYS_CACHELINE_SIZE 32 - -/* - * environment organization: - * one flash sector, embedded in uboot area (bottom bootblock flash) - */ -#define CONFIG_ENV_IS_IN_FLASH 1 -#define CONFIG_ENV_SIZE 0x2000 -#define CONFIG_ENV_ADDR (PHYS_FLASH_1 + 0x4000) -#define CONFIG_SYS_USE_PPCENV 1 - -#define CONFIG_EXTRA_ENV_SETTINGS \ - "npe_ucode=50040000\0" \ - "mtd=IXP4XX-Flash.0:256k(uboot),64k(ucode),1152k(linux),-(root)\0" \ - "kerneladdr=50050000\0" \ - "kernelfile=actux2/uImage\0" \ - "rootfile=actux2/rootfs\0" \ - "rootaddr=50170000\0" \ - "loadaddr=10000\0" \ - "updateboot_ser=mw.b 10000 ff 40000;" \ - " loady ${loadaddr};" \ - " run eraseboot writeboot\0" \ - "updateboot_net=mw.b 10000 ff 40000;" \ - " tftp ${loadaddr} actux2/u-boot.bin;" \ - " run eraseboot writeboot\0" \ - "eraseboot=protect off 50000000 50003fff;" \ - " protect off 50006000 5003ffff;" \ - " erase 50000000 50003fff;" \ - " erase 50006000 5003ffff\0" \ - "writeboot=cp.b 10000 50000000 4000;" \ - " cp.b 16000 50006000 3a000\0" \ - "updateucode=loady;" \ - " era ${npe_ucode} +${filesize};" \ - " cp.b ${loadaddr} ${npe_ucode} ${filesize}\0" \ - "updateroot=tftp ${loadaddr} ${rootfile};" \ - " era ${rootaddr} +${filesize};" \ - " cp.b ${loadaddr} ${rootaddr} ${filesize}\0" \ - "updatekern=tftp ${loadaddr} ${kernelfile};" \ - " era ${kerneladdr} +${filesize};" \ - " cp.b ${loadaddr} ${kerneladdr} ${filesize}\0" \ - "flashargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock3" \ - " rootfstype=squashfs,jffs2 init=/etc/preinit\0" \ - "netargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock3" \ - " rootfstype=squashfs,jffs2 init=/etc/preinit\0" \ - "addtty=setenv bootargs ${bootargs} console=ttyS0,${baudrate}\0" \ - "addeth=setenv bootargs ${bootargs} ethaddr=${ethaddr}\0" \ - "boot_flash=run flashargs addtty addeth;" \ - " bootm ${kerneladdr}\0" \ - "boot_net=run netargs addtty addeth;" \ - " tftpboot ${loadaddr} ${kernelfile};" \ - " bootm\0" - -/* additions for new relocation code, must be added to all boards */ -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE) - -#endif /* __CONFIG_H */ -- cgit v1.1 From 38da33f3c1fabeb0350c1bd0ed28556802cc7c12 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Tue, 28 Jan 2014 00:08:10 +0100 Subject: ARM: IXP: Remove actux3 board The board is unmaintained, just like the rest of the IXP. Signed-off-by: Marek Vasut Cc: Albert Aribaud Cc: Michael Schwingen Cc: Tom Rini --- include/configs/actux3.h | 205 ----------------------------------------------- 1 file changed, 205 deletions(-) delete mode 100644 include/configs/actux3.h (limited to 'include') diff --git a/include/configs/actux3.h b/include/configs/actux3.h deleted file mode 100644 index 7639107..0000000 --- a/include/configs/actux3.h +++ /dev/null @@ -1,205 +0,0 @@ -/* - * (C) Copyright 2007 - * Michael Schwingen, michael@schwingen.org - * - * Configuration settings for the AcTux-3 board. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -#define CONFIG_IXP425 1 -#define CONFIG_ACTUX3 1 - -#define CONFIG_MACH_TYPE 1481 - -#define CONFIG_DISPLAY_CPUINFO 1 -#define CONFIG_DISPLAY_BOARDINFO 1 - -#define CONFIG_IXP_SERIAL -#define CONFIG_SYS_IXP425_CONSOLE IXP425_UART2 -#define CONFIG_BAUDRATE 115200 -#define CONFIG_BOOTDELAY 3 -#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */ -#define CONFIG_BOARD_EARLY_INIT_F 1 -#define CONFIG_SYS_LDSCRIPT "board/actux3/u-boot.lds" - -/*************************************************************** - * U-boot generic defines start here. - ***************************************************************/ -/* Size of malloc() pool */ -#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) - -/* allow to overwrite serial and ethaddr */ -#define CONFIG_ENV_OVERWRITE - -/* Command line configuration. */ -#include - -#define CONFIG_CMD_ELF - -#define CONFIG_BOOTCOMMAND "run boot_flash" -/* enable passing of ATAGs */ -#define CONFIG_CMDLINE_TAG 1 -#define CONFIG_SETUP_MEMORY_TAGS 1 -#define CONFIG_INITRD_TAG 1 -#define CONFIG_REVISION_TAG 1 - -#if defined(CONFIG_CMD_KGDB) -# define CONFIG_KGDB_BAUDRATE 230400 -#endif - -/* Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP -/* Console I/O Buffer Size */ -#define CONFIG_SYS_CBSIZE 256 -/* Print Buffer Size */ -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) -/* max number of command args */ -#define CONFIG_SYS_MAXARGS 16 -/* Boot Argument Buffer Size */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE - -#define CONFIG_SYS_MEMTEST_START 0x00400000 -#define CONFIG_SYS_MEMTEST_END 0x00800000 - -/* timer clock - 2* OSC_IN system clock */ -#define CONFIG_IXP425_TIMER_CLK 66666666 - -/* default load address */ -#define CONFIG_SYS_LOAD_ADDR 0x00010000 - -/* valid baudrates */ -#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, \ - 115200, 230400 } -#define CONFIG_SERIAL_RTS_ACTIVE 1 - -/* Expansion bus settings */ -#define CONFIG_SYS_EXP_CS0 0xbd113442 - -/* SDRAM settings */ -#define CONFIG_NR_DRAM_BANKS 1 -#define PHYS_SDRAM_1 0x00000000 -#define CONFIG_SYS_SDRAM_BASE 0x00000000 - -/* 16MB SDRAM */ -#define CONFIG_SYS_SDR_CONFIG 0x3A -#define PHYS_SDRAM_1_SIZE 0x01000000 -#define CONFIG_SYS_SDRAM_REFRESH_CNT 0x81a -#define CONFIG_SYS_SDR_MODE_CONFIG 0x1 -#define CONFIG_SYS_DRAM_SIZE 0x01000000 - -/* FLASH organization */ -#define CONFIG_SYS_TEXT_BASE 0x50000000 -#define CONFIG_SYS_MAX_FLASH_BANKS 1 -/* max number of sectors on one chip */ -#define CONFIG_SYS_MAX_FLASH_SECT 140 -#define PHYS_FLASH_1 0x50000000 -#define CONFIG_SYS_FLASH_BANKS_LIST { PHYS_FLASH_1 } - -#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 -#define CONFIG_SYS_MONITOR_BASE PHYS_FLASH_1 -#define CONFIG_SYS_MONITOR_LEN (256 << 10) -#define CONFIG_BOARD_SIZE_LIMIT 262144 - -/* Use common CFI driver */ -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_FLASH_CFI_DRIVER -/* no byte writes on IXP4xx */ -#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT - -/* print 'E' for empty sector on flinfo */ -#define CONFIG_SYS_FLASH_EMPTY_INFO - -/* Ethernet */ - -/* include IXP4xx NPE support */ -#define CONFIG_IXP4XX_NPE 1 - -/* NPE0 PHY address */ -#define CONFIG_PHY_ADDR 0x10 -/* MII PHY management */ -#define CONFIG_MII 1 -/* fixed-speed switch without standard PHY registers on MII */ -#define CONFIG_MII_NPE0_FIXEDLINK 1 -#define CONFIG_MII_NPE0_SPEED 100 -#define CONFIG_MII_NPE0_FULLDUPLEX 1 - -/* Number of ethernet rx buffers & descriptors */ -#define CONFIG_SYS_RX_ETH_BUFFER 16 -#define CONFIG_RESET_PHY_R 1 -/* ethernet switch connected to MII port */ -#define CONFIG_MII_ETHSWITCH 1 - -#define CONFIG_CMD_DHCP -#define CONFIG_CMD_NET -#define CONFIG_CMD_MII -#define CONFIG_CMD_PING -#undef CONFIG_CMD_NFS - -/* BOOTP options */ -#define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME - -/* Cache Configuration */ -#define CONFIG_SYS_CACHELINE_SIZE 32 - -/* - * environment organization: - * one flash sector, embedded in uboot area (bottom bootblock flash) - */ -#define CONFIG_ENV_IS_IN_FLASH 1 -#define CONFIG_ENV_SIZE 0x2000 -#define CONFIG_ENV_ADDR (PHYS_FLASH_1 + 0x4000) -#define CONFIG_SYS_USE_PPCENV 1 - -#define CONFIG_EXTRA_ENV_SETTINGS \ - "npe_ucode=50040000\0" \ - "mtd=IXP4XX-Flash.0:256k(uboot),64k(ucode),1152k(linux),-(root)\0" \ - "kerneladdr=50050000\0" \ - "kernelfile=actux3/uImage\0" \ - "rootfile=actux3/rootfs\0" \ - "rootaddr=50170000\0" \ - "loadaddr=10000\0" \ - "updateboot_ser=mw.b 10000 ff 40000;" \ - " loady ${loadaddr};" \ - " run eraseboot writeboot\0" \ - "updateboot_net=mw.b 10000 ff 40000;" \ - " tftp ${loadaddr} actux3/u-boot.bin;" \ - " run eraseboot writeboot\0" \ - "eraseboot=protect off 50000000 50003fff;" \ - " protect off 50006000 5003ffff;" \ - " erase 50000000 50003fff;" \ - " erase 50006000 5003ffff\0" \ - "writeboot=cp.b 10000 50000000 4000;" \ - " cp.b 16000 50006000 3a000\0" \ - "updateucode=loady;" \ - " era ${npe_ucode} +${filesize};" \ - " cp.b ${loadaddr} ${npe_ucode} ${filesize}\0" \ - "updateroot=tftp ${loadaddr} ${rootfile};" \ - " era ${rootaddr} +${filesize};" \ - " cp.b ${loadaddr} ${rootaddr} ${filesize}\0" \ - "updatekern=tftp ${loadaddr} ${kernelfile};" \ - " era ${kerneladdr} +${filesize};" \ - " cp.b ${loadaddr} ${kerneladdr} ${filesize}\0" \ - "flashargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock3" \ - " rootfstype=squashfs,jffs2 init=/etc/preinit\0" \ - "netargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock3" \ - " rootfstype=squashfs,jffs2 init=/etc/preinit\0" \ - "addtty=setenv bootargs ${bootargs} console=ttyS1,${baudrate}\0" \ - "addeth=setenv bootargs ${bootargs} ethaddr=${ethaddr}\0" \ - "boot_flash=run flashargs addtty addeth;" \ - " bootm ${kerneladdr}\0" \ - "boot_net=run netargs addtty addeth;" \ - " tftpboot ${loadaddr} ${kernelfile};" \ - " bootm\0" - -/* additions for new relocation code, must be added to all boards */ -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE) - -#endif /* __CONFIG_H */ -- cgit v1.1 From 6ff7aafa4b1f3a3f3808c9a9d9257f13e880689b Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Tue, 28 Jan 2014 00:09:01 +0100 Subject: ARM: IXP: Remove actux4 board The board is unmaintained, just like the rest of the IXP. Signed-off-by: Marek Vasut Cc: Albert Aribaud Cc: Michael Schwingen Cc: Tom Rini --- include/configs/actux4.h | 204 ----------------------------------------------- 1 file changed, 204 deletions(-) delete mode 100644 include/configs/actux4.h (limited to 'include') diff --git a/include/configs/actux4.h b/include/configs/actux4.h deleted file mode 100644 index 12bd98a..0000000 --- a/include/configs/actux4.h +++ /dev/null @@ -1,204 +0,0 @@ -/* - * (C) Copyright 2007 - * Michael Schwingen, michael@schwingen.org - * - * Configuration settings for the AcTux-4 board. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -#define CONFIG_IXP425 1 -#define CONFIG_ACTUX4 1 - -#define CONFIG_MACH_TYPE 1532 - -#define CONFIG_DISPLAY_CPUINFO 1 -#define CONFIG_DISPLAY_BOARDINFO 1 - -#define CONFIG_IXP_SERIAL -#define CONFIG_SYS_IXP425_CONSOLE IXP425_UART1 -#define CONFIG_BAUDRATE 115200 -#define CONFIG_BOOTDELAY 3 -#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */ -#define CONFIG_BOARD_EARLY_INIT_F 1 - -/*************************************************************** - * U-boot generic defines start here. - ***************************************************************/ -/* Size of malloc() pool */ -#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) - -/* allow to overwrite serial and ethaddr */ -#define CONFIG_ENV_OVERWRITE - -/* Command line configuration */ -#include - -#define CONFIG_CMD_ELF - -#define CONFIG_PCI -#ifdef CONFIG_PCI -#define CONFIG_CMD_PCI -#define CONFIG_PCI_PNP -#define CONFIG_IXP_PCI -#define CONFIG_PCI_SCAN_SHOW -#define CONFIG_CMD_PCI_ENUM -#endif - -#define CONFIG_BOOTCOMMAND "run boot_flash" -/* enable passing of ATAGs */ -#define CONFIG_CMDLINE_TAG 1 -#define CONFIG_SETUP_MEMORY_TAGS 1 -#define CONFIG_INITRD_TAG 1 - -#if defined(CONFIG_CMD_KGDB) -# define CONFIG_KGDB_BAUDRATE 230400 -#endif - -/* Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP -/* Console I/O Buffer Size */ -#define CONFIG_SYS_CBSIZE 256 -/* Print Buffer Size */ -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) -/* max number of command args */ -#define CONFIG_SYS_MAXARGS 16 -/* Boot Argument Buffer Size */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE - -#define CONFIG_SYS_MEMTEST_START 0x00400000 -#define CONFIG_SYS_MEMTEST_END 0x00800000 - -/* timer clock - 2* OSC_IN system clock */ -#define CONFIG_IXP425_TIMER_CLK 66000000 - -/* default load address */ -#define CONFIG_SYS_LOAD_ADDR 0x00010000 - -/* valid baudrates */ -#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, \ - 115200, 230400 } -#define CONFIG_SERIAL_RTS_ACTIVE 1 - -/* Expansion bus settings */ -#define CONFIG_SYS_EXP_CS0 0xbd113003 - -/* SDRAM settings */ -#define CONFIG_NR_DRAM_BANKS 1 -#define PHYS_SDRAM_1 0x00000000 -#define CONFIG_SYS_SDRAM_BASE 0x00000000 - -/* 32MB SDRAM */ -#define CONFIG_SYS_SDR_CONFIG 0x18 -#define PHYS_SDRAM_1_SIZE 0x02000000 -#define CONFIG_SYS_SDRAM_REFRESH_CNT 0x81a -#define CONFIG_SYS_SDR_MODE_CONFIG 0x1 -#define CONFIG_SYS_DRAM_SIZE 0x02000000 - -/* FLASH organization */ -#define CONFIG_SYS_TEXT_BASE 0x50000000 -#define CONFIG_SYS_MAX_FLASH_BANKS 2 -/* max # of sectors per chip */ -#define CONFIG_SYS_MAX_FLASH_SECT 70 -#define PHYS_FLASH_1 0x50000000 -#define PHYS_FLASH_2 0x51000000 -#define CONFIG_SYS_FLASH_BANKS_LIST { PHYS_FLASH_1, PHYS_FLASH_2 } - -#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 -#define CONFIG_SYS_MONITOR_BASE PHYS_FLASH_1 -#define CONFIG_SYS_MONITOR_LEN (252 << 10) -#define CONFIG_BOARD_SIZE_LIMIT 258048 - -/* Use common CFI driver */ -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_FLASH_CFI_DRIVER -/* board provides its own flash_init code */ -#define CONFIG_FLASH_CFI_LEGACY 1 -/* no byte writes on IXP4xx */ -#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT -/* SST 39VF020 etc. support */ -#define CONFIG_SYS_FLASH_LEGACY_256Kx8 1 - -/* print 'E' for empty sector on flinfo */ -#define CONFIG_SYS_FLASH_EMPTY_INFO - -/* Ethernet */ - -/* include IXP4xx NPE support */ -#define CONFIG_IXP4XX_NPE 1 - -/* NPE0 PHY address */ -#define CONFIG_PHY_ADDR 0x1C -/* MII PHY management */ -#define CONFIG_MII 1 - -/* Number of ethernet rx buffers & descriptors */ -#define CONFIG_SYS_RX_ETH_BUFFER 16 - -#define CONFIG_CMD_DHCP -#define CONFIG_CMD_NET -#define CONFIG_CMD_MII -#define CONFIG_CMD_PING -#undef CONFIG_CMD_NFS - -/* BOOTP options */ -#define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME - -/* Cache Configuration */ -#define CONFIG_SYS_CACHELINE_SIZE 32 - -/* environment organization: one complete 4k flash sector */ -#define CONFIG_ENV_IS_IN_FLASH 1 -#define CONFIG_ENV_SIZE 0x1000 -#define CONFIG_ENV_ADDR (PHYS_FLASH_1 + 0x3f000) - -#define CONFIG_EXTRA_ENV_SETTINGS \ - "npe_ucode=51000000\0" \ - "mtd=IXP4XX-Flash.0:252k(uboot),4k(uboot_env);" \ - "IXP4XX-Flash.1:128k(ucode),1280k(linux),-(root)\0" \ - "kerneladdr=51020000\0" \ - "kernelfile=actux4/uImage\0" \ - "rootfile=actux4/rootfs\0" \ - "rootaddr=51160000\0" \ - "loadaddr=10000\0" \ - "updateboot_ser=mw.b 10000 ff 40000;" \ - " loady ${loadaddr};" \ - " run eraseboot writeboot\0" \ - "updateboot_net=mw.b 10000 ff 40000;" \ - " tftp ${loadaddr} actux4/u-boot.bin;" \ - " run eraseboot writeboot\0" \ - "eraseboot=protect off 50000000 5003efff;" \ - " erase 50000000 +${filesize}\0" \ - "writeboot=cp.b 10000 50000000 ${filesize}\0" \ - "updateucode=loady;" \ - " era ${npe_ucode} +${filesize};" \ - " cp.b ${loadaddr} ${npe_ucode} ${filesize}\0" \ - "updateroot=tftp ${loadaddr} ${rootfile};" \ - " era ${rootaddr} +${filesize};" \ - " cp.b ${loadaddr} ${rootaddr} ${filesize}\0" \ - "updatekern=tftp ${loadaddr} ${kernelfile};" \ - " era ${kerneladdr} +${filesize};" \ - " cp.b ${loadaddr} ${kerneladdr} ${filesize}\0" \ - "flashargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock4" \ - " rootfstype=squashfs,jffs2 init=/etc/preinit\0" \ - "netargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock4" \ - " rootfstype=squashfs,jffs2 init=/etc/preinit\0" \ - "addtty=setenv bootargs ${bootargs} console=ttyS0,${baudrate}\0" \ - "addeth=setenv bootargs ${bootargs} ethaddr=${ethaddr}\0" \ - "boot_flash=run flashargs addtty addeth;" \ - " bootm ${kerneladdr}\0" \ - "boot_net=run netargs addtty addeth;" \ - " tftpboot ${loadaddr} ${kernelfile};" \ - " bootm\0" - -/* additions for new relocation code, must be added to all boards */ -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE) - -#endif /* __CONFIG_H */ -- cgit v1.1 From e317de6b083adee81187fe1bba8b2fdf0ac983e7 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Tue, 28 Jan 2014 00:10:46 +0100 Subject: ARM: IXP: Remove dvl_host board The board is unmaintained, just like the rest of the IXP. Signed-off-by: Marek Vasut Cc: Albert Aribaud Cc: Michael Schwingen Cc: Tom Rini --- include/configs/dvlhost.h | 222 ---------------------------------------------- 1 file changed, 222 deletions(-) delete mode 100644 include/configs/dvlhost.h (limited to 'include') diff --git a/include/configs/dvlhost.h b/include/configs/dvlhost.h deleted file mode 100644 index 1af7f16..0000000 --- a/include/configs/dvlhost.h +++ /dev/null @@ -1,222 +0,0 @@ -/* - * (C) Copyright 2009 - * Michael Schwingen, michael@schwingen.org - * - * Configuration settings for the - * dLAN200 AV Wireless G ("dvlhost") board. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -#define CONFIG_IXP425 1 -#define CONFIG_DVLHOST 1 - -#define CONFIG_MACH_TYPE 1343 - -#define CONFIG_DISPLAY_CPUINFO 1 -#define CONFIG_DISPLAY_BOARDINFO 1 - -#define CONFIG_IXP_SERIAL -#define CONFIG_SYS_IXP425_CONSOLE IXP425_UART2 -#define CONFIG_BAUDRATE 115200 -#define CONFIG_BOOTDELAY 3 -#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */ -#define CONFIG_BOARD_EARLY_INIT_F 1 -#define CONFIG_SYS_LDSCRIPT "board/dvlhost/u-boot.lds" - -/*************************************************************** - * U-boot generic defines start here. - ***************************************************************/ -/* Size of malloc() pool */ -#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) - -/* allow to overwrite serial and ethaddr */ -#define CONFIG_ENV_OVERWRITE - -/* Command line configuration. */ -#include - -#define CONFIG_CMD_ELF -#define CONFIG_PCI -#ifdef CONFIG_PCI -#define CONFIG_CMD_PCI -#define CONFIG_PCI_PNP -#define CONFIG_IXP_PCI -#define CONFIG_PCI_SCAN_SHOW -#define CONFIG_CMD_PCI_ENUM -#endif - -#define CONFIG_BOOTCOMMAND "run boot_flash" -/* enable passing of ATAGs */ -#define CONFIG_CMDLINE_TAG 1 -#define CONFIG_SETUP_MEMORY_TAGS 1 -#define CONFIG_INITRD_TAG 1 - -#if defined(CONFIG_CMD_KGDB) -# define CONFIG_KGDB_BAUDRATE 230400 -#endif - -/* Miscellaneous configurable options */ -#define CONFIG_SYS_LONGHELP -/* Console I/O Buffer Size */ -#define CONFIG_SYS_CBSIZE 256 -/* Print Buffer Size */ -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) -/* max number of command args */ -#define CONFIG_SYS_MAXARGS 16 -/* Boot Argument Buffer Size */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE - -#define CONFIG_SYS_MEMTEST_START 0x00000000 -#define CONFIG_SYS_MEMTEST_END 0x01D80000 - -/* timer clock - 2* OSC_IN system clock */ -#define CONFIG_IXP425_TIMER_CLK 66666666 - -/* default load address */ -#define CONFIG_SYS_LOAD_ADDR 0x00010000 - -/* valid baudrates */ -#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, \ - 115200, 230400 } -#define CONFIG_SERIAL_RTS_ACTIVE 1 - -/* Expansion bus settings */ -#define CONFIG_SYS_EXP_CS0 0xbd113442 - -/* SDRAM settings */ -#define CONFIG_NR_DRAM_BANKS 1 -#define PHYS_SDRAM_1 0x00000000 -#define CONFIG_SYS_SDRAM_BASE 0x00000000 - -/* 32MB SDRAM: 2* 8Mx16, CL3 */ -#define CONFIG_SYS_SDR_CONFIG 0x18 -#define PHYS_SDRAM_1_SIZE 0x02000000 -#define CONFIG_SYS_SDRAM_REFRESH_CNT 0x800 -#define CONFIG_SYS_SDR_MODE_CONFIG 0x1 -#define CONFIG_SYS_DRAM_SIZE PHYS_SDRAM_1_SIZE - -/* FLASH organization: one Spansion S29AL032D-04 Flash */ -#define CONFIG_SYS_TEXT_BASE 0x50000000 -#define CONFIG_SYS_MAX_FLASH_BANKS 1 -/* max number of sectors on one chip */ -#define CONFIG_SYS_MAX_FLASH_SECT 140 -#define PHYS_FLASH_1 0x50000000 -#define CONFIG_SYS_FLASH_BANKS_LIST { PHYS_FLASH_1 } - -#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 -#define CONFIG_SYS_MONITOR_BASE PHYS_FLASH_1 -#define CONFIG_SYS_MONITOR_LEN (256 << 10) -#define CONFIG_BOARD_SIZE_LIMIT 262144 - -/* Use common CFI driver */ -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_FLASH_CFI_DRIVER -/* no byte writes on IXP4xx */ -#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT - -/* print 'E' for empty sector on flinfo */ -#define CONFIG_SYS_FLASH_EMPTY_INFO - -/* Ethernet */ - -/* include IXP4xx NPE support */ -#define CONFIG_IXP4XX_NPE 1 - -/* NPE0 PHY: MII dLAN200 AVmodule, 100BaseT-FDX fixed */ -#define CONFIG_PHY_ADDR 0x18 -/* NPE1 PHY: MII IP175 switch, port 5 is host port */ -#define CONFIG_PHY1_ADDR 0x05 -/* MII PHY management */ -#define CONFIG_MII 1 -/* fixed-speed powerline modem without standard PHY registers on MII */ -#define CONFIG_MII_NPE0_FIXEDLINK 1 -#define CONFIG_MII_NPE0_SPEED 100 -#define CONFIG_MII_NPE0_FULLDUPLEX 1 -/* fixed-speed switch without standard PHY registers on MII */ -#define CONFIG_MII_NPE1_FIXEDLINK 1 -#define CONFIG_MII_NPE1_SPEED 100 -#define CONFIG_MII_NPE1_FULLDUPLEX 1 - -/* Number of ethernet rx buffers & descriptors */ -#define CONFIG_SYS_RX_ETH_BUFFER 16 -#define CONFIG_RESET_PHY_R 1 -/* ethernet switch connected to MII port */ -#define CONFIG_MII_ETHSWITCH 1 -#define CONFIG_HAS_ETH1 1 - -#define CONFIG_CMD_DHCP -#define CONFIG_CMD_NET -#define CONFIG_CMD_MII -#define CONFIG_CMD_PING -#undef CONFIG_CMD_NFS - -/* BOOTP options */ -#define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME - -/* Cache Configuration */ -#define CONFIG_SYS_CACHELINE_SIZE 32 - -/* - * environment organization: - * one flash sector, embedded in uboot area (bottom bootblock flash) - */ -#define CONFIG_ENV_IS_IN_FLASH 1 -#define CONFIG_ENV_SIZE 0x2000 -#define CONFIG_ENV_ADDR (PHYS_FLASH_1 + 0x4000) -#define CONFIG_SYS_USE_PPCENV 1 - -#define CONFIG_EXTRA_ENV_SETTINGS \ - "npe_ucode=50040000\0" \ - "ethprime=NPE1\0" \ - "ethrotate=no\0" \ - "mtd=IXP4XX-Flash.0:256k(uboot),64k(ucode),1152k(linux),-(root),\0" \ - "kerneladdr=50050000\0" \ - "kernelfile=dvlhost/uImage\0" \ - "rootfile=dvlhost/rootfs\0" \ - "rootaddr=50170000\0" \ - "loadaddr=10000\0" \ - "updateboot_ser=mw.b 10000 ff 40000;" \ - " loady ${loadaddr};" \ - " run eraseboot writeboot\0" \ - "updateboot_net=mw.b 10000 ff 40000;" \ - " tftp ${loadaddr} dvlhost/u-boot.bin;" \ - " run eraseboot writeboot\0" \ - "eraseboot=protect off 50000000 50003fff;" \ - " protect off 50006000 5003ffff;" \ - " erase 50000000 50003fff;" \ - " erase 50006000 5003ffff\0" \ - "writeboot=cp.b 10000 50000000 4000;" \ - " cp.b 16000 50006000 3a000\0" \ - "updateucode=loady;" \ - " era ${npe_ucode} +${filesize};" \ - " cp.b ${loadaddr} ${npe_ucode} ${filesize}\0" \ - "updateroot=tftp ${loadaddr} ${rootfile};" \ - " era ${rootaddr} +${filesize};" \ - " cp.b ${loadaddr} ${rootaddr} ${filesize}\0" \ - "updatekern=tftp ${loadaddr} ${kernelfile};" \ - " era ${kerneladdr} +${filesize};" \ - " cp.b ${loadaddr} ${kerneladdr} ${filesize}\0" \ - "flashargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock3" \ - " rootfstype=squashfs,jffs2 init=/etc/preinit\0" \ - "netargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock3" \ - " rootfstype=squashfs,jffs2 init=/etc/preinit\0" \ - "addtty=setenv bootargs ${bootargs} console=ttyS0,${baudrate}\0" \ - "addeth=setenv bootargs ${bootargs} ethaddr=${ethaddr}\0" \ - "boot_flash=run flashargs addtty addeth;" \ - " bootm ${kerneladdr}\0" \ - "boot_net=run netargs addtty addeth;" \ - " tftpboot ${loadaddr} ${kernelfile};" \ - " bootm\0" - -/* additions for new relocation code, must be added to all boards */ -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE) - -#endif /* __CONFIG_H */ -- cgit v1.1 From f016f8ca3d503af004a649de1c704d5ddf3def22 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Thu, 6 Feb 2014 02:43:45 +0100 Subject: usb: mv_udc: Rename to ci_udc The mv_udc is not marvell-specific anymore. The mv_udc is used to drive generic ChipIdea CI13xxx series OTG cores, so rename the driver to ci_udc instead. Signed-off-by: Marek Vasut Cc: Eric Nelson Cc: Stefano Babic --- include/configs/nitrogen6x.h | 2 +- include/configs/sansa_fuze_plus.h | 2 +- include/configs/xfi3.h | 2 +- include/usb/ci_udc.h | 14 ++++++++++++++ include/usb/mv_udc.h | 14 -------------- 5 files changed, 17 insertions(+), 17 deletions(-) create mode 100644 include/usb/ci_udc.h delete mode 100644 include/usb/mv_udc.h (limited to 'include') diff --git a/include/configs/nitrogen6x.h b/include/configs/nitrogen6x.h index f4ff5cd..e44ec88 100644 --- a/include/configs/nitrogen6x.h +++ b/include/configs/nitrogen6x.h @@ -31,7 +31,7 @@ #define CONFIG_BOARD_EARLY_INIT_F #define CONFIG_MISC_INIT_R #define CONFIG_MXC_GPIO -#define CONFIG_MV_UDC +#define CONFIG_CI_UDC #define CONFIG_USBD_HS #define CONFIG_USB_GADGET_DUALSPEED #define CONFIG_USB_ETHER diff --git a/include/configs/sansa_fuze_plus.h b/include/configs/sansa_fuze_plus.h index a85eb1c..8cce34a 100644 --- a/include/configs/sansa_fuze_plus.h +++ b/include/configs/sansa_fuze_plus.h @@ -56,7 +56,7 @@ #define CONFIG_EHCI_MXS_PORT0 #define CONFIG_USB_MAX_CONTROLLER_COUNT 1 -#define CONFIG_MV_UDC /* ChipIdea CI13xxx UDC */ +#define CONFIG_CI_UDC /* ChipIdea CI13xxx UDC */ #define CONFIG_USB_GADGET_DUALSPEED #define CONFIG_USB_ETHER diff --git a/include/configs/xfi3.h b/include/configs/xfi3.h index 022bc95..8e6b365 100644 --- a/include/configs/xfi3.h +++ b/include/configs/xfi3.h @@ -55,7 +55,7 @@ #define CONFIG_EHCI_MXS_PORT0 #define CONFIG_USB_MAX_CONTROLLER_COUNT 1 -#define CONFIG_MV_UDC /* ChipIdea CI13xxx UDC */ +#define CONFIG_CI_UDC /* ChipIdea CI13xxx UDC */ #define CONFIG_USB_GADGET_DUALSPEED #define CONFIG_USB_ETHER diff --git a/include/usb/ci_udc.h b/include/usb/ci_udc.h new file mode 100644 index 0000000..0dee504 --- /dev/null +++ b/include/usb/ci_udc.h @@ -0,0 +1,14 @@ +/* + * Copyright 2011, Marvell Semiconductor Inc. + * Lei Wen + * + * SPDX-License-Identifier: GPL-2.0+ + */ + + +#ifndef __CI_UDC_H__ +#define __CI_UDC_H__ + +#define EP_MAX_PACKET_SIZE 0x200 +#define EP0_MAX_PACKET_SIZE 64 +#endif /* __CI_UDC_H__ */ diff --git a/include/usb/mv_udc.h b/include/usb/mv_udc.h deleted file mode 100644 index f6c7b5e..0000000 --- a/include/usb/mv_udc.h +++ /dev/null @@ -1,14 +0,0 @@ -/* - * Copyright 2011, Marvell Semiconductor Inc. - * Lei Wen - * - * SPDX-License-Identifier: GPL-2.0+ - */ - - -#ifndef __MV_UDC_H__ -#define __MV_UDC_H__ - -#define EP_MAX_PACKET_SIZE 0x200 -#define EP0_MAX_PACKET_SIZE 64 -#endif /* __MV_UDC_H__ */ -- cgit v1.1 From 31993d6a3585d478d792fc70240129b0ca03f55f Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Thu, 26 Sep 2013 16:39:03 +0200 Subject: fpga: zynqpl: Add support for zc7015 device Just extend tables with this new device. Signed-off-by: Michal Simek --- include/zynqpl.h | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'include') diff --git a/include/zynqpl.h b/include/zynqpl.h index 6107cbf..c81446e 100644 --- a/include/zynqpl.h +++ b/include/zynqpl.h @@ -17,6 +17,7 @@ extern int zynq_dump(Xilinx_desc *desc, const void *buf, size_t bsize); extern int zynq_info(Xilinx_desc *desc); #define XILINX_ZYNQ_7010 0x2 +#define XILINX_ZYNQ_7015 0x1b #define XILINX_ZYNQ_7020 0x7 #define XILINX_ZYNQ_7030 0xc #define XILINX_ZYNQ_7045 0x11 @@ -24,6 +25,7 @@ extern int zynq_info(Xilinx_desc *desc); /* Device Image Sizes */ #define XILINX_XC7Z010_SIZE 16669920/8 +#define XILINX_XC7Z015_SIZE 28085344/8 #define XILINX_XC7Z020_SIZE 32364512/8 #define XILINX_XC7Z030_SIZE 47839328/8 #define XILINX_XC7Z045_SIZE 106571232/8 @@ -33,6 +35,9 @@ extern int zynq_info(Xilinx_desc *desc); #define XILINX_XC7Z010_DESC(cookie) \ { xilinx_zynq, devcfg, XILINX_XC7Z010_SIZE, NULL, cookie, "7z010" } +#define XILINX_XC7Z015_DESC(cookie) \ +{ xilinx_zynq, devcfg, XILINX_XC7Z015_SIZE, NULL, cookie, "7z015" } + #define XILINX_XC7Z020_DESC(cookie) \ { xilinx_zynq, devcfg, XILINX_XC7Z020_SIZE, NULL, cookie, "7z020" } -- cgit v1.1 From dbf3de2dd26cae37d16b00b348828c883b658cc5 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Thu, 6 Feb 2014 14:26:05 -0500 Subject: include/usb/s3c_udc.h: Add With e0059ea switching to using SZ_1K, we need to #include here for everyone to build still. Signed-off-by: Tom Rini --- include/usb/s3c_udc.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/usb/s3c_udc.h b/include/usb/s3c_udc.h index 6dead2f..ce3dd2c 100644 --- a/include/usb/s3c_udc.h +++ b/include/usb/s3c_udc.h @@ -10,6 +10,7 @@ #define __S3C_USB_GADGET #include +#include #include #include #include -- cgit v1.1 From eee2fab0bddb2c460a96a943d7ed6b0f3718f0fd Mon Sep 17 00:00:00 2001 From: Piotr Wilczek Date: Wed, 22 Jan 2014 15:54:32 +0100 Subject: board:samsung:common: set envs with board unified information This patch sets envs that describe board information. The following envs are set: soc_id, soc_rev, board_rev. Based on this information, if CONFIG_OF_LIBFDT is enabled, the 'fdtfile' env is set as: fdtfile=${soc_family}${soc_id}-${board}.dtb The generated envs are intenionally not saved to persistent storage. Signed-off-by: Piotr Wilczek Signed-off-by: Kyungmin Park Signed-off-by: Minkyu Kang --- include/samsung/misc.h | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) (limited to 'include') diff --git a/include/samsung/misc.h b/include/samsung/misc.h index 1a6d47f..ede6c15 100644 --- a/include/samsung/misc.h +++ b/include/samsung/misc.h @@ -1,6 +1,14 @@ #ifndef __SAMSUNG_MISC_COMMON_H__ #define __SAMSUNG_MISC_COMMON_H__ +#ifdef CONFIG_REVISION_TAG +u32 get_board_rev(void); +#endif + +#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG +void set_board_info(void); +#endif + #ifdef CONFIG_LCD_MENU enum { BOOT_MODE_INFO, @@ -10,10 +18,6 @@ enum { BOOT_MODE_EXIT, }; -#ifdef CONFIG_REVISION_TAG -u32 get_board_rev(void); -#endif - void keys_init(void); void check_boot_mode(void); #endif /* CONFIG_LCD_MENU */ -- cgit v1.1 From 2ac9a35bcd441b06601b8fcfc1d39b6b3d9f0aef Mon Sep 17 00:00:00 2001 From: Piotr Wilczek Date: Wed, 22 Jan 2014 15:54:33 +0100 Subject: board:samsung:goni: add env variables describing platform This patch adds variables describing platform (soc, board, vendor) to default environment. Signed-off-by: Piotr Wilczek Signed-off-by: Kyungmin Park Cc: Mateusz Zalega Signed-off-by: Minkyu Kang --- include/configs/s5p_goni.h | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'include') diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h index 4cdf937..991c43e 100644 --- a/include/configs/s5p_goni.h +++ b/include/configs/s5p_goni.h @@ -34,6 +34,7 @@ #define CONFIG_SETUP_MEMORY_TAGS #define CONFIG_CMDLINE_TAG +#define CONFIG_REVISION_TAG #define CONFIG_INITRD_TAG #define CONFIG_CMDLINE_EDITING @@ -113,8 +114,13 @@ #define CONFIG_UBIFS_OPTION "rootflags=bulk_read,no_chk_data_crc" +#define CONFIG_MISC_COMMON +#define CONFIG_MISC_INIT_R + #define CONFIG_ENV_OVERWRITE #define CONFIG_SYS_CONSOLE_IS_IN_ENV +#define CONFIG_ENV_VARS_UBOOT_CONFIG +#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG #define CONFIG_EXTRA_ENV_SETTINGS \ CONFIG_UPDATEB \ "updatek=" \ -- cgit v1.1 From 815a6072f06557ce776744ef2c3b57189a2abd3e Mon Sep 17 00:00:00 2001 From: Piotr Wilczek Date: Wed, 22 Jan 2014 15:54:34 +0100 Subject: board:samsung:universal: add env variables describing platform This patch adds variables describing platform (soc, board, vendor) to default environment. Signed-off-by: Piotr Wilczek Signed-off-by: Kyungmin Park Cc: Przemyslaw Marczak Acked-by: Przemyslaw Marczak Signed-off-by: Minkyu Kang --- include/configs/s5pc210_universal.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'include') diff --git a/include/configs/s5pc210_universal.h b/include/configs/s5pc210_universal.h index bfb044b..67921e9 100644 --- a/include/configs/s5pc210_universal.h +++ b/include/configs/s5pc210_universal.h @@ -124,6 +124,9 @@ #define CONFIG_SYS_CONSOLE_INFO_QUIET #define CONFIG_SYS_CONSOLE_IS_IN_ENV +#define CONFIG_ENV_VARS_UBOOT_CONFIG +#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG + #define CONFIG_EXTRA_ENV_SETTINGS \ "updateb=" \ "onenand erase 0x0 0x100000;" \ -- cgit v1.1 From 943eacde686f50fc82d18af88825ff74d8d89967 Mon Sep 17 00:00:00 2001 From: Piotr Wilczek Date: Wed, 22 Jan 2014 15:54:35 +0100 Subject: board:samsung:trats: add env variables describing platform This patch adds variables describing platform (soc, board, vendor) to default environment. Signed-off-by: Piotr Wilczek Signed-off-by: Kyungmin Park Cc: Lukasz Majewski Signed-off-by: Minkyu Kang --- include/configs/trats.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'include') diff --git a/include/configs/trats.h b/include/configs/trats.h index 41de414..6e14a59 100644 --- a/include/configs/trats.h +++ b/include/configs/trats.h @@ -154,6 +154,9 @@ #define CONFIG_SYS_CONSOLE_INFO_QUIET #define CONFIG_SYS_CONSOLE_IS_IN_ENV +#define CONFIG_ENV_VARS_UBOOT_CONFIG +#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG + #define CONFIG_EXTRA_ENV_SETTINGS \ "bootk=" \ "run loaddtb; run loaduimage; bootm 0x40007FC0 - ${fdtaddr}\0" \ -- cgit v1.1 From 8c57fb7d9aa1c9d46d797a0926d755e95a5cb64e Mon Sep 17 00:00:00 2001 From: Piotr Wilczek Date: Wed, 22 Jan 2014 15:54:36 +0100 Subject: board:samsung:trats2: add env variables describing platform This patch adds variables describing platform (soc, board, vendor) to default environment. Signed-off-by: Piotr Wilczek Signed-off-by: Kyungmin Park Signed-off-by: Minkyu Kang --- include/configs/trats2.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'include') diff --git a/include/configs/trats2.h b/include/configs/trats2.h index b72f492..0874717 100644 --- a/include/configs/trats2.h +++ b/include/configs/trats2.h @@ -152,6 +152,9 @@ #define CONFIG_SYS_CONSOLE_INFO_QUIET #define CONFIG_SYS_CONSOLE_IS_IN_ENV +#define CONFIG_ENV_VARS_UBOOT_CONFIG +#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG + /* Tizen - partitions definitions */ #define PARTS_CSA "csa" #define PARTS_BOOT "boot" -- cgit v1.1 From 425e26de292b9dc53a73ee5493d4eaf58c8d1c14 Mon Sep 17 00:00:00 2001 From: Piotr Wilczek Date: Wed, 22 Jan 2014 15:54:37 +0100 Subject: board:samsung:trats/trats2: enable boot with appended and separated DTB This patch modifies envs to enable dual kernel boot - with separated DTB if the DTB file is loaded successfully; - with DTB apppended to uImage if DTB file is not found; This is neccesssary for backward compatibilty. Signed-off-by: Piotr Wilczek Signed-off-by: Kyungmin Park Cc: Lukasz Majewski Signed-off-by: Minkyu Kang --- include/configs/trats.h | 9 ++++++--- include/configs/trats2.h | 9 ++++++--- 2 files changed, 12 insertions(+), 6 deletions(-) (limited to 'include') diff --git a/include/configs/trats.h b/include/configs/trats.h index 6e14a59..718107a 100644 --- a/include/configs/trats.h +++ b/include/configs/trats.h @@ -159,7 +159,11 @@ #define CONFIG_EXTRA_ENV_SETTINGS \ "bootk=" \ - "run loaddtb; run loaduimage; bootm 0x40007FC0 - ${fdtaddr}\0" \ + "run loaduimage;" \ + "if run loaddtb; then " \ + "bootm 0x40007FC0 - ${fdtaddr};" \ + "fi;" \ + "bootm 0x40007FC0;\0" \ "updatemmc=" \ "mmc boot 0 1 1 1; mmc write 0 0x42008000 0 0x200;" \ "mmc boot 0 1 1 0\0" \ @@ -182,7 +186,7 @@ "mmcboot=" \ "setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \ "${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo}; " \ - "run loaddtb; run loaduimage; bootm 0x40007FC0 - ${fdtaddr}\0" \ + "run bootk\0" \ "bootchart=setenv opts init=/sbin/bootchartd; run bootcmd\0" \ "boottrace=setenv opts initcall_debug; run bootcmd\0" \ "mmcoops=mmc read 0 0x40000000 0x40 8; md 0x40000000 0x400\0" \ @@ -221,7 +225,6 @@ "setenv spl_imgaddr;" \ "setenv spl_addr_tmp;\0" \ "fdtaddr=40800000\0" \ - "fdtfile=exynos4210-trats.dtb\0" /* Miscellaneous configurable options */ diff --git a/include/configs/trats2.h b/include/configs/trats2.h index 0874717..e30c428 100644 --- a/include/configs/trats2.h +++ b/include/configs/trats2.h @@ -186,7 +186,11 @@ #define CONFIG_EXTRA_ENV_SETTINGS \ "bootk=" \ - "run loaddtb; run loaduimage; bootm 0x40007FC0 - ${fdtaddr}\0" \ + "run loaduimage;" \ + "if run loaddtb; then " \ + "bootm 0x40007FC0 - ${fdtaddr};" \ + "fi;" \ + "bootm 0x40007FC0;\0" \ "updatemmc=" \ "mmc boot 0 1 1 1; mmc write 0x42008000 0 0x200;" \ "mmc boot 0 1 1 0\0" \ @@ -200,7 +204,7 @@ "mmcboot=" \ "setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \ "${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo}; " \ - "run loaddtb; run loaduimage; bootm 0x40007FC0 - ${fdtaddr}\0" \ + "run bootk\0" \ "bootchart=set opts init=/sbin/bootchartd; run bootcmd\0" \ "boottrace=setenv opts initcall_debug; run bootcmd\0" \ "verify=n\0" \ @@ -241,7 +245,6 @@ "setenv spl_imgaddr;" \ "setenv spl_addr_tmp;\0" \ "fdtaddr=40800000\0" \ - "fdtfile=exynos4412-trats2.dtb\0" /* * Miscellaneous configurable options -- cgit v1.1 From bc5d5428805c804cab67a0cc000bbf64e26acf71 Mon Sep 17 00:00:00 2001 From: Alexey Brodkin Date: Tue, 4 Feb 2014 12:56:16 +0400 Subject: arc: bdinfo, image and arc-specific init functions declarations support Signed-off-by: Alexey Brodkin Cc: Vineet Gupta Cc: Francois Bedard Cc: Wolfgang Denk Cc: Heiko Schocher --- include/common.h | 3 +++ include/image.h | 1 + 2 files changed, 4 insertions(+) (limited to 'include') diff --git a/include/common.h b/include/common.h index d5ebb25..221b776 100644 --- a/include/common.h +++ b/include/common.h @@ -408,6 +408,9 @@ static inline int setenv_addr(const char *varname, const void *addr) #ifdef CONFIG_MIPS # include #endif /* CONFIG_MIPS */ +#ifdef CONFIG_ARC +# include +#endif /* CONFIG_ARC */ #ifdef CONFIG_AUTO_COMPLETE int env_complete(char *var, int maxv, char *cmdv[], int maxsz, char *buf); diff --git a/include/image.h b/include/image.h index 7de2bb2..3ba8c2e 100644 --- a/include/image.h +++ b/include/image.h @@ -157,6 +157,7 @@ struct lmb; #define IH_ARCH_NDS32 20 /* ANDES Technology - NDS32 */ #define IH_ARCH_OPENRISC 21 /* OpenRISC 1000 */ #define IH_ARCH_ARM64 22 /* ARM64 */ +#define IH_ARCH_ARC 23 /* Synopsys DesignWare ARC */ /* * Image Types -- cgit v1.1 From 66712b8b460e9ba01374ca0df8aa8bcb3137e4bb Mon Sep 17 00:00:00 2001 From: Alexey Brodkin Date: Tue, 4 Feb 2014 12:56:18 +0400 Subject: arc: add Arcangel4 board support Arcangel4 is a FPGA-based development board that is used for prototyping and verificationof of both ARC hardware (CPUs) and software running upon CPU. This board avaialble in 2 flavours: * Little-endian (arcangel4) * Big-endian (arcangel4-be) Signed-off-by: Alexey Brodkin Cc: Vineet Gupta Cc: Francois Bedard Cc: Wolfgang Denk Cc: Heiko Schocher --- include/configs/arcangel4-be.h | 92 ++++++++++++++++++++++++++++++++++++++++++ include/configs/arcangel4.h | 91 +++++++++++++++++++++++++++++++++++++++++ 2 files changed, 183 insertions(+) create mode 100644 include/configs/arcangel4-be.h create mode 100644 include/configs/arcangel4.h (limited to 'include') diff --git a/include/configs/arcangel4-be.h b/include/configs/arcangel4-be.h new file mode 100644 index 0000000..88d27db --- /dev/null +++ b/include/configs/arcangel4-be.h @@ -0,0 +1,92 @@ +/* + * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _CONFIG_ARCANGEL4_H_ +#define _CONFIG_ARCANGEL4_H_ + +/* + * CPU configuration + */ +#define CONFIG_SYS_BIG_ENDIAN +#define CONFIG_ARC700 +#define CONFIG_ARC_MMU_VER 3 +#define CONFIG_SYS_CACHELINE_SIZE 64 +#define CONFIG_SYS_CLK_FREQ 70000000 +#define CONFIG_SYS_TIMER_RATE CONFIG_SYS_CLK_FREQ + +/* + * Board configuration + */ +#define CONFIG_SYS_GENERIC_BOARD +#define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is in RAM already */ + +#define CONFIG_ARCH_EARLY_INIT_R + +/* + * Memory configuration + */ +#define CONFIG_SYS_TEXT_BASE 0x81000000 +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE + +#define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000 +#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE +#define CONFIG_SYS_SDRAM_SIZE 0x10000000 /* 256 Mb */ + +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE) + +#define CONFIG_SYS_MALLOC_LEN 0x200000 /* 2 MB */ +#define CONFIG_SYS_BOOTM_LEN 0x2000000 /* 32 MB */ +#define CONFIG_SYS_LOAD_ADDR 0x82000000 + +#define CONFIG_SYS_NO_FLASH + +/* + * UART configuration + * + */ +#define CONFIG_ARC_SERIAL +#define CONFIG_ARC_UART_BASE 0xC0FC1000 +#define CONFIG_BAUDRATE 115200 + +/* + * Command line configuration + */ +#include + +#define CONFIG_CMD_ELF + +#define CONFIG_OF_LIBFDT + +#define CONFIG_AUTO_COMPLETE +#define CONFIG_SYS_MAXARGS 16 + +/* + * Environment settings + */ +#define CONFIG_ENV_IS_NOWHERE +#define CONFIG_ENV_SIZE 0x00200 /* 512 bytes */ +#define CONFIG_ENV_OFFSET 0 + +/* + * Environment configuration + */ +#define CONFIG_BOOTDELAY 3 +#define CONFIG_BOOTFILE "uImage" +#define CONFIG_BOOTARGS "console=ttyARC0,115200n8" +#define CONFIG_LOADADDR CONFIG_SYS_LOAD_ADDR + +/* + * Console configuration + */ +#define CONFIG_SYS_LONGHELP +#define CONFIG_SYS_PROMPT "arcangel4# " +#define CONFIG_SYS_CBSIZE 256 +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ + sizeof(CONFIG_SYS_PROMPT) + 16) + +#endif /* _CONFIG_ARCANGEL4_H_ */ diff --git a/include/configs/arcangel4.h b/include/configs/arcangel4.h new file mode 100644 index 0000000..4579eb9 --- /dev/null +++ b/include/configs/arcangel4.h @@ -0,0 +1,91 @@ +/* + * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _CONFIG_ARCANGEL4_H_ +#define _CONFIG_ARCANGEL4_H_ + +/* + * CPU configuration + */ +#define CONFIG_ARC700 +#define CONFIG_ARC_MMU_VER 3 +#define CONFIG_SYS_CACHELINE_SIZE 64 +#define CONFIG_SYS_CLK_FREQ 70000000 +#define CONFIG_SYS_TIMER_RATE CONFIG_SYS_CLK_FREQ + +/* + * Board configuration + */ +#define CONFIG_SYS_GENERIC_BOARD +#define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is in RAM already */ + +#define CONFIG_ARCH_EARLY_INIT_R + +/* + * Memory configuration + */ +#define CONFIG_SYS_TEXT_BASE 0x81000000 +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE + +#define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000 +#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE +#define CONFIG_SYS_SDRAM_SIZE 0x10000000 /* 256 Mb */ + +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE) + +#define CONFIG_SYS_MALLOC_LEN 0x200000 /* 2 MB */ +#define CONFIG_SYS_BOOTM_LEN 0x2000000 /* 32 MB */ +#define CONFIG_SYS_LOAD_ADDR 0x82000000 + +#define CONFIG_SYS_NO_FLASH + +/* + * UART configuration + * + */ +#define CONFIG_ARC_SERIAL +#define CONFIG_ARC_UART_BASE 0xC0FC1000 +#define CONFIG_BAUDRATE 115200 + +/* + * Command line configuration + */ +#include + +#define CONFIG_CMD_ELF + +#define CONFIG_OF_LIBFDT + +#define CONFIG_AUTO_COMPLETE +#define CONFIG_SYS_MAXARGS 16 + +/* + * Environment settings + */ +#define CONFIG_ENV_IS_NOWHERE +#define CONFIG_ENV_SIZE 0x00200 /* 512 bytes */ +#define CONFIG_ENV_OFFSET 0 + +/* + * Environment configuration + */ +#define CONFIG_BOOTDELAY 3 +#define CONFIG_BOOTFILE "uImage" +#define CONFIG_BOOTARGS "console=ttyARC0,115200n8" +#define CONFIG_LOADADDR CONFIG_SYS_LOAD_ADDR + +/* + * Console configuration + */ +#define CONFIG_SYS_LONGHELP +#define CONFIG_SYS_PROMPT "arcangel4# " +#define CONFIG_SYS_CBSIZE 256 +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ + sizeof(CONFIG_SYS_PROMPT) + 16) + +#endif /* _CONFIG_ARCANGEL4_H_ */ -- cgit v1.1 From a7069ddfa9b369e8bed449806a4422ad751246ab Mon Sep 17 00:00:00 2001 From: Alexey Brodkin Date: Tue, 4 Feb 2014 12:56:19 +0400 Subject: arc: add AXS101 board support AXS101 is a new generation of devlopment boards from Synopsys that houses ASIC with ARC700 and lots of DesignWare peripherals: * DW APB UART * DW Mobile Storage (MMC/SD) * DW I2C * DW GMAC Signed-off-by: Alexey Brodkin Cc: Vineet Gupta Cc: Francois Bedard Cc: Wolfgang Denk Cc: Heiko Schocher --- include/configs/axs101.h | 181 +++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 181 insertions(+) create mode 100644 include/configs/axs101.h (limited to 'include') diff --git a/include/configs/axs101.h b/include/configs/axs101.h new file mode 100644 index 0000000..af2e63b --- /dev/null +++ b/include/configs/axs101.h @@ -0,0 +1,181 @@ +/* + * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _CONFIG_AXS101_H_ +#define _CONFIG_AXS101_H_ + +/* + * CPU configuration + */ +#define CONFIG_ARC700 +#define CONFIG_ARC_MMU_VER 3 +#define CONFIG_SYS_CACHELINE_SIZE 32 +#define CONFIG_SYS_CLK_FREQ 750000000 +#define CONFIG_SYS_TIMER_RATE CONFIG_SYS_CLK_FREQ + +/* dwgmac doesn't work with D$ enabled now */ +#define CONFIG_SYS_DCACHE_OFF + +/* + * Board configuration + */ +#define CONFIG_SYS_GENERIC_BOARD +#define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is in RAM already */ + +#define CONFIG_ARCH_EARLY_INIT_R + +#define ARC_FPGA_PERIPHERAL_BASE 0xE0000000 +#define ARC_APB_PERIPHERAL_BASE 0xF0000000 +#define ARC_DWMMC_BASE (ARC_FPGA_PERIPHERAL_BASE + 0x15000) +#define ARC_DWGMAC_BASE (ARC_FPGA_PERIPHERAL_BASE + 0x18000) + +/* + * Memory configuration + */ +#define CONFIG_SYS_TEXT_BASE 0x81000000 +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE + +#define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000 +#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE +#define CONFIG_SYS_SDRAM_SIZE 0x10000000 /* 256 Mb */ + +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE) + +#define CONFIG_SYS_MALLOC_LEN 0x200000 /* 2 MB */ +#define CONFIG_SYS_BOOTM_LEN 0x2000000 /* 32 MB */ +#define CONFIG_SYS_LOAD_ADDR 0x82000000 + +/* + * NAND Flash configuration + */ +#define CONFIG_SYS_NO_FLASH +#define CONFIG_SYS_NAND_BASE (ARC_FPGA_PERIPHERAL_BASE + 0x16000) +#define CONFIG_SYS_MAX_NAND_DEVICE 1 + +/* + * UART configuration + * + * CONFIG_CONS_INDEX = 1 - Debug UART + * CONFIG_CONS_INDEX = 4 - FPGA UART connected to FTDI/USB + */ +#define CONFIG_CONS_INDEX 4 +#define CONFIG_SYS_NS16550 +#define CONFIG_SYS_NS16550_SERIAL +#define CONFIG_SYS_NS16550_REG_SIZE -4 +#if (CONFIG_CONS_INDEX == 1) + /* Debug UART */ +# define CONFIG_SYS_NS16550_CLK 33333000 +#else + /* FPGA UARTs use different clock */ +# define CONFIG_SYS_NS16550_CLK 33333333 +#endif +#define CONFIG_SYS_NS16550_COM1 (ARC_APB_PERIPHERAL_BASE + 0x5000) +#define CONFIG_SYS_NS16550_COM2 (ARC_FPGA_PERIPHERAL_BASE + 0x20000) +#define CONFIG_SYS_NS16550_COM3 (ARC_FPGA_PERIPHERAL_BASE + 0x21000) +#define CONFIG_SYS_NS16550_COM4 (ARC_FPGA_PERIPHERAL_BASE + 0x22000) +#define CONFIG_SYS_NS16550_MEM32 + +#define CONFIG_BAUDRATE 115200 +/* + * I2C configuration + */ +#define CONFIG_HARD_I2C +#define CONFIG_DW_I2C +#define CONFIG_I2C_MULTI_BUS +#define CONFIG_I2C_ENV_EEPROM_BUS 2 +#define CONFIG_SYS_I2C_SPEED 100000 +#define CONFIG_SYS_I2C_SLAVE 0 +#define CONFIG_SYS_I2C_BASE 0xE001D000 +#define CONFIG_SYS_I2C_BASE1 0xE001E000 +#define CONFIG_SYS_I2C_BASE2 0xE001F000 +#define CONFIG_SYS_I2C_BUS_MAX 3 +#define IC_CLK 50 + +/* + * EEPROM configuration + */ +#define CONFIG_SYS_I2C_MULTI_EEPROMS +#define CONFIG_SYS_I2C_EEPROM_ADDR (0xA8 >> 1) +#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 +#define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW 1 +#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3 +#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 32 + +/* + * SD/MMC configuration + */ +#define CONFIG_MMC +#define CONFIG_GENERIC_MMC +#define CONFIG_DWMMC +#define CONFIG_DOS_PARTITION + +/* + * Ethernet PHY configuration + */ +#define CONFIG_PHYLIB +#define CONFIG_MII +#define CONFIG_PHY_GIGE + +/* + * Ethernet configuration + */ +#define CONFIG_DESIGNWARE_ETH +#define CONFIG_DW_AUTONEG +#define CONFIG_DW_SEARCH_PHY +#define CONFIG_NET_MULTI + +/* + * Command line configuration + */ +#include + +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_EEPROM +#define CONFIG_CMD_ELF +#define CONFIG_CMD_FAT +#define CONFIG_CMD_I2C +#define CONFIG_CMD_MMC +#define CONFIG_CMD_NAND +#define CONFIG_CMD_PING +#define CONFIG_CMD_RARP + +#define CONFIG_OF_LIBFDT + +#define CONFIG_AUTO_COMPLETE +#define CONFIG_SYS_MAXARGS 16 + +/* + * Environment settings + */ +#define CONFIG_ENV_IS_IN_EEPROM +#define CONFIG_ENV_SIZE 0x00200 /* 512 bytes */ +#define CONFIG_ENV_OFFSET 0 + +/* + * Environment configuration + */ +#define CONFIG_BOOTDELAY 3 +#define CONFIG_BOOTFILE "uImage" +#define CONFIG_BOOTARGS "console=ttyS3,115200n8" +#define CONFIG_LOADADDR CONFIG_SYS_LOAD_ADDR + +/* + * Console configuration + */ +#define CONFIG_SYS_LONGHELP +#define CONFIG_SYS_PROMPT "axs# " +#define CONFIG_SYS_CBSIZE 256 +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ + sizeof(CONFIG_SYS_PROMPT) + 16) + +/* + * Misc utility configuration + */ +#define CONFIG_BOUNCE_BUFFER + +#endif /* _CONFIG_AXS101_H_ */ -- cgit v1.1 From 92a190aaab3536d695c51e0739f925910eb49889 Mon Sep 17 00:00:00 2001 From: Alexey Brodkin Date: Wed, 22 Jan 2014 20:54:06 +0400 Subject: net/designware - switch driver to phylib usage With this change driver will benefit from existing phylib and thus custom phy functionality implemented in the driver will go away: * Instantiation of the driver is now much shorter - 2 parameters instead of 4. * Simplified phy management/functoinality in driver is replaced with rich functionality of phylib. * Support of custom phy initialization is now done with existing "board_phy_config". Note that after this change some previously used config options (driver-specific PHY configuration) will be obsolete and they are simply substituted with similar options of phylib. For example: * CONFIG_DW_AUTONEG - no need in this one. Autonegotiation is enabled by default. * CONFIG_DW_SEARCH_PHY - if one wants to specify attached phy explicitly CONFIG_PHY_ADDR board config option has to be used, otherwise automatically the first discovered on MDIO bus phy will be used I believe there's no need now in "doc/README.designware_eth" because user only needs to instantiate the driver with "designware_initialize" whose prototype exists in "include/netdev.h". Cc: Joe Hershberger Cc: Vipin Kumar Cc: Stefan Roese Cc: Mischa Jonker Cc: Shiraz Hashim Cc: Albert ARIBAUD Cc: Amit Virdi Cc: Sonic Zhang Signed-off-by: Alexey Brodkin --- include/configs/bf609-ezkit.h | 3 ++- include/configs/spear-common.h | 4 +--- include/configs/spear6xx_evb.h | 3 +++ include/netdev.h | 2 +- 4 files changed, 7 insertions(+), 5 deletions(-) (limited to 'include') diff --git a/include/configs/bf609-ezkit.h b/include/configs/bf609-ezkit.h index 1a43e1b..12192ff 100644 --- a/include/configs/bf609-ezkit.h +++ b/include/configs/bf609-ezkit.h @@ -72,12 +72,13 @@ #define CONFIG_NET_MULTI #define CONFIG_HOSTNAME "bf609-ezkit" #define CONFIG_DESIGNWARE_ETH +#define CONFIG_PHY_ADDR 1 #define CONFIG_DW_PORTS 1 -#define CONFIG_DW_AUTONEG #define CONFIG_DW_ALTDESCRIPTOR #define CONFIG_CMD_NET #define CONFIG_CMD_MII #define CONFIG_MII +#define CONFIG_PHYLIB /* i2c Settings */ #define CONFIG_BFIN_TWI_I2C diff --git a/include/configs/spear-common.h b/include/configs/spear-common.h index 23f7ad7..e090a37 100644 --- a/include/configs/spear-common.h +++ b/include/configs/spear-common.h @@ -17,11 +17,9 @@ /* Ethernet driver configuration */ #define CONFIG_MII #define CONFIG_DESIGNWARE_ETH -#define CONFIG_DW_SEARCH_PHY -#define CONFIG_DW0_PHY 1 #define CONFIG_NET_MULTI +#define CONFIG_PHYLIB #define CONFIG_PHY_RESET_DELAY 10000 /* in usec */ -#define CONFIG_DW_AUTONEG #define CONFIG_PHY_GIGE /* Include GbE speed/duplex detection */ /* USBD driver configuration */ diff --git a/include/configs/spear6xx_evb.h b/include/configs/spear6xx_evb.h index 7f4dc58..28dddcc 100644 --- a/include/configs/spear6xx_evb.h +++ b/include/configs/spear6xx_evb.h @@ -37,6 +37,9 @@ #define CONFIG_SYS_FSMC_NAND_8BIT #define CONFIG_SYS_NAND_BASE 0xD2000000 +/* Ethernet PHY configuration */ +#define CONFIG_PHY_NATSEMI + /* Environment Settings */ #define CONFIG_EXTRA_ENV_SETTINGS CONFIG_EXTRA_ENV_USBTTY diff --git a/include/netdev.h b/include/netdev.h index 47fa80d..3705629 100644 --- a/include/netdev.h +++ b/include/netdev.h @@ -36,7 +36,7 @@ int calxedaxgmac_initialize(u32 id, ulong base_addr); int cs8900_initialize(u8 dev_num, int base_addr); int davinci_emac_initialize(void); int dc21x4x_initialize(bd_t *bis); -int designware_initialize(u32 id, ulong base_addr, u32 phy_addr, u32 interface); +int designware_initialize(ulong base_addr, u32 interface); int dm9000_initialize(bd_t *bis); int dnet_eth_initialize(int id, void *regs, unsigned int phy_addr); int e1000_initialize(bd_t *bis); -- cgit v1.1 From 1a78d28d024d458f24e78bd469e2e428145397fc Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Fri, 7 Feb 2014 08:52:06 -0500 Subject: x600: Switch to CONFIG_PHYLIB Now that the designware ethernet driver uses phylib we need to turn it on here. Acked-by: Stefan Roese Signed-off-by: Tom Rini --- include/configs/x600.h | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'include') diff --git a/include/configs/x600.h b/include/configs/x600.h index 39540e3..00b938a 100644 --- a/include/configs/x600.h +++ b/include/configs/x600.h @@ -74,10 +74,9 @@ /* Ethernet config options */ #define CONFIG_MII #define CONFIG_DESIGNWARE_ETH -#define CONFIG_DW_SEARCH_PHY #define CONFIG_NET_MULTI +#define CONFIG_PHYLIB #define CONFIG_PHY_RESET_DELAY 10000 /* in usec */ -#define CONFIG_DW_AUTONEG #define CONFIG_PHY_ADDR 0 /* PHY address */ #define CONFIG_PHY_GIGE /* Include GbE speed/duplex detection */ -- cgit v1.1 From d3e016cc28684cd32d826a9414a0e89ccf80861a Mon Sep 17 00:00:00 2001 From: Rajeshwari S Shinde Date: Wed, 5 Feb 2014 10:48:15 +0530 Subject: MMC: DWMMC: Correct the CLKDIV register value This patch corrects the divider value written to CLKDIV register. Since SDCLKIN is divided inside controller by the DIVRATIO value set in the CLKSEL register, we need to use the same output clock value to calculate the CLKDIV value. as per user manual: cclk_in = SDCLKIN / (DIVRATIO + 1) Input parameter to mmc_clk is changed to dwmci_host, since we need the same to read DWMCI_CLKSEL register. This improves the read timing values for channel 0 on SMDK5250 from 0.288sec to 0.144sec Signed-off-by: Rajeshwari S Shinde Acked-by: Jaehoon Chung Signed-off-by: Pantelis Antoniou --- include/dwmmc.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/dwmmc.h b/include/dwmmc.h index a02dd67..b641558 100644 --- a/include/dwmmc.h +++ b/include/dwmmc.h @@ -142,7 +142,7 @@ struct dwmci_host { void (*clksel)(struct dwmci_host *host); void (*board_init)(struct dwmci_host *host); - unsigned int (*get_mmc_clk)(int dev_index); + unsigned int (*get_mmc_clk)(struct dwmci_host *host); }; struct dwmci_idmac { -- cgit v1.1 From 7dbe63bc950bbd12d021f72bf04104688cd324a9 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Wed, 5 Feb 2014 10:24:18 -0500 Subject: SPL: Add CONFIG_SUPPORT_EMMC_BOOT support to CONFIG_SPL_FRAMEWORK We use the switch CONFIG_SUPPORT_EMMC_BOOT today to enable some additional features of the eMMC boot partitions. Add support for being told that we have booted from one of these partitions to the spl framework and implement this on TI OMAP/related. Cc: Pantelis Antoniou Signed-off-by: Tom Rini Signed-off-by: Pantelis Antoniou --- include/spl.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/spl.h b/include/spl.h index 5e24856..dad00c0 100644 --- a/include/spl.h +++ b/include/spl.h @@ -16,6 +16,7 @@ #define MMCSD_MODE_UNDEFINED 0 #define MMCSD_MODE_RAW 1 #define MMCSD_MODE_FAT 2 +#define MMCSD_MODE_EMMCBOOT 3 struct spl_image_info { const char *name; -- cgit v1.1 From 792970b0a344d905848fb98564ed469786af11b7 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Wed, 5 Feb 2014 10:24:21 -0500 Subject: cmd_mmc.c: Add 'partconf' command to mmc Add a partconf sub-command to the mmc command to allow for setting the boot_ack, boot_partition and partition_access fields of PARTITION_CONFIG (formerly BOOT_CONFIG, EXT_CSD[179]). Part of this requires changing the check for 'part' from an strncmp to a strcmp, like the rest of the sub-commands. Cc: Andy Fleming Cc: Pantelis Antoniou Acked-by: Jaehoon Chung Signed-off-by: Tom Rini Signed-off-by: Pantelis Antoniou --- include/mmc.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/mmc.h b/include/mmc.h index e1060b9..7e026da 100644 --- a/include/mmc.h +++ b/include/mmc.h @@ -312,6 +312,8 @@ int mmc_boot_partition_size_change(struct mmc *mmc, unsigned long bootsize, unsigned long rpmbsize); /* Function to send commands to open/close the specified boot partition */ int mmc_boot_part_access(struct mmc *mmc, u8 ack, u8 part_num, u8 access); +/* Function to modify the PARTITION_CONFIG field of EXT_CSD */ +int mmc_set_part_conf(struct mmc *mmc, u8 ack, u8 part_num, u8 access); /** * Start device initialization and return immediately; it does not block on -- cgit v1.1 From 5a99b9de1a845bf254292ae4730633e6ca8a29c7 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Wed, 5 Feb 2014 10:24:22 -0500 Subject: cmd_mmc.c: Add bootbus mmc sub-command Add a bootbus sub-command to the mmc command to allow for setting the boot_bus_width, reset_boot_bus_width and boot_mode fields of BOOT_BUS_WIDTH (EXT_CSD[177]). Acked-by: Jaehoon Chung Signed-off-by: Tom Rini Signed-off-by: Pantelis Antoniou --- include/mmc.h | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'include') diff --git a/include/mmc.h b/include/mmc.h index 7e026da..3594286 100644 --- a/include/mmc.h +++ b/include/mmc.h @@ -187,6 +187,9 @@ #define EXT_CSD_BOOT_PART_NUM(x) (x << 3) #define EXT_CSD_PARTITION_ACCESS(x) (x << 0) +#define EXT_CSD_BOOT_BUS_WIDTH_MODE(x) (x << 3) +#define EXT_CSD_BOOT_BUS_WIDTH_RESET(x) (x << 2) +#define EXT_CSD_BOOT_BUS_WIDTH_WIDTH(x) (x) #define R1_ILLEGAL_COMMAND (1 << 22) #define R1_APP_CMD (1 << 5) @@ -314,6 +317,8 @@ int mmc_boot_partition_size_change(struct mmc *mmc, unsigned long bootsize, int mmc_boot_part_access(struct mmc *mmc, u8 ack, u8 part_num, u8 access); /* Function to modify the PARTITION_CONFIG field of EXT_CSD */ int mmc_set_part_conf(struct mmc *mmc, u8 ack, u8 part_num, u8 access); +/* Function to modify the BOOT_BUS_WIDTH field of EXT_CSD */ +int mmc_set_boot_bus_width(struct mmc *mmc, u8 width, u8 reset, u8 mode); /** * Start device initialization and return immediately; it does not block on -- cgit v1.1 From 614b2bf1c9bf80dbad24f5e5ce1d115bf24a831d Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Wed, 5 Feb 2014 10:24:23 -0500 Subject: cmd_mmc.c: Drop open/close mmc sub-commands The open and close mmc sub-commands implement a hard-coded set of values specific to the SMDK5250 platform. Remove these commands as what they did can be done instead with a series of mmc dev / bootpart / bootbus commands instead now. Cc: Amar Cc: Minkyu Kang Acked-by: Jaehoon Chung Signed-off-by: Tom Rini Signed-off-by: Pantelis Antoniou --- include/mmc.h | 2 -- 1 file changed, 2 deletions(-) (limited to 'include') diff --git a/include/mmc.h b/include/mmc.h index 3594286..e95a237 100644 --- a/include/mmc.h +++ b/include/mmc.h @@ -313,8 +313,6 @@ int mmc_set_dsr(struct mmc *mmc, u16 val); /* Function to change the size of boot partition and rpmb partitions */ int mmc_boot_partition_size_change(struct mmc *mmc, unsigned long bootsize, unsigned long rpmbsize); -/* Function to send commands to open/close the specified boot partition */ -int mmc_boot_part_access(struct mmc *mmc, u8 ack, u8 part_num, u8 access); /* Function to modify the PARTITION_CONFIG field of EXT_CSD */ int mmc_set_part_conf(struct mmc *mmc, u8 ack, u8 part_num, u8 access); /* Function to modify the BOOT_BUS_WIDTH field of EXT_CSD */ -- cgit v1.1 From 378ec0f8161d12df63016b7ad1e9415b4221b7dc Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Wed, 5 Feb 2014 10:24:24 -0500 Subject: omap5_uevm: Add CONFIG_SUPPORT_EMMC_BOOT, document usage Add a README to the board which lists the commands required to enable booting from the eMMC boot partitions found on the board. Signed-off-by: Tom Rini Signed-off-by: Pantelis Antoniou --- include/configs/omap5_uevm.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/configs/omap5_uevm.h b/include/configs/omap5_uevm.h index 76c5106..3df502e 100644 --- a/include/configs/omap5_uevm.h +++ b/include/configs/omap5_uevm.h @@ -37,6 +37,7 @@ #define CONFIG_PARTITION_UUIDS #define CONFIG_CMD_PART #define CONFIG_HSMMC2_8BIT +#define CONFIG_SUPPORT_EMMC_BOOT /* Required support for the TCA642X GPIO we have on the uEVM */ #define CONFIG_TCA642X -- cgit v1.1 From b818d9ab8d96471c40ccbd4541a46dfa415eda73 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Wed, 5 Feb 2014 10:24:25 -0500 Subject: dra7xx_evm: Add CONFIG_SUPPORT_EMMC_BOOT, document usage Add a README to the board which lists the commands required to enable booting from the eMMC boot partitions found on the board. Cc: Lokesh Vutla Signed-off-by: Tom Rini Signed-off-by: Pantelis Antoniou --- include/configs/dra7xx_evm.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/configs/dra7xx_evm.h b/include/configs/dra7xx_evm.h index f210ed8..3c53f0a 100644 --- a/include/configs/dra7xx_evm.h +++ b/include/configs/dra7xx_evm.h @@ -73,6 +73,8 @@ #define CONFIG_SPL_SPI_CS 0 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000 +#define CONFIG_SUPPORT_EMMC_BOOT + /* USB xHCI HOST */ #define CONFIG_CMD_USB #define CONFIG_USB_HOST -- cgit v1.1 From bccaa476f69351c44f382668474896fb360d054f Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Tue, 28 Jan 2014 22:41:50 -0700 Subject: ARM: rpi_b: set $fdtfile in default environment U-Boot names the Raspberry Pi board rpi_b. This means that the common expression for DTB filename ${soc}-${board}.dtb expands to bcm2835-rpi_b.dtb. However, the DTB generated by the Linux kernel is bcm2835-rpi-b.dtb. Set $fdtfile in U-Boot's environment so that scripts look for the correct DTB filename. An alternative would be to rename the U-Boot board to rpi-b. However, that change would be far more invasive, and end up affecting users (i.e they'd have to change their U-Boot build commands). Signed-off-by: Stephen Warren --- include/configs/rpi_b.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/configs/rpi_b.h b/include/configs/rpi_b.h index 0b7add7..976ceaa 100644 --- a/include/configs/rpi_b.h +++ b/include/configs/rpi_b.h @@ -123,6 +123,7 @@ "scriptaddr=0x00000000\0" \ "kernel_addr_r=0x01000000\0" \ "fdt_addr_r=0x02000000\0" \ + "fdtfile=bcm2835-rpi-b.dtb\0" \ "ramdisk_addr_r=0x02100000\0" \ "boot_targets=mmc0\0" \ \ -- cgit v1.1 From dfa94058f550e06405e80df4fb277fd306a77cbd Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Wed, 5 Feb 2014 07:56:07 +0100 Subject: zynq: Use full tftpboot command instead of shortcut tftp The reason is enabling tftpput command where tftp shorcut stops to work for tftpboot. Signed-off-by: Michal Simek --- include/configs/zynq-common.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index e7a8e9f..3b461e0 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -164,7 +164,7 @@ "fatload mmc 0 ${load_addr} ${fit_image} && " \ "bootm ${load_addr}\0" \ "jtagboot=echo TFTPing FIT to RAM... && " \ - "tftp ${load_addr} ${fit_image} && " \ + "tftpboot ${load_addr} ${fit_image} && " \ "bootm ${load_addr}\0" #define CONFIG_BOOTCOMMAND "run $modeboot" #define CONFIG_BOOTDELAY 3 /* -1 to Disable autoboot */ -- cgit v1.1 From 38716189d439c3ed8707e7bc1f430322ba7a810d Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Wed, 5 Feb 2014 08:06:29 +0100 Subject: zynq: Fix elf header generation This patch is here because of: "arm: keep all sections in ELF file" (sha1: 47ed5dd031d7d2c587e6afd386e79ccec1a1b7f7) Our tools expect to have elf with only LOAD header. Without this fix also PHDR, INTERP and DYNAMIC headers are available in ELF. Signed-off-by: Michal Simek --- include/configs/zynq-common.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index 3b461e0..9b6db04 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -228,6 +228,8 @@ # define CONFIG_SYS_MMC_MAX_DEVICE 1 #endif +#define CONFIG_SYS_LDSCRIPT "arch/arm/cpu/armv7/zynq/u-boot.lds" + /* Commands */ #include -- cgit v1.1 From 2a4ebef267ffb615ff753f6ce804e0643110e5a4 Mon Sep 17 00:00:00 2001 From: Holger Brunck Date: Mon, 27 Jan 2014 16:58:24 +0100 Subject: arm/km/suv31: switch to 256MB RAM We now use 256MB RAM instead of 128MB. We can use the same config file as kmnusa. Signed-off-by: Holger Brunck Acked-by: Valentin Longchamp --- include/configs/km_kirkwood.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'include') diff --git a/include/configs/km_kirkwood.h b/include/configs/km_kirkwood.h index 74c7232..2bd89b1 100644 --- a/include/configs/km_kirkwood.h +++ b/include/configs/km_kirkwood.h @@ -97,6 +97,9 @@ #define CONFIG_KM_IVM_BUS 1 /* I2C2 (Mux-Port 1)*/ #define CONFIG_IDENT_STRING "\nKeymile SUV31" #define CONFIG_HOSTNAME kmsuv31 +#undef CONFIG_SYS_KWD_CONFIG +#define CONFIG_SYS_KWD_CONFIG \ + $(SRCTREE)/$(CONFIG_BOARDDIR)/kwbimage_128M16_1.cfg #define CONFIG_KM_ENV_IS_IN_SPI_NOR #define CONFIG_KM_FPGA_CONFIG -- cgit v1.1 From 56cde17760deacc45866cdc6a2248d0fc245026d Mon Sep 17 00:00:00 2001 From: Holger Brunck Date: Mon, 27 Jan 2014 16:58:25 +0100 Subject: arm/km: add CONFIG_KM_BOARD_EXTRA_ENV to default environment This is needed for board specific additional environment variables. E.g. the mgcoge3un has this additional "waitforne" variable. Signed-off-by: Holger Brunck Acked-by: Valentin Longchamp --- include/configs/km/km_arm.h | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'include') diff --git a/include/configs/km/km_arm.h b/include/configs/km/km_arm.h index e74f85f..6278e76 100644 --- a/include/configs/km/km_arm.h +++ b/include/configs/km/km_arm.h @@ -289,10 +289,15 @@ int get_scl(void); " ${addr} " __stringify(CONFIG_ENV_OFFSET_REDUND) " 4\0" #endif +#ifndef CONFIG_KM_BOARD_EXTRA_ENV +#define CONFIG_KM_BOARD_EXTRA_ENV "" +#endif + /* * Default environment variables */ #define CONFIG_EXTRA_ENV_SETTINGS \ + CONFIG_KM_BOARD_EXTRA_ENV \ CONFIG_KM_DEF_ENV \ CONFIG_KM_NEW_ENV \ "arch=arm\0" \ -- cgit v1.1 From 7b2268b88fb9a67b13563fa61b8ae282b9aa6e00 Mon Sep 17 00:00:00 2001 From: Gerlando Falauto Date: Mon, 27 Jan 2014 16:58:27 +0100 Subject: arm/km: enable FDT for km_kirwkood This consists of: a) Defining the addresses, enabling fdtsupport [arm] b) Defining "cramfsloadfdt" [arm,powerpc => common] c) Adding the FDT address to bootm [arm,powerpc => common] d) Defining "tftpfdt" in ramfs-,develop- [arm,powerpc >= common] This should work with 3.10 kernels, whether loaded through TFTP (with rootfs either through NFS or TFTP-ramfs) or from the NAND. The machid was left unchanged, this should keep compatibility with both older and newer kernels. Signed-off-by: Valentin Longchamp Signed-off-by: Gerlando Falauto Signed-off-by: Holger Brunck Acked-by: Valentin Longchamp --- include/configs/km/keymile-common.h | 5 +++++ include/configs/km/km-powerpc.h | 5 ----- include/configs/km/km_arm.h | 8 +++++--- 3 files changed, 10 insertions(+), 8 deletions(-) (limited to 'include') diff --git a/include/configs/km/keymile-common.h b/include/configs/km/keymile-common.h index 2a15ad4..cb53dbd 100644 --- a/include/configs/km/keymile-common.h +++ b/include/configs/km/keymile-common.h @@ -220,6 +220,7 @@ CONFIG_KM_DEF_ENV_FLASH_BOOT \ CONFIG_KM_DEF_ENV_CONSTANTS \ "altbootcmd=run bootcmd\0" \ + "boot=bootm ${load_addr_r} - ${fdt_addr_r}\0" \ "bootcmd=km_checkbidhwk && " \ "setenv bootcmd \'if km_checktestboot; then; " \ "setenv boot_bank ${test_bank}; else; " \ @@ -229,6 +230,10 @@ "run ${subbootcmds}; reset\' && " \ "saveenv && saveenv && boot\0" \ "bootlimit=3\0" \ + "cramfsloadfdt=" \ + "cramfsload ${fdt_addr_r} " \ + "fdt_0x${IVM_BoardId}_0x${IVM_HWKey}.dtb\0" \ + "fdt_addr_r="__stringify(CONFIG_KM_FDT_ADDR) "\0" \ "init=/sbin/init-overlay.sh\0" \ "load_addr_r="__stringify(CONFIG_KM_KERNEL_ADDR) "\0" \ "load=tftpboot ${load_addr_r} ${u-boot}\0" \ diff --git a/include/configs/km/km-powerpc.h b/include/configs/km/km-powerpc.h index 2cebb2b..b03fdd9 100644 --- a/include/configs/km/km-powerpc.h +++ b/include/configs/km/km-powerpc.h @@ -70,11 +70,6 @@ #define CONFIG_KM_DEF_BOOT_ARGS_CPU "" #define CONFIG_KM_DEF_ENV_CPU \ - "boot=bootm ${load_addr_r} - ${fdt_addr_r}\0" \ - "cramfsloadfdt=" \ - "cramfsload ${fdt_addr_r} " \ - "fdt_0x${IVM_BoardId}_0x${IVM_HWKey}.dtb\0" \ - "fdt_addr_r=" __stringify(CONFIG_KM_FDT_ADDR) "\0" \ "u-boot="__stringify(CONFIG_HOSTNAME) "/u-boot.bin\0" \ "update=" \ "protect off " __stringify(BOOTFLASH_START) " +${filesize} && "\ diff --git a/include/configs/km/km_arm.h b/include/configs/km/km_arm.h index 6278e76..a5cc1c5 100644 --- a/include/configs/km/km_arm.h +++ b/include/configs/km/km_arm.h @@ -70,7 +70,8 @@ #define CONFIG_KM_PHRAM 0x17F000 #define CONFIG_KM_CRAMFS_ADDR 0x2400000 -#define CONFIG_KM_KERNEL_ADDR 0x2000000 /* 4096KBytes */ +#define CONFIG_KM_KERNEL_ADDR 0x2000000 /* 3098KBytes */ +#define CONFIG_KM_FDT_ADDR 0x23E0000 /* 128KBytes */ /* architecture specific default bootargs */ #define CONFIG_KM_DEF_BOOT_ARGS_CPU \ @@ -78,8 +79,6 @@ " boardid=0x${IVM_BoardId} hwkey=0x${IVM_HWKey}" #define CONFIG_KM_DEF_ENV_CPU \ - "boot=bootm ${load_addr_r} - -\0" \ - "cramfsloadfdt=true\0" \ "u-boot="__stringify(CONFIG_HOSTNAME) "/u-boot.kwb\0" \ CONFIG_KM_UPDATE_UBOOT \ "" @@ -87,6 +86,9 @@ #define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */ #define CONFIG_MISC_INIT_R +/* Pass open firmware flat tree */ +#define CONFIG_OF_LIBFDT + /* * NS16550 Configuration */ -- cgit v1.1 From b1c2a7ae32b6c5dd1dcb7cb29c862af01523ba36 Mon Sep 17 00:00:00 2001 From: Gerlando Falauto Date: Mon, 27 Jan 2014 16:58:28 +0100 Subject: arm/km: define fdt_high env variable and allow backwards compatibility Add set_fdthigh subcommand to "subbootcmds" (release) so to set "fdt_high" This is necessary on Kirkwood so that the FDT does not get relocated above the memory limit that the kernel cannot access (that is the memory part reserved for the switch). This was tested on NUSA1, where it is necessary, and on ETER1, where it doesn't seem to hurt. We want the scripts to also work with older versions of u-boot, where: a) set_fdthigh is not defined (will be default env for newer u-boots) b) the fdt will not be available For this reason, we use "set_fdthigh" to tell whether we are running a newer (FDT-aware) u-boot or not. So if "set_fdthigh" runs successfully or arch != arm we try loading the fdt; otherwise we proceed normally. Notice how, contrary to release mode, set_fdthigh will _not_ be part of subbootcmds for develop and ramfs, but will be executed as part of "tftpfdt". Since this is only needed for kirkwood cards, and it prevents the kernel from booting on QorIQ (though it seemed to work on ETER1), we change its definition in the default env for powerpc so that the value is only set on ARM. Signed-off-by: Valentin Longchamp Signed-off-by: Gerlando Falauto Signed-off-by: Holger Brunck Acked-by: Valentin Longchamp --- include/configs/km/keymile-common.h | 4 ++-- include/configs/km/km-powerpc.h | 1 + include/configs/km/km_arm.h | 1 + include/configs/km/kmp204x-common.h | 1 + 4 files changed, 5 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/configs/km/keymile-common.h b/include/configs/km/keymile-common.h index cb53dbd..7361072 100644 --- a/include/configs/km/keymile-common.h +++ b/include/configs/km/keymile-common.h @@ -135,8 +135,8 @@ * - 'release': for a standalone system kernel/rootfs from flash */ #define CONFIG_KM_DEF_ENV_BOOTTARGETS \ - "subbootcmds=ubiattach ubicopy cramfsloadfdt cramfsloadkernel " \ - "flashargs add_default addpanic boot\0" \ + "subbootcmds=ubiattach ubicopy cramfsloadfdt set_fdthigh " \ + "cramfsloadkernel flashargs add_default addpanic boot\0"\ "develop=" \ "tftp 200000 scripts/develop-${arch}.txt && " \ "env import -t 200000 ${filesize} && " \ diff --git a/include/configs/km/km-powerpc.h b/include/configs/km/km-powerpc.h index b03fdd9..763c5ba 100644 --- a/include/configs/km/km-powerpc.h +++ b/include/configs/km/km-powerpc.h @@ -77,6 +77,7 @@ "cp.b ${load_addr_r} " __stringify(BOOTFLASH_START) \ " ${filesize} && " \ "protect on " __stringify(BOOTFLASH_START) " +${filesize}\0"\ + "set_fdthigh=true\0" \ "" #endif /* __CONFIG_KEYMILE_POWERPC_H */ diff --git a/include/configs/km/km_arm.h b/include/configs/km/km_arm.h index a5cc1c5..6d77680 100644 --- a/include/configs/km/km_arm.h +++ b/include/configs/km/km_arm.h @@ -81,6 +81,7 @@ #define CONFIG_KM_DEF_ENV_CPU \ "u-boot="__stringify(CONFIG_HOSTNAME) "/u-boot.kwb\0" \ CONFIG_KM_UPDATE_UBOOT \ + "set_fdthigh=setenv fdt_high ${kernelmem}\0" \ "" #define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */ diff --git a/include/configs/km/kmp204x-common.h b/include/configs/km/kmp204x-common.h index 2466649..569b574 100644 --- a/include/configs/km/kmp204x-common.h +++ b/include/configs/km/kmp204x-common.h @@ -420,6 +420,7 @@ unsigned long get_board_sys_clk(unsigned long dummy); "update=" \ "sf probe 0;sf erase 0 +${filesize};" \ "sf write ${load_addr_r} 0 ${filesize};\0" \ + "set_fdthigh=true\0" \ "" #define CONFIG_HW_ENV_SETTINGS \ -- cgit v1.1 From 9c134e189a95c976dab94d4f28444a5398627188 Mon Sep 17 00:00:00 2001 From: Gerlando Falauto Date: Thu, 13 Feb 2014 16:43:00 +0100 Subject: arm/km: introduce kmsugp1 target KMSUGP1 is from a u-boot perspective (almost) identical to KMNUSA. The only difference is that the PCIe reset is connected to Kirkwood pin MPP7_PEX_RST_OUTn, we use a dedicated config flag KM_PCIE_RESET_MPP7. Such pin should theoretically be handled by the PCIe subsystem automatically, but this turned out not to be the case. So simply configure this PIN as a GPIO and issue a pulse manually. Signed-off-by: Gerlando Falauto Cc: Karlheinz Jerg Cc: Valentin Longchamp Cc: Holger Brunck Acked-by: Valentin Longchamp --- include/configs/km_kirkwood.h | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/configs/km_kirkwood.h b/include/configs/km_kirkwood.h index 2bd89b1..2cde177 100644 --- a/include/configs/km_kirkwood.h +++ b/include/configs/km_kirkwood.h @@ -45,11 +45,19 @@ #define CONFIG_KM_DISABLE_PCIE #define CONFIG_KM_IVM_BUS 1 /* I2C2 (Mux-Port 1)*/ -/* KM_NUSA */ -#elif defined(CONFIG_KM_NUSA) +/* KM_NUSA / KM_SUGP1 */ +#elif defined(CONFIG_KM_NUSA) || defined(CONFIG_KM_SUGP1) #define CONFIG_KM_IVM_BUS 1 /* I2C2 (Mux-Port 1)*/ + +# if defined(CONFIG_KM_NUSA) #define CONFIG_IDENT_STRING "\nKeymile NUSA" #define CONFIG_HOSTNAME kmnusa +# elif defined(CONFIG_KM_SUGP1) +#define CONFIG_IDENT_STRING "\nKeymile SUGP1" +#define CONFIG_HOSTNAME kmsugp1 +#define KM_PCIE_RESET_MPP7 +#endif + #undef CONFIG_SYS_KWD_CONFIG #define CONFIG_SYS_KWD_CONFIG \ $(SRCTREE)/$(CONFIG_BOARDDIR)/kwbimage_128M16_1.cfg -- cgit v1.1 From ea4c7a8321427dd9d579fd449e32b1dcb066dab7 Mon Sep 17 00:00:00 2001 From: Sourav Poddar Date: Sat, 21 Dec 2013 12:50:08 +0530 Subject: am437x_epos_evm: add SPL API, QSPI, and serial flash support Enables support for SPI SPL, QSPI and Spansion serial flash device on the EVM. Configures pin muxes for QSPI mode. Signed-off-by: Sourav Poddar Reviewed-by: Jagannadha Sutradharudu Teki --- include/configs/am43xx_evm.h | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) (limited to 'include') diff --git a/include/configs/am43xx_evm.h b/include/configs/am43xx_evm.h index f45deeb..bef46bd 100644 --- a/include/configs/am43xx_evm.h +++ b/include/configs/am43xx_evm.h @@ -84,6 +84,26 @@ #define CONFIG_OMAP_USB_PHY #define CONFIG_AM437X_USB2PHY2_HOST +/* SPI */ +#undef CONFIG_OMAP3_SPI +#define CONFIG_TI_QSPI +#define CONFIG_SPI_FLASH +#define CONFIG_SPI_FLASH_MACRONIX +#define CONFIG_CMD_SF +#define CONFIG_CMD_SPI +#define CONFIG_TI_SPI_MMAP +#define CONFIG_QSPI_SEL_GPIO 48 +#define CONFIG_SF_DEFAULT_SPEED 48000000 +#define CONFIG_DEFAULT_SPI_MODE SPI_MODE_3 + +/* SPI SPL */ +#define CONFIG_SPL_SPI_SUPPORT +#define CONFIG_SPL_SPI_LOAD +#define CONFIG_SPL_SPI_FLASH_SUPPORT +#define CONFIG_SPL_SPI_BUS 0 +#define CONFIG_SPL_SPI_CS 0 +#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000 + #ifndef CONFIG_SPL_BUILD #define CONFIG_EXTRA_ENV_SETTINGS \ "loadaddr=0x80200000\0" \ -- cgit v1.1 From c74a94415cd5cea211004f520aa5710510392a0e Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Wed, 22 Jan 2014 09:51:25 +0100 Subject: zynq: Fix incorrect header name Zynq common configuration is placed in zynq-common.h not zynq_common.h. Signed-off-by: Michal Simek --- include/configs/zynq_zc70x.h | 2 +- include/configs/zynq_zed.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/configs/zynq_zc70x.h b/include/configs/zynq_zc70x.h index 673660e..de0e241 100644 --- a/include/configs/zynq_zc70x.h +++ b/include/configs/zynq_zc70x.h @@ -2,7 +2,7 @@ * (C) Copyright 2013 Xilinx, Inc. * * Configuration settings for the Xilinx Zynq ZC702 and ZC706 boards - * See zynq_common.h for Zynq common configs + * See zynq-common.h for Zynq common configs * * SPDX-License-Identifier: GPL-2.0+ */ diff --git a/include/configs/zynq_zed.h b/include/configs/zynq_zed.h index 412dede..274140c 100644 --- a/include/configs/zynq_zed.h +++ b/include/configs/zynq_zed.h @@ -2,7 +2,7 @@ * (C) Copyright 2013 Xilinx, Inc. * * Configuration for Zynq Evaluation and Development Board - ZedBoard - * See zynq_common.h for Zynq common configs + * See zynq-common.h for Zynq common configs * * SPDX-License-Identifier: GPL-2.0+ */ -- cgit v1.1 From ae9f489977c802d5209b05a4d78fc59aa41f89c4 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Mon, 20 Jan 2014 11:29:06 +0100 Subject: zynq: Extend kernel image size to 20MB Extend max kernel image size. Gunzip is checking this value. If kernel is larger, message below is shown. Uncompressing Kernel Image ... Error: inflate() returned -5 GUNZIP: uncompress, out-of-mem or overwrite error - must RESET board to recover Signed-off-by: Michal Simek --- include/configs/zynq-common.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'include') diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index 9b6db04..3ada295 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -221,6 +221,9 @@ #define CONFIG_FIT_SIGNATURE #define CONFIG_RSA +/* Extend size of kernel image for uncompression */ +#define CONFIG_SYS_BOOTM_LEN (20 * 1024 * 1024) + /* Boot FreeBSD/vxWorks from an ELF image */ #if defined(CONFIG_ZYNQ_BOOT_FREEBSD) # define CONFIG_API -- cgit v1.1 From 427b2d4e5afe149b0da012322530a363d01058fd Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Mon, 20 Jan 2014 14:40:26 +0100 Subject: zynq: Enable tftp put command For saving content of memory via tftp to file. Signed-off-by: Michal Simek --- include/configs/zynq-common.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index 3ada295..bafa01b 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -239,5 +239,6 @@ #define CONFIG_CMD_PING #define CONFIG_CMD_DHCP #define CONFIG_CMD_MII +#define CONFIG_CMD_TFTPPUT #endif /* __CONFIG_ZYNQ_COMMON_H */ -- cgit v1.1 From bf83495040fcf273eba534f7c2c0cb2325d2240c Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Thu, 19 Dec 2013 23:38:58 +0530 Subject: zynq: serial: Simplify serial driver initialization Define both serial uarts in the driver and return default uart based on board configuration. - Move baseaddresses to hardware.h - Define default baudrate and clock values Signed-off-by: Michal Simek --- include/configs/zynq-common.h | 19 ++----------------- 1 file changed, 2 insertions(+), 17 deletions(-) (limited to 'include') diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index bafa01b..b5bf7ac 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -35,27 +35,12 @@ #define CONFIG_SYS_BAUDRATE_TABLE \ {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400} -/* Zynq Serial driver */ -#ifdef CONFIG_ZYNQ_SERIAL_UART0 -# define CONFIG_ZYNQ_SERIAL_BASEADDR0 0xE0000000 -# define CONFIG_ZYNQ_SERIAL_BAUDRATE0 CONFIG_BAUDRATE -# define CONFIG_ZYNQ_SERIAL_CLOCK0 50000000 -#endif - -#ifdef CONFIG_ZYNQ_SERIAL_UART1 -# define CONFIG_ZYNQ_SERIAL_BASEADDR1 0xE0001000 -# define CONFIG_ZYNQ_SERIAL_BAUDRATE1 CONFIG_BAUDRATE -# define CONFIG_ZYNQ_SERIAL_CLOCK1 50000000 -#endif - -#if defined(CONFIG_ZYNQ_SERIAL_UART0) || defined(CONFIG_ZYNQ_SERIAL_UART1) -# define CONFIG_ZYNQ_SERIAL -#endif - /* DCC driver */ #if defined(CONFIG_ZYNQ_DCC) # define CONFIG_ARM_DCC # define CONFIG_CPU_V6 /* Required by CONFIG_ARM_DCC */ +#else +# define CONFIG_ZYNQ_SERIAL #endif /* Ethernet driver */ -- cgit v1.1 From 23d5c738664918b1cb11cfffe5fbd79940d68c49 Mon Sep 17 00:00:00 2001 From: Soren Brinkmann Date: Thu, 21 Nov 2013 13:38:53 -0800 Subject: common: Provide DIV_ROUND_CLOSEST macro Provide the DIV_ROUND_CLOSEST macro - taken from the Linux kernel - in common.h Signed-off-by: Soren Brinkmann Signed-off-by: Michal Simek --- include/common.h | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) (limited to 'include') diff --git a/include/common.h b/include/common.h index 221b776..ea3e5ed 100644 --- a/include/common.h +++ b/include/common.h @@ -964,6 +964,22 @@ static inline phys_addr_t map_to_sysmem(const void *ptr) #define DIV_ROUND_UP(n,d) (((n) + (d) - 1) / (d)) #define roundup(x, y) ((((x) + ((y) - 1)) / (y)) * (y)) +/* + * Divide positive or negative dividend by positive divisor and round + * to closest integer. Result is undefined for negative divisors and + * for negative dividends if the divisor variable type is unsigned. + */ +#define DIV_ROUND_CLOSEST(x, divisor)( \ +{ \ + typeof(x) __x = x; \ + typeof(divisor) __d = divisor; \ + (((typeof(x))-1) > 0 || \ + ((typeof(divisor))-1) > 0 || (__x) > 0) ? \ + (((__x) + ((__d) / 2)) / (__d)) : \ + (((__x) - ((__d) / 2)) / (__d)); \ +} \ +) + #define ALIGN(x,a) __ALIGN_MASK((x),(typeof(x))(a)-1) #define __ALIGN_MASK(x,mask) (((x)+(mask))&~(mask)) -- cgit v1.1 From 6c3e61de3c9e6fbc283c16269f2e86f8fe0e0a6c Mon Sep 17 00:00:00 2001 From: Soren Brinkmann Date: Thu, 21 Nov 2013 13:38:54 -0800 Subject: zynq: Provide a framework to read clock frequencies Signed-off-by: Soren Brinkmann Signed-off-by: Michal Simek --- include/configs/zynq-common.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index b5bf7ac..406ccaf 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -163,6 +163,7 @@ #define CONFIG_AUTO_COMPLETE #define CONFIG_BOARD_LATE_INIT #define CONFIG_SYS_LONGHELP +#define CONFIG_CLOCKS #define CONFIG_SYS_MAXARGS 15 /* max number of command args */ #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ -- cgit v1.1 From d6c9bbaad194b48e799ed84df67b629424a56508 Mon Sep 17 00:00:00 2001 From: Soren Brinkmann Date: Thu, 21 Nov 2013 13:39:03 -0800 Subject: zynq: Implement dump clock command Enable and implement dump clock command which shows soc frequencies. Signed-off-by: Soren Brinkmann Signed-off-by: Michal Simek --- include/configs/zynq-common.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index 406ccaf..d6dc745 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -164,6 +164,7 @@ #define CONFIG_BOARD_LATE_INIT #define CONFIG_SYS_LONGHELP #define CONFIG_CLOCKS +#define CONFIG_CMD_CLK #define CONFIG_SYS_MAXARGS 15 /* max number of command args */ #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ -- cgit v1.1 From d7e269cfbdd5fe0bbc0961bcf89845484bf28de7 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Tue, 14 Jan 2014 14:21:52 +0100 Subject: zynq: Add support for U-BOOT SPL SPL is using ps7_init.c/h files which are generated from design tools which have to be copied to boards/xilinx/zynq folder before compilation. BSS section is moved to SDRAM because fat support requires more space than SRAM size. Added: - MMC and QSPI support - Boot OS directly from SPL - Enable SPL command Signed-off-by: Michal Simek Reviewed-by: Tom Rini --- include/configs/zynq-common.h | 77 +++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 77 insertions(+) (limited to 'include') diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index d6dc745..c7eee0a 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -228,4 +228,81 @@ #define CONFIG_CMD_MII #define CONFIG_CMD_TFTPPUT +/* SPL part */ +#define CONFIG_SPL +#define CONFIG_CMD_SPL +#define CONFIG_SPL_FRAMEWORK +#define CONFIG_SPL_LIBCOMMON_SUPPORT +#define CONFIG_SPL_LIBGENERIC_SUPPORT +#define CONFIG_SPL_SERIAL_SUPPORT + +#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/zynq/u-boot-spl.lds" + +/* Disable dcache for SPL just for sure */ +#ifdef CONFIG_SPL_BUILD +#define CONFIG_SYS_DCACHE_OFF +#undef CONFIG_FPGA +#endif + +/* MMC support */ +#ifdef CONFIG_ZYNQ_SDHCI0 +#define CONFIG_SPL_MMC_SUPPORT +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */ +#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */ +#define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1 +#define CONFIG_SPL_LIBDISK_SUPPORT +#define CONFIG_SPL_FAT_SUPPORT +#define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img" +#endif + +/* Address in RAM where the parameters must be copied by SPL. */ +#define CONFIG_SYS_SPL_ARGS_ADDR 0x10000000 + +#define CONFIG_SPL_FAT_LOAD_ARGS_NAME "system.dtb" +#define CONFIG_SPL_FAT_LOAD_KERNEL_NAME "uImage" + +/* Not using MMC raw mode - just for compilation purpose */ +#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0 +#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0 +#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0 + +/* qspi mode is working fine */ +#ifdef CONFIG_ZYNQ_QSPI +#define CONFIG_SPL_SPI_SUPPORT +#define CONFIG_SPL_SPI_LOAD +#define CONFIG_SPL_SPI_FLASH_SUPPORT +#define CONFIG_SPL_SPI_BUS 0 +#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x100000 +#define CONFIG_SPL_SPI_CS 0 +#endif + +/* for booting directly linux */ +#define CONFIG_SPL_OS_BOOT + +/* SP location before relocation, must use scratch RAM */ +#define CONFIG_SPL_TEXT_BASE 0x0 + +/* 3 * 64kB blocks of OCM - one is on the top because of bootrom */ +#define CONFIG_SPL_MAX_SIZE 0x30000 + +/* The highest 64k OCM address */ +#define OCM_HIGH_ADDR 0xffff0000 + +/* Just define any reasonable size */ +#define CONFIG_SPL_STACK_SIZE 0x1000 + +/* SPL stack position - and stack goes down */ +#define CONFIG_SPL_STACK (OCM_HIGH_ADDR + CONFIG_SPL_STACK_SIZE) + +/* On the top of OCM space */ +#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_STACK + \ + GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_SPL_MALLOC_SIZE 0x1000 + +/* BSS setup */ +#define CONFIG_SPL_BSS_START_ADDR 0x100000 +#define CONFIG_SPL_BSS_MAX_SIZE 0x100000 + +#define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE + #endif /* __CONFIG_ZYNQ_COMMON_H */ -- cgit v1.1 From bd6fb31fab1523ecac1aaf7af574868a26169dc6 Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Mon, 3 Feb 2014 13:20:59 -0700 Subject: fs: fix generic save command implementation Fix a few issues with the generic "save" shell command, and fs_write() function. 1) fstypes[].write wasn't filled in for some file-systems, and isn't checked when used, which could cause crashes/... if executing save on e.g. fat/ext filesystems. 2) fs_write() requires the length argument to be non-zero, since it needs to know exactly how many bytes to write. Adjust the comments and code according to this. 3) fs_write() wasn't prototyped in like other generic functions; other code should be able to call this directly rather than invoking the "save" shell command. Signed-off-by: Stephen Warren Acked-by: Simon Glass --- include/fs.h | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'include') diff --git a/include/fs.h b/include/fs.h index 7d9403e..97b0094 100644 --- a/include/fs.h +++ b/include/fs.h @@ -55,6 +55,16 @@ int fs_ls(const char *dirname); int fs_read(const char *filename, ulong addr, int offset, int len); /* + * Write file "filename" to the partition previously set by fs_set_blk_dev(), + * from address "addr", starting at byte offset "offset", and writing "len" + * bytes. "offset" may be 0 to write to the start of the file. Note that not + * all filesystem types support offset!=0. + * + * Returns number of bytes read on success. Returns <= 0 on error. + */ +int fs_write(const char *filename, ulong addr, int offset, int len); + +/* * Common implementation for various filesystem commands, optionally limited * to a specific filesystem type via the fstype parameter. */ -- cgit v1.1 From 6152916a95af299e5b3061bbd43418e2b73295d0 Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Mon, 3 Feb 2014 13:21:00 -0700 Subject: fs: implement infrastructure for an 'exists' function This could be used in scripts such as: if test -e mmc 0:1 /boot/boot.scr; then load mmc 0:1 ${scriptaddr} /boot/boot.scr source ${scriptaddr} fi rather than: if load mmc 0:1 ${scriptaddr} /boot/boot.scr; then source ${scriptaddr} fi This prevents errors being printed by attempts to load non-existent files, which can be important when checking for a large set of files, such as /boot/boot.scr.uimg, /boot/boot.scr, /boot/extlinux.conf, /boot.scr.uimg, /boot.scr, /extlinux.conf. Signed-off-by: Stephen Warren Acked-by: Simon Glass --- include/fs.h | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'include') diff --git a/include/fs.h b/include/fs.h index 97b0094..26de053 100644 --- a/include/fs.h +++ b/include/fs.h @@ -44,6 +44,13 @@ int fs_set_blk_dev(const char *ifname, const char *dev_part_str, int fstype); int fs_ls(const char *dirname); /* + * Determine whether a file exists + * + * Returns 1 if the file exists, 0 if it doesn't exist. + */ +int fs_exists(const char *filename); + +/* * Read file "filename" from the partition previously set by fs_set_blk_dev(), * to address "addr", starting at byte offset "offset", and reading "len" * bytes. "offset" may be 0 to read from the start of the file. "len" may be @@ -72,6 +79,8 @@ int do_load(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[], int fstype); int do_ls(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[], int fstype); +int file_exists(const char *dev_type, const char *dev_part, const char *file, + int fstype); int do_save(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[], int fstype); -- cgit v1.1 From 0a30aa1e7e4e194ecc04c5970267bd6493db8eaf Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Mon, 3 Feb 2014 13:21:07 -0700 Subject: sandbox: implement exists() function This hooks into the generic "file exists" support added in an earlier patch, and provides an implementation for the sandbox test environment. Signed-off-by: Stephen Warren Acked-by: Simon Glass --- include/sandboxfs.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/sandboxfs.h b/include/sandboxfs.h index 8ea8cb7..a51ad13 100644 --- a/include/sandboxfs.h +++ b/include/sandboxfs.h @@ -25,6 +25,7 @@ long sandbox_fs_read_at(const char *filename, unsigned long pos, void sandbox_fs_close(void); int sandbox_fs_ls(const char *dirname); +int sandbox_fs_exists(const char *filename); int fs_read_sandbox(const char *filename, void *buf, int offset, int len); int fs_write_sandbox(const char *filename, void *buf, int offset, int len); -- cgit v1.1 From 89ba42d18303d06d49ca14de2d46c82bbdcad06c Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Mon, 3 Feb 2014 13:21:08 -0700 Subject: sandbox: enable CONFIG_CMD_FS_GENERIC Since the generic ls command no longer segfaults sandbox, enable it. Signed-off-by: Stephen Warren Acked-by: Simon Glass --- include/configs/sandbox.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/configs/sandbox.h b/include/configs/sandbox.h index a6d5582..e77d06b 100644 --- a/include/configs/sandbox.h +++ b/include/configs/sandbox.h @@ -42,6 +42,7 @@ #define CONFIG_CMD_PART #define CONFIG_DOS_PARTITION #define CONFIG_HOST_MAX_DEVICES 4 +#define CONFIG_CMD_FS_GENERIC #define CONFIG_SYS_VSNPRINTF -- cgit v1.1 From 55af5c9313607f3b6acba2fd915b263ef6a61dd4 Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Mon, 3 Feb 2014 13:21:09 -0700 Subject: ext4: implement exists() for ext4fs This hooks into the generic "file exists" support added in an earlier patch, and provides an implementation for the ext4 filesystem. Signed-off-by: Stephen Warren Acked-by: Simon Glass --- include/ext4fs.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/ext4fs.h b/include/ext4fs.h index 2429380..aacb147 100644 --- a/include/ext4fs.h +++ b/include/ext4fs.h @@ -134,6 +134,7 @@ int ext4fs_read(char *buf, unsigned len); int ext4fs_mount(unsigned part_length); void ext4fs_close(void); int ext4fs_ls(const char *dirname); +int ext4fs_exists(const char *filename); void ext4fs_free_node(struct ext2fs_node *node, struct ext2fs_node *currroot); int ext4fs_devread(lbaint_t sector, int byte_offset, int byte_len, char *buf); void ext4fs_set_blk_dev(block_dev_desc_t *rbdd, disk_partition_t *info); -- cgit v1.1 From b7b5f3195fa5a31ab1505e0c87054dc6dc71627b Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Mon, 3 Feb 2014 13:21:10 -0700 Subject: fat: implement exists() for FAT fs This hooks into the generic "file exists" support added in an earlier patch, and provides an implementation for the FAT filesystem. Signed-off-by: Stephen Warren Acked-by: Simon Glass --- include/fat.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/fat.h b/include/fat.h index 2c951e7..c8eb7cc 100644 --- a/include/fat.h +++ b/include/fat.h @@ -188,6 +188,7 @@ file_read_func file_fat_read; int file_cd(const char *path); int file_fat_detectfs(void); int file_fat_ls(const char *dir); +int fat_exists(const char *filename); long file_fat_read_at(const char *filename, unsigned long pos, void *buffer, unsigned long maxsize); long file_fat_read(const char *filename, void *buffer, unsigned long maxsize); -- cgit v1.1 From 0a4bce32d6ad65ffd1eb23533d66dfe2184c0eb1 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Tue, 28 Jan 2014 18:06:12 +0900 Subject: mini2440.h: Delete remainder of dead board Commit af5b9b1f removed mini2440 board support, but missed to delete include/configs/mini2440.h. Signed-off-by: Masahiro Yamada --- include/configs/mini2440.h | 170 --------------------------------------------- 1 file changed, 170 deletions(-) delete mode 100644 include/configs/mini2440.h (limited to 'include') diff --git a/include/configs/mini2440.h b/include/configs/mini2440.h deleted file mode 100644 index 5e9e98d..0000000 --- a/include/configs/mini2440.h +++ /dev/null @@ -1,170 +0,0 @@ -/* - * (C) Copyright 2002 - * Sysgo Real-Time Solutions, GmbH - * Marius Groeger - * Gary Jennejohn - * David Mueller - * - * (C) Copyright 2009-2010 - * Michel Pollet - * - * (C) Copyright 2012 - * Gabriel Huau - * - * Configuation settings for the MINI2440 board. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -#define CONFIG_SYS_TEXT_BASE 0x0 -#define CONFIG_S3C2440_GPIO - -/* - * High Level Configuration Options - */ -#define CONFIG_ARM920T /* This is an ARM920T Core */ -#define CONFIG_S3C24X0 /* in a SAMSUNG S3C24X0 SoC */ -#define CONFIG_S3C2440 /* in a SAMSUNG S3C2440 SoC */ -#define CONFIG_MINI2440 /* on a MIN2440 Board */ - -#define MACH_TYPE_MINI2440 1999 -#define CONFIG_MACH_TYPE MACH_TYPE_MINI2440 - -/* - * We don't use lowlevel_init - */ -#define CONFIG_SKIP_LOWLEVEL_INIT -#define CONFIG_BOARD_EARLY_INIT_F - -/* - * input clock of PLL - */ -/* MINI2440 has 12.0000MHz input clock */ -#define CONFIG_SYS_CLK_FREQ 12000000 - -/* - * Size of malloc() pool - */ -#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2048*1024) - -/* - * Hardware drivers - */ -#define CONFIG_DRIVER_DM9000 -#define CONFIG_DRIVER_DM9000_NO_EEPROM -#define CONFIG_DM9000_BASE 0x20000300 -#define DM9000_IO CONFIG_DM9000_BASE -#define DM9000_DATA (CONFIG_DM9000_BASE+4) - -/* - * select serial console configuration - */ -#define CONFIG_S3C24X0_SERIAL -#define CONFIG_SERIAL1 - -/* - * allow to overwrite serial and ethaddr - */ -#define CONFIG_ENV_OVERWRITE - -/* - * Command definition - */ -#include - -#define CONFIG_CMD_DHCP -#define CONFIG_CMD_PORTIO -#define CONFIG_CMD_REGINFO -#define CONFIG_CMD_SAVES - -/* - * Miscellaneous configurable options - */ -#define CONFIG_LONGHELP -#define CONFIG_SYS_PROMPT "MINI2440 => " -#define CONFIG_SYS_CBSIZE 256 -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) -#define CONFIG_SYS_MAXARGS 32 -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE - -#define CONFIG_SYS_MEMTEST_START 0x30000000 -#define CONFIG_SYS_MEMTEST_END 0x34000000 /* 64MB in DRAM */ - -/* default load address */ -#define CONFIG_SYS_LOAD_ADDR 0x32000000 - -/* boot parameters address */ -#define CONFIG_BOOT_PARAM_ADDR 0x30000100 - -/* - * the PWM TImer 4 uses a counter of 15625 for 10 ms, so we need - * it to wrap 100 times (total 1562500) to get 1 sec. - */ -#define CONFIG_SYS_HZ 1562500 - -/* - * valid baudrates - */ -#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } -#define CONFIG_BAUDRATE 115200 - -/* - * Stack sizes - * The stack sizes are set up in start.S using the settings below - */ -#define CONFIG_STACKSIZE (128*1024) /* regular stack */ -#ifdef CONFIG_USE_IRQ -#define CONFIG_STACKSIZE_IRQ (8*1024) /* IRQ stack */ -#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */ -#endif - -/* - * Physical Memory Map - */ -#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ -#define PHYS_SDRAM_SIZE (64*1024*1024) /* 64MB of DRAM */ -#define CONFIG_SYS_SDRAM_BASE 0x30000000 -#define CONFIG_SYS_FLASH_BASE 0x0 - -/* - * Stack should be on the SRAM because - * DRAM is not init - */ -#define CONFIG_SYS_INIT_SP_ADDR (0x40001000 - GENERATED_GBL_DATA_SIZE) - -/* - * NOR FLASH organization - * Now uses the standard CFI interface - * FLASH and environment organization - */ -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT -#define CONFIG_SYS_MONITOR_BASE 0x0 -/* max number of memory banks */ -#define CONFIG_SYS_MAX_FLASH_BANKS 1 -/* 512 * 4096 sectors, or 32 * 64k blocks */ -#define CONFIG_SYS_MAX_FLASH_SECT 512 -#define CONFIG_FLASH_SHOW_PROGRESS 1 - -/* - * Config for NOR flash - */ -#define CONFIG_ENV_IS_IN_FLASH -#define CONFIG_MY_ENV_OFFSET 0x40000 -/* addr of environment */ -#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_MY_ENV_OFFSET) -/* 16k Total Size of Environment Sector */ -#define CONFIG_ENV_SIZE 0x4000 - -/* ATAG configuration */ -#define CONFIG_INITRD_TAG -#define CONFIG_SETUP_MEMORY_TAGS -#define CONFIG_CMDLINE_TAG -#define CONFIG_CMDLINE_EDITING -#define CONFIG_AUTO_COMPLETE - -#endif /* __CONFIG_H */ -- cgit v1.1 From df2f6c962134b4263e8726e56e1996da746ae4a8 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Tue, 28 Jan 2014 18:08:13 +0900 Subject: config: remove platform CONFIG_SYS_HZ definition part 3 This commit removes platform CONFIG_SYS_HZ definition for the remainders of part1 (commit cdb23792) and part2 (commit f232950f). Signed-off-by: Masahiro Yamada Cc: Rob Herring --- include/configs/T1040QDS.h | 1 - include/configs/T1040RDB.h | 1 - include/configs/T1042RDB_PI.h | 1 - include/configs/T2080QDS.h | 1 - include/configs/apf27.h | 5 ----- include/configs/balloon3.h | 1 - include/configs/corvus.h | 1 - include/configs/hummingboard.h | 1 - include/configs/koelsch.h | 1 - include/configs/lager.h | 1 - include/configs/palmld.h | 1 - include/configs/palmtc.h | 1 - include/configs/scb9328.h | 1 - include/configs/taurus.h | 1 - include/configs/udoo.h | 1 - include/configs/usb_a9263.h | 1 - include/configs/zipitz2.h | 1 - 17 files changed, 21 deletions(-) (limited to 'include') diff --git a/include/configs/T1040QDS.h b/include/configs/T1040QDS.h index 75ea125..da6e760 100644 --- a/include/configs/T1040QDS.h +++ b/include/configs/T1040QDS.h @@ -669,7 +669,6 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE/* Boot Argument Buffer Size */ -#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1ms ticks*/ /* * For booting Linux, the board info and command line data diff --git a/include/configs/T1040RDB.h b/include/configs/T1040RDB.h index 7cfda50..fd010c0 100644 --- a/include/configs/T1040RDB.h +++ b/include/configs/T1040RDB.h @@ -596,7 +596,6 @@ #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE/* Boot Argument Buffer Size */ -#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1ms ticks*/ /* * For booting Linux, the board info and command line data diff --git a/include/configs/T1042RDB_PI.h b/include/configs/T1042RDB_PI.h index ed9ca8a..6d07805 100644 --- a/include/configs/T1042RDB_PI.h +++ b/include/configs/T1042RDB_PI.h @@ -604,7 +604,6 @@ #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE/* Boot Argument Buffer Size */ -#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1ms ticks*/ /* * For booting Linux, the board info and command line data diff --git a/include/configs/T2080QDS.h b/include/configs/T2080QDS.h index 9bd0fe2..9448ec8 100644 --- a/include/configs/T2080QDS.h +++ b/include/configs/T2080QDS.h @@ -680,7 +680,6 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE/* Boot Argument Buffer Size */ -#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1ms ticks*/ /* * For booting Linux, the board info and command line data diff --git a/include/configs/apf27.h b/include/configs/apf27.h index 1193013..b10c48c 100644 --- a/include/configs/apf27.h +++ b/include/configs/apf27.h @@ -356,11 +356,6 @@ #endif /* CONFIG_CMD_DATE */ /* - * Clocks - */ -#define CONFIG_SYS_HZ 1000 /* Ticks per second */ - -/* * PLL * * 31 | x |x| x x x x |x x x x x x x x x x |x x|x x x x|x x x x x x x x x x| 0 diff --git a/include/configs/balloon3.h b/include/configs/balloon3.h index b41a823..5228ba6 100644 --- a/include/configs/balloon3.h +++ b/include/configs/balloon3.h @@ -84,7 +84,6 @@ * Clock Configuration */ #undef CONFIG_SYS_CLKS_IN_HZ -#define CONFIG_SYS_HZ 1000 #define CONFIG_SYS_CPUSPEED 0x290 /* 520MHz */ /* diff --git a/include/configs/corvus.h b/include/configs/corvus.h index 11ba4cf..959e188 100644 --- a/include/configs/corvus.h +++ b/include/configs/corvus.h @@ -33,7 +33,6 @@ /* ARM asynchronous clock */ #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 #define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */ -#define CONFIG_SYS_HZ 1000 #define CONFIG_AT91FAMILY diff --git a/include/configs/hummingboard.h b/include/configs/hummingboard.h index 4055af5..d36d16e 100644 --- a/include/configs/hummingboard.h +++ b/include/configs/hummingboard.h @@ -190,7 +190,6 @@ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR -#define CONFIG_SYS_HZ 1000 #define CONFIG_CMDLINE_EDITING diff --git a/include/configs/koelsch.h b/include/configs/koelsch.h index cc3c7a8..964d0dc 100644 --- a/include/configs/koelsch.h +++ b/include/configs/koelsch.h @@ -171,7 +171,6 @@ #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ #define CONFIG_SH_SCIF_CLK_FREQ 14745600 #define CONFIG_SYS_TMU_CLK_DIV 4 -#define CONFIG_SYS_HZ 1000 /* i2c */ #define CONFIG_CMD_I2C diff --git a/include/configs/lager.h b/include/configs/lager.h index b6c1954..32a2655 100644 --- a/include/configs/lager.h +++ b/include/configs/lager.h @@ -196,6 +196,5 @@ #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_MP_CLK_FREQ #define CONFIG_SYS_TMU_CLK_DIV 4 -#define CONFIG_SYS_HZ 1000 #endif /* __LAGER_H */ diff --git a/include/configs/palmld.h b/include/configs/palmld.h index 2a9fd22..9480d8d 100644 --- a/include/configs/palmld.h +++ b/include/configs/palmld.h @@ -115,7 +115,6 @@ * Clock Configuration */ #undef CONFIG_SYS_CLKS_IN_HZ -#define CONFIG_SYS_HZ 1000 #define CONFIG_SYS_CPUSPEED 0x210 /* 416MHz ; N=2,L=16 */ /* diff --git a/include/configs/palmtc.h b/include/configs/palmtc.h index de25407..8abce1b 100644 --- a/include/configs/palmtc.h +++ b/include/configs/palmtc.h @@ -117,7 +117,6 @@ * Clock Configuration */ #undef CONFIG_SYS_CLKS_IN_HZ -#define CONFIG_SYS_HZ 1000 #define CONFIG_SYS_CPUSPEED 0x161 /* 400MHz;L=1 M=3 T=1 */ /* diff --git a/include/configs/scb9328.h b/include/configs/scb9328.h index c0048ac..e6d272d 100644 --- a/include/configs/scb9328.h +++ b/include/configs/scb9328.h @@ -69,7 +69,6 @@ #define CONFIG_SYS_MEMTEST_START 0x08100000 /* memtest test area */ #define CONFIG_SYS_MEMTEST_END 0x08F00000 -#define CONFIG_SYS_HZ 1000 #define CONFIG_SYS_CPUSPEED 0x141 /* core clock - register value */ #define CONFIG_BAUDRATE 115200 diff --git a/include/configs/taurus.h b/include/configs/taurus.h index c980023..20d4cee 100644 --- a/include/configs/taurus.h +++ b/include/configs/taurus.h @@ -37,7 +37,6 @@ /* ARM asynchronous clock */ #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */ #define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* main clock xtal */ -#define CONFIG_SYS_HZ 1000 /* Misc CPU related */ #define CONFIG_ARCH_CPU_INIT diff --git a/include/configs/udoo.h b/include/configs/udoo.h index 614e1fe..28e20b9 100644 --- a/include/configs/udoo.h +++ b/include/configs/udoo.h @@ -199,7 +199,6 @@ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR -#define CONFIG_SYS_HZ 1000 #define CONFIG_CMDLINE_EDITING diff --git a/include/configs/usb_a9263.h b/include/configs/usb_a9263.h index c4d04de..3c54870 100644 --- a/include/configs/usb_a9263.h +++ b/include/configs/usb_a9263.h @@ -20,7 +20,6 @@ /* ARM asynchronous clock */ #define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */ #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 -#define CONFIG_SYS_HZ 1000 #define CONFIG_MACH_TYPE MACH_TYPE_USB_A9263 diff --git a/include/configs/zipitz2.h b/include/configs/zipitz2.h index e38fa89..41a7c99 100644 --- a/include/configs/zipitz2.h +++ b/include/configs/zipitz2.h @@ -138,7 +138,6 @@ unsigned char zipitz2_spi_read(void); * Clock Configuration */ #undef CONFIG_SYS_CLKS_IN_HZ -#define CONFIG_SYS_HZ 1000 #define CONFIG_SYS_CPUSPEED 0x190 /* standard setting for 312MHz; L=16, N=1.5, A=0, SDCLK!=SystemBus */ /* -- cgit v1.1 From 95f706271089088cd1359e422d15300009f2b7c6 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Wed, 29 Jan 2014 16:29:16 +0900 Subject: fdt: rename IMAAGE_OF_BOARD_SETUP to IMAGE_OF_BOARD_SETUP Signed-off-by: Masahiro Yamada Acked-by: Simon Glass --- include/image.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/image.h b/include/image.h index 3ba8c2e..6afd57b 100644 --- a/include/image.h +++ b/include/image.h @@ -99,9 +99,9 @@ struct lmb; #endif #ifdef CONFIG_OF_BOARD_SETUP -# define IMAAGE_OF_BOARD_SETUP 1 +# define IMAGE_OF_BOARD_SETUP 1 #else -# define IMAAGE_OF_BOARD_SETUP 0 +# define IMAGE_OF_BOARD_SETUP 0 #endif /* -- cgit v1.1 From fff40a7e02092eee11970e7001c8560df419cac1 Mon Sep 17 00:00:00 2001 From: Dan Murphy Date: Mon, 3 Feb 2014 06:59:01 -0600 Subject: common: spl: Add spl sata boot support Add spl_sata to read a fat partition from a bootable SATA drive. Signed-off-by: Dan Murphy Reviewed-by: Roger Quadros --- include/spl.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'include') diff --git a/include/spl.h b/include/spl.h index dad00c0..a7e41da 100644 --- a/include/spl.h +++ b/include/spl.h @@ -65,6 +65,9 @@ void spl_net_load_image(const char *device); /* USB SPL functions */ void spl_usb_load_image(void); +/* SATA SPL functions */ +void spl_sata_load_image(void); + /* SPL FAT image functions */ int spl_load_image_fat(block_dev_desc_t *block_dev, int partition, const char *filename); int spl_load_image_fat_os(block_dev_desc_t *block_dev, int partition); -- cgit v1.1 From 2c92b1d6738c35236afaa3544d196a0d5ececa87 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Wed, 5 Feb 2014 10:41:27 +0900 Subject: .gitignore: drop include/asm from ignored file list Commit bb02c536 stopped creaing a symbolic link include/asm. Signed-off-by: Masahiro Yamada --- include/.gitignore | 1 - 1 file changed, 1 deletion(-) (limited to 'include') diff --git a/include/.gitignore b/include/.gitignore index 7cd3e90..bf142fc 100644 --- a/include/.gitignore +++ b/include/.gitignore @@ -1,5 +1,4 @@ /autoconf.mk* -/asm /bmp_logo.h /bmp_logo_data.h /config.h -- cgit v1.1 From babb4440cfe1b8806cf2a5a3c5836196e501665d Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Wed, 5 Feb 2014 10:52:52 +0900 Subject: kernel-doc: fix some errors - Delete fs.xml from DOCBOOKS to fix an error. Commit e3ff797c added fs.xml to DOCBOOKS but missed to add doc/DocBook/fs.tmpl. - Fix the location of include guard in include/linker_lists.h. Signed-off-by: Masahiro Yamada Reported-by: Abraham Varricatt Acked-by: Simon Glass --- include/linker_lists.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/include/linker_lists.h b/include/linker_lists.h index 1eebb95..997d149 100644 --- a/include/linker_lists.h +++ b/include/linker_lists.h @@ -8,6 +8,9 @@ * SPDX-License-Identifier: GPL-2.0+ */ +#ifndef __LINKER_LISTS_H__ +#define __LINKER_LISTS_H__ + /* * There is no use in including this from ASM files, but that happens * anyway, e.g. PPC kgdb.S includes command.h which incluse us. @@ -97,9 +100,6 @@ * %u_boot_list_2_drivers_3 */ -#ifndef __LINKER_LISTS_H__ -#define __LINKER_LISTS_H__ - /** * ll_entry_declare() - Declare linker-generated array entry * @_type: Data type of the entry -- cgit v1.1 From 6ab6b2afa091dbceb37719b8a81637a00834be19 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Wed, 5 Feb 2014 11:28:25 +0900 Subject: dts: re-write dts/Makefile more simply with Kbuild Useful rules in scripts/Makefile.lib allows us to easily generate a device tree blob and wrap it in assembly code. We do not need to parse a linker script to get output format and arch. This commit deletes ./u-boot.dtb since it is a copy of dts/dt.dtb. Signed-off-by: Masahiro Yamada --- include/common.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/common.h b/include/common.h index 221b776..672c0b5 100644 --- a/include/common.h +++ b/include/common.h @@ -302,7 +302,7 @@ int checkdram (void); int last_stage_init(void); extern ulong monitor_flash_len; int mac_read_from_eeprom(void); -extern u8 _binary_dt_dtb_start[]; /* embedded device tree blob */ +extern u8 __dtb_dt_begin[]; /* embedded device tree blob */ int set_cpu_clk_info(void); int print_cpuinfo(void); int update_flash_size(int flash_size); -- cgit v1.1 From 627b73e2a79524836b1e933e37e014210ccb80a4 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Fri, 7 Feb 2014 09:23:03 +0900 Subject: configs: Delete obsolete macro, CONFIG_SYS_GBL_DATA_SIZE CONFIG_SYS_GBL_DATA_SIZE is not used any more. The size of struct "global_data" is automatically calculated by asm-offsets. (See lib/asm-offsets.c) GENERATED_GBL_DATA_SIZE should be used instead of CONFIG_SYS_GBL_DATA_SIZE. Signed-off-by: Masahiro Yamada --- include/configs/M54418TWR.h | 4 +--- include/configs/MERGERBOX.h | 3 +-- include/configs/P1023RDS.h | 3 +-- include/configs/ac14xx.h | 3 +-- include/configs/adp-ag101.h | 5 ----- include/configs/adp-ag101p.h | 5 ----- include/configs/adp-ag102.h | 5 ----- include/configs/ap_sh4a_4a.h | 2 -- include/configs/armadillo-800eva.h | 1 - include/configs/devkit3250.h | 1 - include/configs/dlvision-10g.h | 3 +-- include/configs/ecovec.h | 2 -- include/configs/io.h | 3 +-- include/configs/iocon.h | 3 +-- include/configs/km/km83xx-common.h | 1 - include/configs/koelsch.h | 1 - include/configs/kzm9g.h | 1 - include/configs/lager.h | 1 - include/configs/mxs.h | 1 - include/configs/o2dnt-common.h | 4 +--- include/configs/r0p7734.h | 2 -- include/configs/shmin.h | 1 - include/configs/snowball.h | 2 -- include/configs/u8500_href.h | 1 - include/configs/vl_ma2sc.h | 1 - 25 files changed, 8 insertions(+), 51 deletions(-) (limited to 'include') diff --git a/include/configs/M54418TWR.h b/include/configs/M54418TWR.h index de063b7..031672e 100644 --- a/include/configs/M54418TWR.h +++ b/include/configs/M54418TWR.h @@ -268,10 +268,8 @@ /* End of used area in internal SRAM */ #define CONFIG_SYS_INIT_RAM_SIZE 0x10000 #define CONFIG_SYS_INIT_RAM_CTRL 0x221 -/* size in bytes reserved for initial data */ -#define CONFIG_SYS_GBL_DATA_SIZE 256 #define CONFIG_SYS_GBL_DATA_OFFSET ((CONFIG_SYS_INIT_RAM_SIZE - \ - CONFIG_SYS_GBL_DATA_SIZE) - 32) + GENERATED_GBL_DATA_SIZE) - 32) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET #define CONFIG_SYS_SBFHDR_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - 32) diff --git a/include/configs/MERGERBOX.h b/include/configs/MERGERBOX.h index 3dcea0b..930699b 100644 --- a/include/configs/MERGERBOX.h +++ b/include/configs/MERGERBOX.h @@ -121,9 +121,8 @@ #define CONFIG_SYS_INIT_RAM_LOCK 1 #define CONFIG_SYS_INIT_RAM_ADDR 0xE6000000 /* Initial RAM address */ #define CONFIG_SYS_INIT_RAM_SIZE 0x1000 /* End of used area in RAM */ -#define CONFIG_SYS_GBL_DATA_SIZE 0x100 /* num bytes initial data */ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE -\ - CONFIG_SYS_GBL_DATA_SIZE) + GENERATED_GBL_DATA_SIZE) /* * Local Bus Configuration & Clock Setup diff --git a/include/configs/P1023RDS.h b/include/configs/P1023RDS.h index b513545..ec72c78 100644 --- a/include/configs/P1023RDS.h +++ b/include/configs/P1023RDS.h @@ -194,9 +194,8 @@ extern unsigned long get_clock_freq(void); #define CONFIG_SYS_INIT_RAM_ADDR 0xffd00000 /* Initial L1 address */ #define CONFIG_SYS_INIT_RAM_END 0x00004000 /* End of used area in RAM */ -#define CONFIG_SYS_GBL_DATA_SIZE 128 /* num bytes initial data */ #define CONFIG_SYS_GBL_DATA_OFFSET \ - (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) + (CONFIG_SYS_INIT_RAM_END - GENERATED_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET #define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Reserve 256 kB for Mon */ diff --git a/include/configs/ac14xx.h b/include/configs/ac14xx.h index aa584b7..f57820d 100644 --- a/include/configs/ac14xx.h +++ b/include/configs/ac14xx.h @@ -289,9 +289,8 @@ #define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_SRAM_BASE #define CONFIG_SYS_INIT_RAM_END CONFIG_SYS_SRAM_SIZE -#define CONFIG_SYS_GBL_DATA_SIZE 0x100 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - \ - CONFIG_SYS_GBL_DATA_SIZE) + GENERATED_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE diff --git a/include/configs/adp-ag101.h b/include/configs/adp-ag101.h index e31131f..e318c75 100644 --- a/include/configs/adp-ag101.h +++ b/include/configs/adp-ag101.h @@ -139,11 +139,6 @@ #define CONFIG_SYS_MALLOC_LEN (512 << 10) /* - * size in bytes reserved for initial data - */ -#define CONFIG_SYS_GBL_DATA_SIZE 128 - -/* * AHB Controller configuration */ #define CONFIG_FTAHBC020S diff --git a/include/configs/adp-ag101p.h b/include/configs/adp-ag101p.h index ded3f33..24904b0 100644 --- a/include/configs/adp-ag101p.h +++ b/include/configs/adp-ag101p.h @@ -139,11 +139,6 @@ #define CONFIG_SYS_MALLOC_LEN (512 << 10) /* - * size in bytes reserved for initial data - */ -#define CONFIG_SYS_GBL_DATA_SIZE 128 - -/* * AHB Controller configuration */ #define CONFIG_FTAHBC020S diff --git a/include/configs/adp-ag102.h b/include/configs/adp-ag102.h index 1e4ce2e..39f7a3c 100644 --- a/include/configs/adp-ag102.h +++ b/include/configs/adp-ag102.h @@ -204,11 +204,6 @@ #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128 * 1024) /* - * size in bytes reserved for initial data -*/ -#define CONFIG_SYS_GBL_DATA_SIZE 128 - -/* * AHB Controller configuration */ #define CONFIG_FTAHBC020S diff --git a/include/configs/ap_sh4a_4a.h b/include/configs/ap_sh4a_4a.h index bb39491..4282d70 100644 --- a/include/configs/ap_sh4a_4a.h +++ b/include/configs/ap_sh4a_4a.h @@ -134,8 +134,6 @@ #define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Size of DRAM reserved for malloc() use */ #define CONFIG_SYS_MALLOC_LEN (256 * 1024) -/* size in bytes reserved for initial data */ -#define CONFIG_SYS_GBL_DATA_SIZE (256) #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) /* ENV setting */ diff --git a/include/configs/armadillo-800eva.h b/include/configs/armadillo-800eva.h index e5569c7..17a2da0 100644 --- a/include/configs/armadillo-800eva.h +++ b/include/configs/armadillo-800eva.h @@ -94,7 +94,6 @@ #define CONFIG_SYS_MONITOR_BASE 0x00000000 #define CONFIG_SYS_MONITOR_LEN (256 * 1024) #define CONFIG_SYS_MALLOC_LEN (1 * 1024 * 1024) -#define CONFIG_SYS_GBL_DATA_SIZE (256) #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) #define CONFIG_SYS_TEXT_BASE 0xE80C0000 diff --git a/include/configs/devkit3250.h b/include/configs/devkit3250.h index bcb21fe..3d39b10 100644 --- a/include/configs/devkit3250.h +++ b/include/configs/devkit3250.h @@ -29,7 +29,6 @@ */ #define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_SYS_MALLOC_LEN SZ_1M -#define CONFIG_SYS_GBL_DATA_SIZE 128 #define CONFIG_SYS_SDRAM_BASE EMC_DYCS0_BASE #define CONFIG_SYS_SDRAM_SIZE SZ_64M #define CONFIG_SYS_TEXT_BASE 0x83FA0000 diff --git a/include/configs/dlvision-10g.h b/include/configs/dlvision-10g.h index 31fc65d..7877897 100644 --- a/include/configs/dlvision-10g.h +++ b/include/configs/dlvision-10g.h @@ -217,9 +217,8 @@ #define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_OCM_DATA_ADDR /* in SDRAM */ #define CONFIG_SYS_INIT_RAM_END CONFIG_SYS_OCM_DATA_SIZE /* End of used area */ -#define CONFIG_SYS_GBL_DATA_SIZE 128 /* size/bytes res'd for init data*/ #define CONFIG_SYS_GBL_DATA_OFFSET \ - (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) + (CONFIG_SYS_INIT_RAM_END - GENERATED_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET /* diff --git a/include/configs/ecovec.h b/include/configs/ecovec.h index 3a5cc74..e26591c 100644 --- a/include/configs/ecovec.h +++ b/include/configs/ecovec.h @@ -158,8 +158,6 @@ #define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Size of DRAM reserved for malloc() use */ #define CONFIG_SYS_MALLOC_LEN (256 * 1024) -/* size in bytes reserved for initial data */ -#define CONFIG_SYS_GBL_DATA_SIZE (256) #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) /* ENV setting */ diff --git a/include/configs/io.h b/include/configs/io.h index 7f86767..9da6cc6 100644 --- a/include/configs/io.h +++ b/include/configs/io.h @@ -198,9 +198,8 @@ #define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_OCM_DATA_ADDR /* in SDRAM */ #define CONFIG_SYS_INIT_RAM_END CONFIG_SYS_OCM_DATA_SIZE /* End of used area */ -#define CONFIG_SYS_GBL_DATA_SIZE 128 /* size/bytes res'd for init data*/ #define CONFIG_SYS_GBL_DATA_OFFSET \ - (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) + (CONFIG_SYS_INIT_RAM_END - GENERATED_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET /* diff --git a/include/configs/iocon.h b/include/configs/iocon.h index d34b91d..f36c2a3 100644 --- a/include/configs/iocon.h +++ b/include/configs/iocon.h @@ -238,9 +238,8 @@ int fpga_gpio_get(unsigned int bus, int pin); #define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_OCM_DATA_ADDR /* in SDRAM */ #define CONFIG_SYS_INIT_RAM_END CONFIG_SYS_OCM_DATA_SIZE /* End of used area */ -#define CONFIG_SYS_GBL_DATA_SIZE 128 /* size/bytes res'd for init data*/ #define CONFIG_SYS_GBL_DATA_OFFSET \ - (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) + (CONFIG_SYS_INIT_RAM_END - GENERATED_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET /* diff --git a/include/configs/km/km83xx-common.h b/include/configs/km/km83xx-common.h index 5e075c8..ae6b6dc 100644 --- a/include/configs/km/km83xx-common.h +++ b/include/configs/km/km83xx-common.h @@ -84,7 +84,6 @@ #define CONFIG_SYS_INIT_RAM_LOCK #define CONFIG_SYS_INIT_RAM_ADDR 0xE6000000 /* Initial RAM address */ #define CONFIG_SYS_INIT_RAM_SIZE 0x1000 /* End of used area in RAM */ -#define CONFIG_SYS_GBL_DATA_SIZE 0x100 /* num bytes initial data */ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \ GENERATED_GBL_DATA_SIZE) diff --git a/include/configs/koelsch.h b/include/configs/koelsch.h index 964d0dc..90e2d7a0 100644 --- a/include/configs/koelsch.h +++ b/include/configs/koelsch.h @@ -106,7 +106,6 @@ #define CONFIG_SYS_MONITOR_BASE 0x00000000 #define CONFIG_SYS_MONITOR_LEN (256 * 1024) #define CONFIG_SYS_MALLOC_LEN (1 * 1024 * 1024) -#define CONFIG_SYS_GBL_DATA_SIZE (256) #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) /* FLASH */ diff --git a/include/configs/kzm9g.h b/include/configs/kzm9g.h index f183279..4d11c7d 100644 --- a/include/configs/kzm9g.h +++ b/include/configs/kzm9g.h @@ -88,7 +88,6 @@ #define CONFIG_SYS_MONITOR_BASE (KZM_FLASH_BASE) #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128 * 1024) -#define CONFIG_SYS_GBL_DATA_SIZE (256) #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) #define CONFIG_SYS_TEXT_BASE 0x00000000 diff --git a/include/configs/lager.h b/include/configs/lager.h index 32a2655..b420e45 100644 --- a/include/configs/lager.h +++ b/include/configs/lager.h @@ -109,7 +109,6 @@ #define CONFIG_SYS_MONITOR_BASE 0x00000000 #define CONFIG_SYS_MONITOR_LEN (256 * 1024) #define CONFIG_SYS_MALLOC_LEN (1 * 1024 * 1024) -#define CONFIG_SYS_GBL_DATA_SIZE (256) #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) #if defined(CONFIG_SYS_USE_BOOT_NORFLASH) diff --git a/include/configs/mxs.h b/include/configs/mxs.h index 363b277..55ecef9 100644 --- a/include/configs/mxs.h +++ b/include/configs/mxs.h @@ -59,7 +59,6 @@ /* Memory sizes */ #define CONFIG_SYS_MALLOC_LEN 0x00400000 /* 4 MB for malloc */ -#define CONFIG_SYS_GBL_DATA_SIZE 128 /* Initial data */ #define CONFIG_SYS_MEMTEST_START 0x40000000 /* Memtest start adr */ #define CONFIG_SYS_MEMTEST_END 0x40400000 /* 4 MB RAM test */ diff --git a/include/configs/o2dnt-common.h b/include/configs/o2dnt-common.h index 18714ea..133dc6f 100644 --- a/include/configs/o2dnt-common.h +++ b/include/configs/o2dnt-common.h @@ -275,10 +275,8 @@ #define CONFIG_SYS_INIT_RAM_END MPC5XXX_SRAM_SIZE #endif -/* size in bytes reserved for initial data */ -#define CONFIG_SYS_GBL_DATA_SIZE 128 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - \ - CONFIG_SYS_GBL_DATA_SIZE) + GENERATED_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE diff --git a/include/configs/r0p7734.h b/include/configs/r0p7734.h index 53128ec..a71709b 100644 --- a/include/configs/r0p7734.h +++ b/include/configs/r0p7734.h @@ -140,8 +140,6 @@ #define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Size of DRAM reserved for malloc() use */ #define CONFIG_SYS_MALLOC_LEN (256 * 1024) -/* size in bytes reserved for initial data */ -#define CONFIG_SYS_GBL_DATA_SIZE (256) #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) /* ENV setting */ diff --git a/include/configs/shmin.h b/include/configs/shmin.h index f8155ef..4d38f6c 100644 --- a/include/configs/shmin.h +++ b/include/configs/shmin.h @@ -62,7 +62,6 @@ #define CONFIG_SYS_MONITOR_BASE (SHMIN_FLASH_BASE_1 + CONFIG_ENV_SECT_SIZE) #define CONFIG_SYS_MONITOR_LEN (128 * 1024) #define CONFIG_SYS_MALLOC_LEN (256 * 1024) -#define CONFIG_SYS_GBL_DATA_SIZE 256 #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) /* FLASH */ diff --git a/include/configs/snowball.h b/include/configs/snowball.h index 9a069f3..dacb560 100644 --- a/include/configs/snowball.h +++ b/include/configs/snowball.h @@ -41,8 +41,6 @@ #define CONFIG_ENV_SIZE (8*1024) #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 256*1024) -#define CONFIG_SYS_GBL_DATA_SIZE 128 /* for initial data */ - #define CONFIG_ENV_IS_IN_MMC #define CONFIG_CMD_ENV #define CONFIG_CMD_SAVEENV diff --git a/include/configs/u8500_href.h b/include/configs/u8500_href.h index 629299d..8d7970a 100644 --- a/include/configs/u8500_href.h +++ b/include/configs/u8500_href.h @@ -29,7 +29,6 @@ #define CONFIG_ENV_SIZE (128*1024) #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 256*1024) #endif -#define CONFIG_SYS_GBL_DATA_SIZE 128 /* for initial data */ /* * PL011 Configuration diff --git a/include/configs/vl_ma2sc.h b/include/configs/vl_ma2sc.h index 88aaa95..2187f77 100644 --- a/include/configs/vl_ma2sc.h +++ b/include/configs/vl_ma2sc.h @@ -363,7 +363,6 @@ */ #define CONFIG_SYS_MALLOC_LEN \ ROUND(3 * CONFIG_ENV_SIZE + 128 * 1024, 0x1000) -#define CONFIG_SYS_GBL_DATA_SIZE 128 /* 128 bytes for initial data */ #ifndef CONFIG_RAMLOAD #define CONFIG_BOOTCOMMAND "run nfsboot" -- cgit v1.1 From 2f13363b0913afe910c22c0f9c12946c6603b1c2 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Fri, 7 Feb 2014 17:20:52 +0900 Subject: configs: Delete unused CONFIG_SYS_64BIT_{VSPRINTF, STRTOUL} Signed-off-by: Masahiro Yamada --- include/configs/M54418TWR.h | 1 - include/configs/p1_twr.h | 3 --- include/configs/vl_ma2sc.h | 1 - include/configs/x600.h | 1 - 4 files changed, 6 deletions(-) (limited to 'include') diff --git a/include/configs/M54418TWR.h b/include/configs/M54418TWR.h index 031672e..3d7dc1f 100644 --- a/include/configs/M54418TWR.h +++ b/include/configs/M54418TWR.h @@ -77,7 +77,6 @@ #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define NAND_MAX_CHIPS CONFIG_SYS_MAX_NAND_DEVICE #define CONFIG_SYS_NAND_SELECT_DEVICE -#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ #endif /* Network configuration */ diff --git a/include/configs/p1_twr.h b/include/configs/p1_twr.h index 601bac7..c296a07 100644 --- a/include/configs/p1_twr.h +++ b/include/configs/p1_twr.h @@ -238,9 +238,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_OF_BOARD_SETUP #define CONFIG_OF_STDOUT_VIA_ALIAS -#define CONFIG_SYS_64BIT_VSPRINTF -#define CONFIG_SYS_64BIT_STRTOUL - /* new uImage format support */ #define CONFIG_FIT #define CONFIG_FIT_VERBOSE /* enable fit_format_{error,warning}() */ diff --git a/include/configs/vl_ma2sc.h b/include/configs/vl_ma2sc.h index 2187f77..14c6e67 100644 --- a/include/configs/vl_ma2sc.h +++ b/include/configs/vl_ma2sc.h @@ -322,7 +322,6 @@ #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) /* our CLE is AD22 */ #define CONFIG_SYS_NAND_ENABLE_PIN GPIO_PIN_PD(15) #define CONFIG_SYS_NAND_READY_PIN GPIO_PIN_PB(0) -#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ #endif /* Ethernet */ diff --git a/include/configs/x600.h b/include/configs/x600.h index 00b938a..d420efe 100644 --- a/include/configs/x600.h +++ b/include/configs/x600.h @@ -170,7 +170,6 @@ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE #define CONFIG_SYS_LOAD_ADDR 0x00800000 #define CONFIG_SYS_CONSOLE_INFO_QUIET -#define CONFIG_SYS_64BIT_VSPRINTF /* Use last 2 lwords in internal SRAM for bootcounter */ #define CONFIG_BOOTCOUNT_LIMIT -- cgit v1.1 From 365475e6d14bc1ea9d218c0fd1fe96878a9db94e Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Thu, 13 Feb 2014 18:30:26 +0900 Subject: Move #ifdef(CONFIG_DISPLAY_CPUINFO) from caller to callee - When CONFIG_DISPLAY_CPUINFO is not enabled, print_cpuinfo() should be defined as an empty function in a header, include/common.h - Remove #ifdef CONFIG_DISPLAY_CPUINFO .. #endif from caller, common/board_f.c and arch/arm/lib/board.c - Remove redundant prototypes in arch/arm/lib/board.c, arch/arm/include/asm/arch-am33x/sys_proto.h and board/nokia/rx51/rx51.h, keeping the one in include/common.h - Add #ifdef CONFIG_DISPLAY_CPUINFO to the func definition where it is missing Signed-off-by: Masahiro Yamada --- include/common.h | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'include') diff --git a/include/common.h b/include/common.h index 672c0b5..08b294c 100644 --- a/include/common.h +++ b/include/common.h @@ -304,7 +304,14 @@ extern ulong monitor_flash_len; int mac_read_from_eeprom(void); extern u8 __dtb_dt_begin[]; /* embedded device tree blob */ int set_cpu_clk_info(void); +#if defined(CONFIG_DISPLAY_CPUINFO) int print_cpuinfo(void); +#else +static inline int print_cpuinfo(void) +{ + return 0; +} +#endif int update_flash_size(int flash_size); /** -- cgit v1.1 From 18948632a92f83cfad125edc6ff4a162a7d90a05 Mon Sep 17 00:00:00 2001 From: Michael Burr Date: Wed, 22 Jan 2014 09:46:08 +0100 Subject: i2c: zynq: Add support for the second i2c controller Initialize the second i2c controller. Signed-off-by: Michael Burr Signed-off-by: Michal Simek --- include/configs/zynq-common.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index 9b6db04..787d32d 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -104,13 +104,13 @@ # define CONFIG_DOS_PARTITION #endif +#define CONFIG_SYS_I2C_ZYNQ /* I2C */ -#if defined(CONFIG_ZYNQ_I2C0) || defined(CONFIG_ZYNQ_I2C1) +#if defined(CONFIG_SYS_I2C_ZYNQ) # define CONFIG_CMD_I2C # define CONFIG_SYS_I2C -# define CONFIG_SYS_I2C_ZYNQ # define CONFIG_SYS_I2C_ZYNQ_SPEED 100000 -# define CONFIG_SYS_I2C_ZYNQ_SLAVE 1 +# define CONFIG_SYS_I2C_ZYNQ_SLAVE 0 #endif /* EEPROM */ -- cgit v1.1 From d5243359e1afc957acd373dbbde1cf6c70ee5485 Mon Sep 17 00:00:00 2001 From: Hannes Petermaier Date: Mon, 3 Feb 2014 21:22:18 +0100 Subject: OMAP24xx I2C: Add support for set-speed Adds support for set-speed on the OMAP24xx I2C Adapter. Changes to omap24_i2c_write(...) for polling ARDY Bit from IRQ-Status. Otherwise on a subsequent call the transfer of last byte from the predecessor is aborted and therefore lost. For exmaple when i2c_write(...) is followed by a i2c_setspeed(...) (which has to deactivate and activate master for changing psc,...). Minor cosmetical changes. Signed-off-by: Hannes Petermaier Cc: Heiko Schocher --- include/i2c.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/i2c.h b/include/i2c.h index f93a183..1b4078e 100644 --- a/include/i2c.h +++ b/include/i2c.h @@ -68,6 +68,7 @@ struct i2c_adapter { uint (*set_bus_speed)(struct i2c_adapter *adap, uint speed); int speed; + int waitdelay; int slaveaddr; int init_done; int hwadapnr; -- cgit v1.1 From f93f589ca2defd02fa76a3d0cde695d61820390d Mon Sep 17 00:00:00 2001 From: Alexey Brodkin Date: Mon, 10 Feb 2014 12:20:11 +0400 Subject: spear: move CONFIG_SYS_I2C_BASE from arch-spear/hardware to board configs Having CONFIG_SYS_I2C_BASE requires DW I2C driver to explicitly include which other platforms may not have at all. It's always good to have a driver platform-independent. Signed-off-by: Alexey Brodkin Cc: Tom Rini Cc: Heiko Schocher Cc: Stefan Roese Cc: Vipin Kumar Cc: Armando Visconti --- include/configs/spear-common.h | 9 +++++++++ include/configs/x600.h | 1 + 2 files changed, 10 insertions(+) (limited to 'include') diff --git a/include/configs/spear-common.h b/include/configs/spear-common.h index e090a37..c0eba37 100644 --- a/include/configs/spear-common.h +++ b/include/configs/spear-common.h @@ -39,6 +39,15 @@ /* I2C driver configuration */ #define CONFIG_HARD_I2C #define CONFIG_DW_I2C +#if defined(CONFIG_SPEAR600) +#define CONFIG_SYS_I2C_BASE 0xD0200000 +#elif defined(CONFIG_SPEAR300) +#define CONFIG_SYS_I2C_BASE 0xD0180000 +#elif defined(CONFIG_SPEAR310) +#define CONFIG_SYS_I2C_BASE 0xD0180000 +#elif defined(CONFIG_SPEAR320) +#define CONFIG_SYS_I2C_BASE 0xD0180000 +#endif #define CONFIG_SYS_I2C_SPEED 400000 #define CONFIG_SYS_I2C_SLAVE 0x02 diff --git a/include/configs/x600.h b/include/configs/x600.h index d420efe..7405419 100644 --- a/include/configs/x600.h +++ b/include/configs/x600.h @@ -85,6 +85,7 @@ /* I2C config options */ #define CONFIG_HARD_I2C #define CONFIG_DW_I2C +#define CONFIG_SYS_I2C_BASE 0xD0200000 #define CONFIG_SYS_I2C_SPEED 400000 #define CONFIG_SYS_I2C_SLAVE 0x02 #define CONFIG_I2C_CHIPADDRESS 0x50 -- cgit v1.1 From c42eb7f2c76ff5553380cb0bfbfb62903194cf0c Mon Sep 17 00:00:00 2001 From: Alexey Brodkin Date: Sat, 8 Feb 2014 10:30:59 +0400 Subject: axs101: change command prompt marker to match marketing name of the board Proper spelling of the boad marketing name is with upper case. So changing it from lower case to upper case here. Cc: Tom Rini Signed-off-by: Alexey Brodkin --- include/configs/axs101.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/configs/axs101.h b/include/configs/axs101.h index af2e63b..f6b569a 100644 --- a/include/configs/axs101.h +++ b/include/configs/axs101.h @@ -167,7 +167,7 @@ * Console configuration */ #define CONFIG_SYS_LONGHELP -#define CONFIG_SYS_PROMPT "axs# " +#define CONFIG_SYS_PROMPT "AXS# " #define CONFIG_SYS_CBSIZE 256 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ -- cgit v1.1 From 1530f6f51ada57a9dd24f07d0f0955a8bf84c7b8 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Fri, 21 Feb 2014 08:42:02 -0500 Subject: fs/fdos: Remove We have an unused FAT implementation in fs/fdos, remove. Signed-off-by: Tom Rini --- include/config_cmd_all.h | 1 - 1 file changed, 1 deletion(-) (limited to 'include') diff --git a/include/config_cmd_all.h b/include/config_cmd_all.h index 3e8983f..2c2a05b 100644 --- a/include/config_cmd_all.h +++ b/include/config_cmd_all.h @@ -38,7 +38,6 @@ #define CONFIG_CMD_EXT2 /* EXT2 Support */ #define CONFIG_CMD_FAT /* FAT support */ #define CONFIG_CMD_FDC /* Floppy Disk Support */ -#define CONFIG_CMD_FDOS /* Floppy DOS support */ #define CONFIG_CMD_FLASH /* flinfo, erase, protect */ #define CONFIG_CMD_FPGA /* FPGA configuration Support */ #define CONFIG_CMD_FUSE /* Device fuse support */ -- cgit v1.1 From 29235b73373f28f2516d2eafbf6ec76ecf8051a3 Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Wed, 5 Feb 2014 20:49:21 -0700 Subject: ARM: rpi_b: convert to use distro defaults Modify the rpi_b board to include the "distro defaults" header, so that all the config options distros expect are enabled. Remove any #defines that enable the same options from the rpi_b.h. Signed-off-by: Stephen Warren --- include/configs/rpi_b.h | 29 +++++++++++++---------------- 1 file changed, 13 insertions(+), 16 deletions(-) (limited to 'include') diff --git a/include/configs/rpi_b.h b/include/configs/rpi_b.h index 976ceaa..202c9c3 100644 --- a/include/configs/rpi_b.h +++ b/include/configs/rpi_b.h @@ -147,37 +147,34 @@ #define CONFIG_BOOTDELAY 2 /* Shell */ -#define CONFIG_SYS_HUSH_PARSER #define CONFIG_SYS_MAXARGS 8 #define CONFIG_SYS_PROMPT "U-Boot> " -#define CONFIG_SYS_LONGHELP -#define CONFIG_CMDLINE_EDITING #define CONFIG_COMMAND_HISTORY -#define CONFIG_AUTO_COMPLETE /* Commands */ #include -#define CONFIG_CMD_BOOTZ #define CONFIG_CMD_GPIO #define CONFIG_CMD_MMC -#define CONFIG_DOS_PARTITION #define CONFIG_PARTITION_UUIDS #define CONFIG_CMD_PART -#define CONFIG_CMD_FS_GENERIC -#define CONFIG_CMD_FAT -#define CONFIG_CMD_EXT -/* Some things don't make sense on this HW or yet */ -#undef CONFIG_CMD_FPGA -#undef CONFIG_CMD_NET -#undef CONFIG_CMD_NFS -#undef CONFIG_CMD_SAVEENV -/* Device tree support for bootm/bootz */ -#define CONFIG_OF_LIBFDT +/* Device tree support */ #define CONFIG_OF_BOARD_SETUP /* ATAGs support for bootm/bootz */ #define CONFIG_SETUP_MEMORY_TAGS #define CONFIG_CMDLINE_TAG #define CONFIG_INITRD_TAG +#include + +/* Some things don't make sense on this HW or yet */ +#undef CONFIG_CMD_FPGA +#undef CONFIG_CMD_NET +#undef CONFIG_CMD_NFS +#undef CONFIG_CMD_SAVEENV +#undef CONFIG_CMD_DHCP +#undef CONFIG_CMD_MII +#undef CONFIG_CMD_NET +#undef CONFIG_CMD_PING + #endif -- cgit v1.1 From 5c92d4823d2d5de03ea63cb3fbfc898c39cf199c Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Wed, 5 Feb 2014 20:49:22 -0700 Subject: ARM: rpi_b: load /uEnv.txt from MMC at startup The Pi has no flash to store an environment in the usual fashion. However, the user may wish to customize the environment. We know that the SD card must be present, since that's where the boot ROM has loaded U-Boot from. So, load uEnv.txt from there early during boot. This allows the user to e.g. customize boot_targets, in order to automatically select network boot. Signed-off-by: Stephen Warren --- include/configs/rpi_b.h | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'include') diff --git a/include/configs/rpi_b.h b/include/configs/rpi_b.h index 202c9c3..4b5a0c2 100644 --- a/include/configs/rpi_b.h +++ b/include/configs/rpi_b.h @@ -95,6 +95,11 @@ #define CONFIG_SYS_LOAD_ADDR 0x1000000 #define CONFIG_CONSOLE_MUX #define CONFIG_SYS_CONSOLE_IS_IN_ENV +#define CONFIG_PREBOOT \ + "if load mmc 0:1 ${loadaddr} /uEnv.txt; then " \ + "env import -t ${loadaddr} ${filesize}; " \ + "fi" + /* * Memory layout for where various images get loaded by boot scripts: * -- cgit v1.1 From 4e5b1bd0dff216b00d7ce9a5201dfe173805a06c Mon Sep 17 00:00:00 2001 From: York Sun Date: Mon, 10 Feb 2014 13:59:42 -0800 Subject: driver/ddr: Change Freescale ARM DDR driver to support both big and little endian Initially it was believed the DDR controller on Freescale ARM would have big endian. But some platform will have little endian. Signed-off-by: York Sun --- include/fsl_ddr.h | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'include') diff --git a/include/fsl_ddr.h b/include/fsl_ddr.h index e03f9db..72c0b2e 100644 --- a/include/fsl_ddr.h +++ b/include/fsl_ddr.h @@ -14,6 +14,14 @@ #include +#ifdef CONFIG_SYS_FSL_DDR_LE +#define ddr_in32(a) in_le32(a) +#define ddr_out32(a, v) out_le32(a, v) +#else +#define ddr_in32(a) in_be32(a) +#define ddr_out32(a, v) out_be32(a, v) +#endif + #if defined(CONFIG_DDR_SPD) || defined(CONFIG_SPD_EEPROM) /* * Bind the main DDR setup driver's generic names @@ -93,6 +101,7 @@ void fsl_ddr_get_spd(generic_spd_eeprom_t *ctrl_dimms_spd, int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]); unsigned int check_fsl_memctl_config_regs(const fsl_ddr_cfg_regs_t *ddr); +void board_add_ram_info(int use_default); /* processor specific function */ void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs, -- cgit v1.1 From 6b1e1254f326940e5b65c7029f71b964bdf28fd4 Mon Sep 17 00:00:00 2001 From: York Sun Date: Mon, 10 Feb 2014 13:59:44 -0800 Subject: driver/ddr: Add 256 byte interleaving support Freescale LayerScape SoCs support controller interleaving on 256 byte size. This interleaving is mandoratory. Signed-off-by: York Sun --- include/fsl_ddr_sdram.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/fsl_ddr_sdram.h b/include/fsl_ddr_sdram.h index 16cccc7..2a36431 100644 --- a/include/fsl_ddr_sdram.h +++ b/include/fsl_ddr_sdram.h @@ -76,6 +76,7 @@ typedef ddr3_spd_eeprom_t generic_spd_eeprom_t; #define FSL_DDR_PAGE_INTERLEAVING 0x1 #define FSL_DDR_BANK_INTERLEAVING 0x2 #define FSL_DDR_SUPERBANK_INTERLEAVING 0x3 +#define FSL_DDR_256B_INTERLEAVING 0x8 #define FSL_DDR_3WAY_1KB_INTERLEAVING 0xA #define FSL_DDR_3WAY_4KB_INTERLEAVING 0xC #define FSL_DDR_3WAY_8KB_INTERLEAVING 0xD -- cgit v1.1 From e38661634b3d60af80d85ce9eb570a45db4729ca Mon Sep 17 00:00:00 2001 From: York Sun Date: Tue, 11 Feb 2014 11:57:26 -0800 Subject: common: Add get_effective_memsize() to memsize.c This function has been around for powerpc. It is used for systems with memory more than CONFIG_MAX_MEM_MAPPED. In case of non-contiguous memory, this feature can limit U-boot to one block without going over the limit. Signed-off-by: York Sun Acked-by: Albert ARIBAUD --- include/common.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/common.h b/include/common.h index 033b5d9..96a45a6 100644 --- a/include/common.h +++ b/include/common.h @@ -461,6 +461,7 @@ void api_init (void); /* common/memsize.c */ long get_ram_size (long *, long); +phys_size_t get_effective_memsize(void); /* $(BOARD)/$(BOARD).c */ void reset_phy (void); -- cgit v1.1 From da4105dfcd27c20e5cf4eb750f88938f56620d37 Mon Sep 17 00:00:00 2001 From: Lothar Felten Date: Fri, 31 Jan 2014 17:34:14 +0100 Subject: am335x: Initial support for Silica Pengwyn board This patch add support for the Silica Pengwyn board [1] The board is based on a TI AM3354 CPU [2] All jumpers removed it will boot from the SDcard, the console is on UART1 accessible via the FDTI -> USB. The on board NAND flash is supported and can act as boot medium, depending on jumper settings. USB Host, USB Device and Ethernet are also provided but untested. [1] http://www.silica.com/product/silica-pengwyn-board.html [2] http://www.ti.com/product/am3354 Signed-off-by: Lothar Felten [trini: Move CONFIG_BOARD_LATE_INIT into am335x_evm.h, drop unused spi0_pin_mux from Pengwyn support] Signed-off-by: Tom Rini --- include/configs/am335x_evm.h | 1 + include/configs/pengwyn.h | 208 +++++++++++++++++++++++++++++++++++++ include/configs/ti_am335x_common.h | 1 - 3 files changed, 209 insertions(+), 1 deletion(-) create mode 100644 include/configs/pengwyn.h (limited to 'include') diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h index 73a9adb..96ae369 100644 --- a/include/configs/am335x_evm.h +++ b/include/configs/am335x_evm.h @@ -20,6 +20,7 @@ #define MACH_TYPE_TIAM335EVM 3589 /* Until the next sync */ #define CONFIG_MACH_TYPE MACH_TYPE_TIAM335EVM +#define CONFIG_BOARD_LATE_INIT /* Clock Defines */ #define V_OSCK 24000000 /* Clock output from T2 */ diff --git a/include/configs/pengwyn.h b/include/configs/pengwyn.h new file mode 100644 index 0000000..5a55556 --- /dev/null +++ b/include/configs/pengwyn.h @@ -0,0 +1,208 @@ +/* + * pengwyn.h + * + * Copyright (C) 2013 Lothar Felten + * + * based on am335x_evm.h, Copyright (C) 2011 Texas Instruments Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_PENGWYN_H +#define __CONFIG_PENGWYN_H + +#define CONFIG_NAND +#define CONFIG_SERIAL1 +#define CONFIG_CONS_INDEX 1 + +#include + +/* Clock Defines */ +#define V_OSCK 24000000 +#define V_SCLK V_OSCK + +/* set env size */ +#define CONFIG_ENV_SIZE 0x4000 + +#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG + +#ifndef CONFIG_SPL_BUILD +#define CONFIG_EXTRA_ENV_SETTINGS \ + "loadaddr=0x80200000\0" \ + "fdtaddr=0x80F80000\0" \ + "bootpart=0:2\0" \ + "bootdir=/boot\0" \ + "bootfile=zImage\0" \ + "fdtfile=am335x-pengwyn.dtb\0" \ + "console=ttyO0,115200n8\0" \ + "optargs=\0" \ + "mmcdev=0\0" \ + "mmcroot=/dev/mmcblk0p2 ro\0" \ + "mmcrootfstype=ext4 rootwait\0" \ + "rootpath=/export/rootfs\0" \ + "nfsopts=nolock\0" \ + "static_ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}" \ + "::off\0" \ + "mmcargs=setenv bootargs console=${console} " \ + "${optargs} " \ + "root=${mmcroot} " \ + "rootfstype=${mmcrootfstype}\0" \ + "netargs=setenv bootargs console=${console} " \ + "${optargs} " \ + "root=/dev/nfs " \ + "nfsroot=${serverip}:${rootpath},${nfsopts} rw " \ + "ip=dhcp\0" \ + "bootenv=uEnv.txt\0" \ + "loadbootenv=load mmc ${mmcdev} ${loadaddr} ${bootenv}\0" \ + "importbootenv=echo Importing environment from mmc ...; " \ + "env import -t $loadaddr $filesize\0" \ + "loadimage=load mmc ${bootpart} ${loadaddr} ${bootdir}/${bootfile}\0" \ + "loadfdt=load mmc ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile}\0" \ + "mmcloados=run mmcargs; " \ + "bootz ${loadaddr} - ${fdtaddr};\0" \ + "mmcboot=mmc dev ${mmcdev}; " \ + "if mmc rescan; then " \ + "echo SD/MMC found on device ${mmcdev};" \ + "if run loadbootenv; then " \ + "echo Loaded environment from ${bootenv};" \ + "run importbootenv;" \ + "fi;" \ + "if test -n $uenvcmd; then " \ + "echo Running uenvcmd ...;" \ + "run uenvcmd;" \ + "fi;" \ + "if run loadimage; then " \ + "run loadfdt;" \ + "run mmcloados;" \ + "fi;" \ + "fi;\0" \ + "netboot=echo Booting from network ...; " \ + "setenv autoload no; " \ + "dhcp; " \ + "tftp ${loadaddr} ${bootfile}; " \ + "tftp ${fdtaddr} ${fdtfile}; " \ + "run netargs; " \ + "bootz ${loadaddr} - ${fdtaddr}\0" \ + "mtdids=" MTDIDS_DEFAULT "\0" \ + "mtdparts=" MTDPARTS_DEFAULT "\0" \ + "nandargs=setenv bootargs console=${console} " \ + "${optargs} " \ + "root=${nandroot} " \ + "rootfstype=${nandrootfstype}\0" \ + "nandroot=ubi0:rootfs rw ubi.mtd=7,2048\0" \ + "nandrootfstype=ubifs rootwait=1\0" \ + "nandboot=echo Booting from nand ...; " \ + "run nandargs; " \ + "nand read ${fdtaddr} u-boot-spl-os; " \ + "nand read ${loadaddr} kernel; " \ + "bootz ${loadaddr} - ${fdtaddr}\0" +#endif + +#define CONFIG_BOOTCOMMAND \ + "run mmcboot;" \ + "run nandboot;" + +/* NS16550 Configuration: primary UART via FDTI */ +#define CONFIG_SYS_NS16550_COM1 0x44e09000 +#define CONFIG_BAUDRATE 115200 + +/* I2C Configuration */ +#define CONFIG_SYS_I2C_SPEED 100000 +#define CONFIG_CMD_EEPROM +#define CONFIG_ENV_EEPROM_IS_ON_I2C +#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 +#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 +#define CONFIG_SYS_I2C_MULTI_EEPROMS + +/* SPL */ +#define CONFIG_SPL_POWER_SUPPORT +#define CONFIG_SPL_YMODEM_SUPPORT + +/* General network SPL */ +#define CONFIG_SPL_NET_SUPPORT +#define CONFIG_SPL_ENV_SUPPORT +#define CONFIG_SPL_NET_VCI_STRING "AM335x U-Boot SPL" + +/* NAND support */ +#define CONFIG_CMD_NAND +#define CONFIG_NAND_OMAP_GPMC +#define CONFIG_NAND_OMAP_ELM +#define CONFIG_SYS_NAND_5_ADDR_CYCLE +#define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \ + CONFIG_SYS_NAND_PAGE_SIZE) +#define CONFIG_SYS_NAND_PAGE_SIZE 2048 +#define CONFIG_SYS_NAND_OOBSIZE 64 +#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) +#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS +#define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \ + 10, 11, 12, 13, 14, 15, 16, 17, \ + 18, 19, 20, 21, 22, 23, 24, 25, \ + 26, 27, 28, 29, 30, 31, 32, 33, \ + 34, 35, 36, 37, 38, 39, 40, 41, \ + 42, 43, 44, 45, 46, 47, 48, 49, \ + 50, 51, 52, 53, 54, 55, 56, 57, } + +#define CONFIG_SYS_NAND_ECCSIZE 512 +#define CONFIG_SYS_NAND_ECCBYTES 14 +#define CONFIG_SYS_NAND_ONFI_DETECTION +#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW +#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 + +#define GPMC_NAND_ECC_LP_x8_LAYOUT 1 +#define MTDIDS_DEFAULT "nand0=omap2-nand.0" +#define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:128k(SPL)," \ + "128k(SPL.backup1)," \ + "128k(SPL.backup2)," \ + "128k(SPL.backup3),1792k(u-boot)," \ + "128k(u-boot-spl-os)," \ + "128k(u-boot-env),5m(kernel),-(rootfs)" +#define CONFIG_ENV_IS_IN_NAND +#define CONFIG_ENV_OFFSET 0x260000 /* environment starts here */ +#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ + +/* + * USB configuration. We enable MUSB support, both for host and for + * gadget. We set USB0 as peripheral and USB1 as host, based on the + * board schematic and physical port wired to each. Then for host we + * add mass storage support. + */ +#define CONFIG_USB_MUSB_DSPS +#define CONFIG_ARCH_MISC_INIT +#define CONFIG_MUSB_GADGET +#define CONFIG_MUSB_PIO_ONLY +#define CONFIG_MUSB_DISABLE_BULK_COMBINE_SPLIT +#define CONFIG_USB_GADGET +#define CONFIG_USB_GADGET_DUALSPEED +#define CONFIG_USB_GADGET_VBUS_DRAW 2 +#define CONFIG_MUSB_HOST +#define CONFIG_AM335X_USB0 +#define CONFIG_AM335X_USB0_MODE MUSB_PERIPHERAL +#define CONFIG_AM335X_USB1 +#define CONFIG_AM335X_USB1_MODE MUSB_HOST + +#if defined(CONFIG_MUSB_HOST) +#define CONFIG_CMD_USB +#define CONFIG_USB_STORAGE +#endif + +#if defined(CONFIG_SPL_BUILD) +/* disable host part of MUSB in SPL */ +#undef CONFIG_MUSB_HOST +/* Disable CPSW SPL support so we fit within the 101KiB limit. */ +#undef CONFIG_SPL_ETH_SUPPORT +#endif + +/* Network */ +#define CONFIG_CMD_MII +#define CONFIG_PHYLIB +#define CONFIG_PHY_ADDR 1 +#define CONFIG_PHY_RESET 1 +#define CONFIG_PHY_NATSEMI + +/* CPSW support */ +#define CONFIG_SPL_ETH_SUPPORT + +#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/am33xx/u-boot-spl.lds" + +#endif /* ! __CONFIG_PENGWYN_H */ diff --git a/include/configs/ti_am335x_common.h b/include/configs/ti_am335x_common.h index 91f97dd..7e9ca01 100644 --- a/include/configs/ti_am335x_common.h +++ b/include/configs/ti_am335x_common.h @@ -13,7 +13,6 @@ #define __CONFIG_TI_AM335X_COMMON_H__ #define CONFIG_AM33XX -#define CONFIG_BOARD_LATE_INIT #define CONFIG_ARCH_CPU_INIT #define CONFIG_SYS_CACHELINE_SIZE 64 #define CONFIG_MAX_RAM_BANK_SIZE (1024 << 20) /* 1GB */ -- cgit v1.1 From 893c04e17cf74db79e052e831fe5de8323cf2aae Mon Sep 17 00:00:00 2001 From: Hannes Petermaier Date: Fri, 7 Feb 2014 08:07:36 +0100 Subject: board: Add support for B&R T-Series Motherboard Adds support for Bernecker & Rainer Industrieelektronik GmbH T-Series Motherboard, using TI's AM3352 SoC. Most of code is derived from TI's AM335x_EVM Signed-off-by: Hannes Petermaier --- include/configs/bur_am335x_common.h | 197 +++++++++++++++++++++++++++ include/configs/tseries.h | 265 ++++++++++++++++++++++++++++++++++++ 2 files changed, 462 insertions(+) create mode 100644 include/configs/bur_am335x_common.h create mode 100644 include/configs/tseries.h (limited to 'include') diff --git a/include/configs/bur_am335x_common.h b/include/configs/bur_am335x_common.h new file mode 100644 index 0000000..1f57bd2 --- /dev/null +++ b/include/configs/bur_am335x_common.h @@ -0,0 +1,197 @@ +/* + * bur_am335x_common.h + * + * common parts used by B&R AM335x based boards + * + * Copyright (C) 2013 Hannes Petermaier - + * Bernecker & Rainer Industrieelektronik GmbH - http://www.br-automation.com + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __BUR_AM335X_COMMON_H__ +#define __BUR_AM335X_COMMON_H__ +/* ------------------------------------------------------------------------- */ +#define CONFIG_AM33XX +#define CONFIG_OMAP +#define CONFIG_OMAP_COMMON +#define CONFIG_BOARD_LATE_INIT +#define CONFIG_SYS_CACHELINE_SIZE 64 +#define CONFIG_MAX_RAM_BANK_SIZE (1024 << 20) /* 1GB */ + +/* Timer information */ +#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ +#define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */ + +#define CONFIG_SPL_POWER_SUPPORT +#define CONFIG_POWER_TPS65217 + +#define CONFIG_SYS_NO_FLASH /* have no NOR-flash */ + +#include + +/* NS16550 Configuration */ +#define CONFIG_SYS_NS16550 +#define CONFIG_SYS_NS16550_SERIAL +#define CONFIG_SYS_NS16550_REG_SIZE (-4) +#define CONFIG_SYS_NS16550_CLK 48000000 +#define CONFIG_SYS_NS16550_COM1 0x44e09000 /* UART0 */ +#define CONFIG_BAUDRATE 115200 + +/* Network defines */ +#define CONFIG_CMD_NET /* 'bootp' and 'tftp' */ +#define CONFIG_CMD_DHCP +#define CONFIG_BOOTP_DNS /* Configurable parts of CMD_DHCP */ +#define CONFIG_BOOTP_SEND_HOSTNAME +#define CONFIG_BOOTP_GATEWAY +#define CONFIG_BOOTP_SUBNETMASK +#define CONFIG_NET_RETRY_COUNT 4 +#define CONFIG_CMD_PING +#define CONFIG_DRIVER_TI_CPSW /* Driver for IP block */ +#define CONFIG_MII /* Required in net/eth.c */ +#define CONFIG_SPL_ETH_SUPPORT +#define CONFIG_PHYLIB +#define CONFIG_PHY_ADDR 1 +#define CONFIG_PHY_NATSEMI +#define CONFIG_SPL_NET_SUPPORT +#define CONFIG_SPL_ENV_SUPPORT /* used for a fetching MAC-Address */ +#define CONFIG_SPL_NET_VCI_STRING "AM335x U-Boot SPL" + +/* + * SPL related defines. The Public RAM memory map the ROM defines the + * area between 0x402F0400 and 0x4030B800 as a download area and + * 0x4030B800 to 0x4030CE00 as a public stack area. The ROM also + * supports X-MODEM loading via UART, and we leverage this and then use + * Y-MODEM to load u-boot.img, when booted over UART. + */ +#define CONFIG_SPL_TEXT_BASE 0x402F0400 +#define CONFIG_SPL_MAX_SIZE (0x4030B800 - CONFIG_SPL_TEXT_BASE) + +/* + * Since SPL did pll and ddr initialization for us, + * we don't need to do it twice. + */ +#if !defined(CONFIG_SPL_BUILD) && !defined(CONFIG_NOR_BOOT) +#define CONFIG_SKIP_LOWLEVEL_INIT +#endif /* !CONFIG_SPL_BUILD, ... */ +/* + * Our DDR memory always starts at 0x80000000 and U-Boot shall have + * relocated itself to higher in memory by the time this value is used. + */ +#define CONFIG_SYS_LOAD_ADDR 0x80000000 +/* + * ---------------------------------------------------------------------------- + * DDR information. We say (for simplicity) that we have 1 bank, + * always, even when we have more. We always start at 0x80000000, + * and we place the initial stack pointer in our SRAM. + */ +#define CONFIG_NR_DRAM_BANKS 1 +#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define CONFIG_SYS_INIT_SP_ADDR (NON_SECURE_SRAM_END - \ + GENERATED_GBL_DATA_SIZE) + +/* I2C */ +#define CONFIG_SYS_I2C +#define CONFIG_SYS_OMAP24_I2C_SPEED 100000 +#define CONFIG_SYS_OMAP24_I2C_SLAVE 1 +#define CONFIG_SYS_I2C_OMAP24XX + +/* GPIO */ +#define CONFIG_OMAP_GPIO +#define CONFIG_CMD_GPIO +/* + * ---------------------------------------------------------------------------- + * The following are general good-enough settings for U-Boot. We set a + * large malloc pool as we generally have a lot of DDR, and we opt for + * function over binary size in the main portion of U-Boot as this is + * generally easily constrained later if needed. We enable the config + * options that give us information in the environment about what board + * we are on so we do not need to rely on the command prompt. We set a + * console baudrate of 115200 and use the default baud rate table. + */ +#define CONFIG_SYS_MALLOC_LEN (1024 << 10) +#define CONFIG_SYS_HUSH_PARSER +#define CONFIG_SYS_PROMPT "U-Boot (BuR V2.0)# " +#define CONFIG_SYS_CONSOLE_INFO_QUIET +#define CONFIG_ENV_OVERWRITE /* Overwrite ethaddr / serial# */ + +/* As stated above, the following choices are optional. */ +#define CONFIG_SYS_LONGHELP +#define CONFIG_AUTO_COMPLETE +#define CONFIG_CMDLINE_EDITING +#define CONFIG_VERSION_VARIABLE + +/* We set the max number of command args high to avoid HUSH bugs. */ +#define CONFIG_SYS_MAXARGS 64 + +/* Console I/O Buffer Size */ +#define CONFIG_SYS_CBSIZE 512 +/* Print Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE +\ + sizeof(CONFIG_SYS_PROMPT) + 16) +/* Boot Argument Buffer Size */ +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE +/* + * For commands to use, we take the default list and add a few other + * useful commands. Note that we must have set CONFIG_SYS_NO_FLASH + * prior to this include, in order to skip a few commands. When we do + * have flash, if we expect these commands they must be enabled in that + * config. If desired, a specific list of desired commands can be used + * instead. + */ +#include +/* undefine commands, which we do not need */ +#undef CONFIG_CMD_EDITENV +#undef CONFIG_CMD_FPGA +#undef CONFIG_CMD_IMI +#undef CONFIG_CMD_ITEST +#undef CONFIG_CMD_LOADS +#undef CONFIG_CMD_LOADB +#undef CONFIG_CMD_NFS +#undef CONFIG_CMD_SETGETDCR +#undef CONFIG_CMD_XIMG +#undef CONFIG_CMD_CRC32 +/* define command we need always */ +#define CONFIG_CMD_ECHO +#define CONFIG_CMD_SOURCE + +/* + * Our platforms make use of SPL to initalize the hardware (primarily + * memory) enough for full U-Boot to be loaded. We also support Falcon + * Mode so that the Linux kernel can be booted directly from SPL + * instead, if desired. We make use of the general SPL framework found + * under common/spl/. Given our generally common memory map, we set a + * number of related defaults and sizes here. + */ +#define CONFIG_SPL +#define CONFIG_SPL_FRAMEWORK +/* + * Place the image at the start of the ROM defined image space. + * We limit our size to the ROM-defined downloaded image area, and use the + * rest of the space for stack. We load U-Boot itself into memory at + * 0x80800000 for legacy reasons (to not conflict with older SPLs). We + * have our BSS be placed 1MiB after this, to allow for the default + * Linux kernel address of 0x80008000 to work, in the Falcon Mode case. + * We have the SPL malloc pool at the end of the BSS area. + * + * ---------------------------------------------------------------------------- + */ +#define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR +#undef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0x80800000 +#define CONFIG_SPL_BSS_START_ADDR 0x80A00000 +#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */ +#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \ + CONFIG_SPL_BSS_MAX_SIZE) +#define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN + +/* General parts of the framework, required. */ +#define CONFIG_SPL_I2C_SUPPORT +#define CONFIG_SPL_LIBCOMMON_SUPPORT +#define CONFIG_SPL_LIBGENERIC_SUPPORT +#define CONFIG_SPL_SERIAL_SUPPORT +#define CONFIG_SPL_BOARD_INIT +#define CONFIG_SPL_YMODEM_SUPPORT +#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/am33xx/u-boot-spl.lds" + +#endif /* ! __BUR_AM335X_COMMON_H__ */ diff --git a/include/configs/tseries.h b/include/configs/tseries.h new file mode 100644 index 0000000..8fb87ac --- /dev/null +++ b/include/configs/tseries.h @@ -0,0 +1,265 @@ +/* + * tseries.h + * + * specific parts for B&R T-Series Motherboard + * + * Copyright (C) 2013 Hannes Petermaier - + * Bernecker & Rainer Industrieelektronik GmbH - http://www.br-automation.com + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_TSERIES_H__ +#define __CONFIG_TSERIES_H__ + +#include +/* ------------------------------------------------------------------------- */ +/* Clock Defines */ +#define V_OSCK 26000000 /* Clock output from T2 */ +#define V_SCLK (V_OSCK) + +#define CONFIG_POWER_TPS65217 + +/* Support both device trees and ATAGs. */ +#define CONFIG_OF_LIBFDT +#define CONFIG_CMDLINE_TAG +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_INITRD_TAG +#define CONFIG_CMD_BOOTZ +/*#define CONFIG_MACH_TYPE 3589*/ +#define CONFIG_MACH_TYPE 0xFFFFFFFF /* TODO: check with kernel*/ + +/* MMC/SD IP block */ +#if defined(CONFIG_EMMC_BOOT) + #define CONFIG_MMC + #define CONFIG_GENERIC_MMC + #define CONFIG_OMAP_HSMMC + #define CONFIG_CMD_MMC + #define CONFIG_SUPPORT_EMMC_BOOT +/* RAW SD card / eMMC locations. */ + #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /*addr. 0x60000 */ + #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */ + #define CONFIG_SPL_MMC_SUPPORT +#endif /* CONFIG_EMMC_BOOT */ + +/* + * When we have SPI or NAND flash we expect to be making use of mtdparts, + * both for ease of use in U-Boot and for passing information on to + * the Linux kernel. + */ +#if defined(CONFIG_SPI_BOOT) || defined(CONFIG_NAND) +#define CONFIG_MTD_DEVICE /* Required for mtdparts */ +#define CONFIG_CMD_MTDPARTS +#endif /* CONFIG_SPI_BOOT, ... */ + +#undef CONFIG_SPL_OS_BOOT +#ifdef CONFIG_SPL_OS_BOOT +#define CONFIG_SYS_SPL_ARGS_ADDR 0x80F80000 + +/* RAW SD card / eMMC */ +#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0x900 /* address 0x120000 */ +#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x80 /* address 0x10000 */ +#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0x80 /* 64KiB */ + +/* NAND */ +#ifdef CONFIG_NAND +#define CONFIG_CMD_SPL_NAND_OFS 0x080000 /* end of u-boot */ +#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x140000 +#define CONFIG_CMD_SPL_WRITE_SIZE 0x2000 +#endif /* CONFIG_NAND */ +#endif /* CONFIG_SPL_OS_BOOT */ + +#ifdef CONFIG_NAND +#define CONFIG_SPL_NAND_AM33XX_BCH /* OMAP4 and later ELM support */ +#define CONFIG_SPL_NAND_SUPPORT +#define CONFIG_SPL_NAND_BASE +#define CONFIG_SPL_NAND_DRIVERS +#define CONFIG_SPL_NAND_ECC +#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 +#endif /* CONFIG_NAND */ + +/* Always 128 KiB env size */ +#define CONFIG_ENV_SIZE (128 << 10) + +#ifdef CONFIG_NAND +#define NANDARGS \ + "mtdids=" MTDIDS_DEFAULT "\0" \ + "mtdparts=" MTDPARTS_DEFAULT "\0" \ + "nandargs=setenv bootargs console=${console} " \ + "${optargs} " \ + "root=${nandroot} " \ + "rootfstype=${nandrootfstype}\0" \ + "nandroot=ubi0:rootfs rw ubi.mtd=8,2048\0" \ + "nandrootfstype=ubifs rootwait=1\0" \ + "nandimgsize=0x500000\0" \ + "nandboot=echo Booting from nand ...; " \ + "run nandargs; " \ + "nand read ${loadaddr} kernel ${nandimgsize}; " \ + "bootz ${loadaddr}\0" +#else +#define NANDARGS "" +#endif /* CONFIG_NAND */ + +#ifdef CONFIG_MMC +#define MMCARGS \ + "silent=1\0" +#else +#define MMCARGS "" +#endif /* CONFIG_MMC */ + +#ifndef CONFIG_SPL_BUILD +#define CONFIG_EXTRA_ENV_SETTINGS \ + "autoload=0\0" \ + "loadaddr=0x80200000\0" \ + "bootfile=zImage\0" \ + "console=ttyO0,115200n8\0" \ + "optargs=\0" \ + "rootpath=/tftpboot/tseries/rootfs-small\0" \ + "nfsopts=nolock\0" \ + "netargs=setenv bootargs console=${console} " \ + "${optargs} " \ + "root=/dev/nfs " \ + "nfsroot=${serverip}:${rootpath},${nfsopts} rw " \ + "ip=dhcp\0" \ + "netboot=echo Booting from network ...; " \ + "setenv autoload no; " \ + "dhcp; " \ + "tftp ${loadaddr} ${bootfile}; " \ + "run netargs; " \ + "bootm ${loadaddr}\0" \ + "usbupdate=echo Updating UBOOT from USB-Stick ...; " \ + "usb start; " \ + "fatload usb 0 0x80000000 updateubootusb.img; " \ + "source;\0" \ + "netupdate=echo Updating UBOOT from Network (TFTP) ...; " \ + "setenv autoload 0; " \ + "dhcp;" \ + "tftp 0x80000000 updateUBOOT.img;" \ + "source;\0" \ + NANDARGS \ + MMCARGS +#endif /* !CONFIG_SPL_BUILD*/ + +#define CONFIG_BOOTCOMMAND \ + "run mmcboot1;" +#define CONFIG_BOOTDELAY 1 /* TODO: für release auf 0 setzen */ + +#ifdef CONFIG_NAND +/* + * GPMC block. We support 1 device and the physical address to + * access CS0 at is 0x8000000. + */ +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define CONFIG_SYS_NAND_BASE 0x8000000 +#define CONFIG_NAND_OMAP_GPMC +#define CONFIG_CMD_NAND +/* don't change OMAP_ELM, ECCSCHEME. ROM code only supports this */ +#define CONFIG_NAND_OMAP_ELM +#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW +#define GPMC_NAND_ECC_LP_x16_LAYOUT 1 +#define CONFIG_SYS_NAND_5_ADDR_CYCLE +#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) +#define CONFIG_SYS_NAND_PAGE_SIZE 2048 +#define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \ + CONFIG_SYS_NAND_PAGE_SIZE) +#define CONFIG_SYS_NAND_OOBSIZE 64 +#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS +#define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9, \ + 10, 11, 12, 13, 14, 15, 16, 17, \ + 18, 19, 20, 21, 22, 23, 24, 25, \ + 26, 27, 28, 29, 30, 31, 32, 33, \ + 34, 35, 36, 37, 38, 39, 40, 41, \ + 42, 43, 44, 45, 46, 47, 48, 49, \ + 50, 51, 52, 53, 54, 55, 56, 57, } + +#define CONFIG_SYS_NAND_ECCSIZE 512 +#define CONFIG_SYS_NAND_ECCBYTES 14 + +#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 + +#define MTDIDS_DEFAULT "nand0=omap2-nand.0" +#define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:" \ + "128k(SPL)," \ + "128k(SPL.backup1)," \ + "128k(SPL.backup2)," \ + "128k(SPL.backup3)," \ + "512k(u-boot)," \ + "128k(u-boot-spl-os)," \ + "128k(u-boot-env)," \ + "5m(kernel),"\ + "-(rootfs)" +#endif /* CONFIG_NAND */ + +/* USB configuration */ +#define CONFIG_USB_MUSB_DSPS +#define CONFIG_ARCH_MISC_INIT +#define CONFIG_MUSB_PIO_ONLY +#define CONFIG_MUSB_DISABLE_BULK_COMBINE_SPLIT +/* attention! not only for gadget, enables also highspeed in hostmode */ +#define CONFIG_USB_GADGET_DUALSPEED +#define CONFIG_MUSB_HOST +#define CONFIG_AM335X_USB0 +#define CONFIG_AM335X_USB0_MODE MUSB_HOST +#define CONFIG_AM335X_USB1 +#define CONFIG_AM335X_USB1_MODE MUSB_HOST + +#ifdef CONFIG_MUSB_HOST +#define CONFIG_CMD_USB +#define CONFIG_USB_STORAGE +#endif /* CONFIG_MUSB_HOST */ + +#if defined(CONFIG_SPI_BOOT) +/* McSPI IP block */ +#define CONFIG_SPI +#define CONFIG_OMAP3_SPI +#define CONFIG_CMD_SPI +#define CONFIG_CMD_SF +#define CONFIG_SPI_FLASH +#define CONFIG_SPI_FLASH_STMICRO +#define CONFIG_SF_DEFAULT_SPEED 24000000 + +#define CONFIG_SPL_SPI_SUPPORT +#define CONFIG_SPL_SPI_FLASH_SUPPORT +#define CONFIG_SPL_SPI_LOAD +#define CONFIG_SPL_SPI_BUS 0 +#define CONFIG_SPL_SPI_CS 0 +#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000 +#undef CONFIG_ENV_IS_NOWHERE +#define CONFIG_ENV_IS_IN_SPI_FLASH +#define CONFIG_SYS_REDUNDAND_ENVIRONMENT +#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED +#define CONFIG_ENV_SECT_SIZE (4 << 10) /* 4 KB sectors */ +#define CONFIG_ENV_OFFSET (768 << 10) /* 768 KiB in */ +#define CONFIG_ENV_OFFSET_REDUND (896 << 10) /* 896 KiB in */ + +#elif defined(CONFIG_EMMC_BOOT) +#undef CONFIG_ENV_IS_NOWHERE +#define CONFIG_ENV_IS_IN_MMC +#define CONFIG_SYS_MMC_ENV_DEV 1 +#define CONFIG_SYS_MMC_ENV_PART 2 +#define CONFIG_ENV_OFFSET 0x40000 /* TODO: Adresse definieren */ +#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) +#define CONFIG_SYS_REDUNDAND_ENVIRONMENT + +#elif defined(CONFIG_NAND) +#undef CONFIG_ENV_IS_NOWHERE +#define CONFIG_ENV_IS_IN_NAND +#define CONFIG_ENV_OFFSET 0x120000 /* TODO: Adresse definieren */ +#define CONFIG_SYS_ENV_SECT_SIZE CONFIG_ENV_SIZE +#else +#error "no storage for Environment defined!" +#endif +/* + * Common filesystems support. When we have removable storage we + * enabled a number of useful commands and support. + */ +#if defined(CONFIG_MMC) || defined(CONFIG_USB_STORAGE) +#define CONFIG_DOS_PARTITION +#define CONFIG_CMD_FAT +#define CONFIG_FAT_WRITE +#define CONFIG_CMD_FS_GENERIC +#endif /* CONFIG_MMC, ... */ + +#endif /* ! __CONFIG_TSERIES_H__ */ -- cgit v1.1 From 072cefe07d54879816d0f17830f28198af4c2727 Mon Sep 17 00:00:00 2001 From: Hannes Petermaier Date: Fri, 7 Feb 2014 14:06:50 +0100 Subject: Add support for B&R KWB Motherboard Adds support for Bernecker & Rainer Industrieelektronik GmbH KWB Motherboard, using TI's AM3352 SoC. Most of code is derived from TI's AM335x_EVM Signed-off-by: Hannes Petermaier Cc: trini@ti.com --- include/configs/kwb.h | 128 ++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 128 insertions(+) create mode 100644 include/configs/kwb.h (limited to 'include') diff --git a/include/configs/kwb.h b/include/configs/kwb.h new file mode 100644 index 0000000..0f631c0 --- /dev/null +++ b/include/configs/kwb.h @@ -0,0 +1,128 @@ +/* + * kwb.h + * + * specific parts for B&R KWB Motherboard + * + * Copyright (C) 2013 Hannes Petermaier - + * Bernecker & Rainer Industrieelektronik GmbH - http://www.br-automation.com + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_KWB_H__ +#define __CONFIG_KWB_H__ + +#include +/* ------------------------------------------------------------------------- */ +/* Clock Defines */ +#define V_OSCK 26000000 /* Clock output from T2 */ +#define V_SCLK (V_OSCK) + +#define CONFIG_POWER_TPS65217 + +#define CONFIG_MACH_TYPE 3589 +/* I2C IP block */ +#define CONFIG_SYS_OMAP24_I2C_SPEED_PSOC 20000 + +/* GPIO */ +#define CONFIG_SPL_GPIO_SUPPORT + +/* MMC/SD IP block */ +#define CONFIG_MMC +#define CONFIG_GENERIC_MMC +#define CONFIG_OMAP_HSMMC +#define CONFIG_CMD_MMC +#define CONFIG_SUPPORT_EMMC_BOOT +/* RAW SD card / eMMC locations. */ +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /*addr. 0x60000 */ +#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */ +#define CONFIG_SPL_MMC_SUPPORT + +#undef CONFIG_SPL_OS_BOOT +#ifdef CONFIG_SPL_OS_BOOT +#define CONFIG_SYS_SPL_ARGS_ADDR 0x80F80000 + +/* RAW SD card / eMMC */ +#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0x900 /* address 0x120000 */ +#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x80 /* address 0x10000 */ +#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0x80 /* 64KiB */ + +#endif /* CONFIG_SPL_OS_BOOT */ + +/* Always 128 KiB env size */ +#define CONFIG_ENV_SIZE (128 << 10) + +#ifndef CONFIG_SPL_BUILD +#define CONFIG_EXTRA_ENV_SETTINGS \ + "autoload=0\0" \ + "loadaddr=0x80100000\0" \ + "bootfile=arimg\0" \ + "usbboot=echo Booting from USB-Stick ...; " \ + "usb start; " \ + "fatload usb 0 ${loadaddr} ${bootfile}; " \ + "usb stop; " \ + "go ${loadaddr};\0" \ + "netboot=echo Booting from network ...; " \ + "setenv autoload 0; " \ + "dhcp; " \ + "tftp ${loadaddr} arimg; " \ + "go ${loadaddr}\0" \ + "usbupdate=echo Updating UBOOT from USB-Stick ...; " \ + "usb start; " \ + "fatload usb 0 0x80000000 updateubootusb.img; " \ + "source;\0" \ + "netupdate=echo Updating UBOOT from Network (TFTP) ...; " \ + "setenv autoload 0; " \ + "dhcp;" \ + "tftp 0x80000000 updateUBOOT.img;" \ + "source;\0" +#endif /* !CONFIG_SPL_BUILD*/ + +#define CONFIG_BOOTCOMMAND \ + "run usbupdate;" +#define CONFIG_BOOTDELAY 1 /* TODO: für release auf 0 setzen */ + +/* undefine command which we not need here */ +#undef CONFIG_BOOTM_LINUX +#undef CONFIG_BOOTM_NETBSD +#undef CONFIG_BOOTM_PLAN9 +#undef CONFIG_BOOTM_RTEMS +#undef CONFIG_GZIP +#undef CONFIG_ZLIB +#undef CONFIG_CMD_CRC32 + +/* USB configuration */ +#define CONFIG_USB_MUSB_DSPS +#define CONFIG_ARCH_MISC_INIT +#define CONFIG_MUSB_PIO_ONLY +#define CONFIG_MUSB_DISABLE_BULK_COMBINE_SPLIT +/* attention! not only for gadget, enables also highspeed in hostmode */ +#define CONFIG_USB_GADGET_DUALSPEED +#define CONFIG_MUSB_HOST +#define CONFIG_AM335X_USB0 +#define CONFIG_AM335X_USB0_MODE MUSB_HOST + +#ifdef CONFIG_MUSB_HOST +#define CONFIG_CMD_USB +#define CONFIG_USB_STORAGE +#endif /* CONFIG_MUSB_HOST */ + +#undef CONFIG_ENV_IS_NOWHERE +#define CONFIG_ENV_IS_IN_MMC +#define CONFIG_SYS_MMC_ENV_DEV 1 +#define CONFIG_SYS_MMC_ENV_PART 2 +#define CONFIG_ENV_OFFSET 0x40000 /* TODO: Adresse definieren */ +#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) +#define CONFIG_SYS_REDUNDAND_ENVIRONMENT +/* + * Common filesystems support. When we have removable storage we + * enabled a number of useful commands and support. + */ +#if defined(CONFIG_MMC) || defined(CONFIG_USB_STORAGE) +#define CONFIG_DOS_PARTITION +#define CONFIG_CMD_FAT +#define CONFIG_FAT_WRITE +#define CONFIG_CMD_FS_GENERIC +#endif /* CONFIG_MMC, ... */ + +#endif /* ! __CONFIG_TSERIES_H__ */ -- cgit v1.1 From 36481ded99a530f6820961a2335e94b485469ae4 Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Fri, 14 Feb 2014 09:47:17 +0100 Subject: arm: omap3: Fix tao3530/omap3_ha SPL boot hangup (GPIO clocks not enabled) Patch f33b9bd3 [arm: omap3: Enable clocks for peripherals only if they are used] breaks SPL booting on tao3530. Since some gpio input's are read to detect the board revision. But with this patch above, the clocks to the GPIO subsystems are not enabled per default any more. The GPIO banks need to be configured specifically now. Signed-off-by: Stefan Roese Cc: Tom Rini Cc: Michael Trimarchi Reviewed-by: Stefano Babic --- include/configs/tao3530.h | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'include') diff --git a/include/configs/tao3530.h b/include/configs/tao3530.h index 9abfe82..9c04c23 100644 --- a/include/configs/tao3530.h +++ b/include/configs/tao3530.h @@ -83,6 +83,13 @@ #define CONFIG_OMAP_HSMMC #define CONFIG_DOS_PARTITION +/* GPIO banks */ +#define CONFIG_OMAP3_GPIO_2 /* GPIO32 ..63 is in GPIO bank 2 */ +#define CONFIG_OMAP3_GPIO_3 /* GPIO64 ..95 is in GPIO bank 3 */ +#define CONFIG_OMAP3_GPIO_4 /* GPIO96 ..127 is in GPIO bank 4 */ +#define CONFIG_OMAP3_GPIO_5 /* GPIO128..159 is in GPIO bank 5 */ +#define CONFIG_OMAP3_GPIO_6 /* GPIO160..191 is in GPIO bank 6 */ + /* commands to include */ #include -- cgit v1.1 From 9267110270a4b7b4ccdf9de9d82b7ac85ce57d0c Mon Sep 17 00:00:00 2001 From: Stefano Babic Date: Fri, 14 Feb 2014 12:51:25 +0100 Subject: OMAP3: add missing gpio clock init and fix NAND SPL for mcx board Patch contains the same fixes as commit 4b9b2c300a23ca4a85811918dc92e822a9571a87 (missing CONFIG_OMAP3_GPIO_2) and commit f9095aac793aa8917ab9b915c5d449e6dc8d3d30 (missing CONFIG_SPL_NAND_SOFTECC). Same issues are relevant for the mcx board, too. Signed-off-by: Stefano Babic --- include/configs/mcx.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/configs/mcx.h b/include/configs/mcx.h index dcd29ce..209c2bb 100644 --- a/include/configs/mcx.h +++ b/include/configs/mcx.h @@ -98,6 +98,7 @@ /* EHCI */ #define CONFIG_USB_STORAGE +#define CONFIG_OMAP3_GPIO_2 #define CONFIG_OMAP3_GPIO_5 #define CONFIG_USB_EHCI #define CONFIG_USB_EHCI_OMAP @@ -395,6 +396,7 @@ #define CONFIG_SYS_NAND_ECCSIZE 256 #define CONFIG_SYS_NAND_ECCBYTES 3 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_SW +#define CONFIG_SPL_NAND_SOFTECC #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE -- cgit v1.1 From a5d64dbf20dd4b658dafb081afbbea797b27bdc3 Mon Sep 17 00:00:00 2001 From: Stefano Babic Date: Fri, 14 Feb 2014 12:51:27 +0100 Subject: OMAP3: fix default environment for mcx board Patch allows to load a script at the startup from MMC. Signed-off-by: Stefano Babic --- include/configs/mcx.h | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) (limited to 'include') diff --git a/include/configs/mcx.h b/include/configs/mcx.h index 209c2bb..7c5c2f4 100644 --- a/include/configs/mcx.h +++ b/include/configs/mcx.h @@ -264,10 +264,9 @@ "${mtdparts} " \ "vram=6M omapfb.vram=1:2M,2:2M,3:2M " \ "omapdss.def_disp=lcd;" \ - "bootm 0x82000000 0x84000000\0" - -#define CONFIG_BOOTCOMMAND \ - "run nandboot" + "bootm 0x82000000 0x84000000\0" \ + "bootcmd=mmc rescan;if fatload mmc 0 82000000 loadbootscr.scr;" \ + "then source 82000000;else run nandboot;fi\0" #define CONFIG_AUTO_COMPLETE #define CONFIG_CMDLINE_EDITING -- cgit v1.1 From bc97f48915907553f350f843f3a0a6987a008248 Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Fri, 21 Feb 2014 09:28:33 +0100 Subject: arm: omap: cm_t35: Remove CONFIG_SYS_BOOTMAPSZ to fix FDT Linux booting With CONFIG_SYS_BOOTMAPSZ defined, recent Linux kernel booting results in this error: Booting using the fdt blob at 0x81f00000 Loading Kernel Image ... OK ERROR: Failed to allocate 0x1189d bytes below 0x80004000. device tree - allocation error FDT creation failed! hanging...### ERROR ### Please RESET the board ### Removing this define solves this issue. Signed-off-by: Stefan Roese Cc: Nikita Kiryanov Cc: Igor Grinberg Cc: Tom Rini --- include/configs/cm_t35.h | 7 ------- 1 file changed, 7 deletions(-) (limited to 'include') diff --git a/include/configs/cm_t35.h b/include/configs/cm_t35.h index 7729a02..08c67f5 100644 --- a/include/configs/cm_t35.h +++ b/include/configs/cm_t35.h @@ -45,13 +45,6 @@ #define CONFIG_MISC_INIT_R #define CONFIG_OF_LIBFDT 1 -/* - * The early kernel mapping on ARM currently only maps from the base of DRAM - * to the end of the kernel image. The kernel is loaded at DRAM base + 0x8000. - * The early kernel pagetable uses DRAM base + 0x4000 to DRAM base + 0x8000, - * so that leaves DRAM base to DRAM base + 0x4000 available. - */ -#define CONFIG_SYS_BOOTMAPSZ 0x4000 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ #define CONFIG_SETUP_MEMORY_TAGS -- cgit v1.1 From 01d92b0472647f339fe3dd495c13173ff7e568b4 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Tue, 21 Jan 2014 17:15:06 -0500 Subject: am335x_evm: Enable GPT commands Signed-off-by: Tom Rini --- include/configs/am335x_evm.h | 12 ++++++++++++ 1 file changed, 12 insertions(+) (limited to 'include') diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h index 96ae369..59a8f36 100644 --- a/include/configs/am335x_evm.h +++ b/include/configs/am335x_evm.h @@ -32,6 +32,12 @@ /* Always 128 KiB env size */ #define CONFIG_ENV_SIZE (128 << 10) +/* Enhance our eMMC support / experience. */ +#define CONFIG_CMD_GPT +#define CONFIG_EFI_PARTITION +#define CONFIG_PARTITION_UUIDS +#define CONFIG_CMD_PART + #ifdef CONFIG_NAND #define NANDARGS \ "mtdids=" MTDIDS_DEFAULT "\0" \ @@ -65,6 +71,9 @@ "bootfile=zImage\0" \ "fdtfile=undefined\0" \ "console=ttyO0,115200n8\0" \ + "partitions=" \ + "uuid_disk=${uuid_gpt_disk};" \ + "name=rootfs,start=2MiB,size=-,uuid=${uuid_gpt_rootfs}\0" \ "optargs=\0" \ "mmcdev=0\0" \ "mmcroot=/dev/mmcblk0p2 ro\0" \ @@ -296,6 +305,9 @@ #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_USBETH_SUPPORT) /* disable host part of MUSB in SPL */ #undef CONFIG_MUSB_HOST +/* disable EFI partitions and partition UUID support */ +#undef CONFIG_PARTITION_UUIDS +#undef CONFIG_EFI_PARTITION /* * Disable CPSW SPL support so we fit within the 101KiB limit. */ -- cgit v1.1 From 0f1b04439596bc47ea95fab2d7d072b278b2a925 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Tue, 21 Jan 2014 17:15:07 -0500 Subject: am43xx_evm: Enable GPT commands Signed-off-by: Tom Rini --- include/configs/am43xx_evm.h | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'include') diff --git a/include/configs/am43xx_evm.h b/include/configs/am43xx_evm.h index d3c4756..9b4716f 100644 --- a/include/configs/am43xx_evm.h +++ b/include/configs/am43xx_evm.h @@ -84,6 +84,12 @@ #define CONFIG_OMAP_USB_PHY #define CONFIG_AM437X_USB2PHY2_HOST +/* Enhance our eMMC support / experience. */ +#define CONFIG_CMD_GPT +#define CONFIG_EFI_PARTITION +#define CONFIG_PARTITION_UUIDS +#define CONFIG_CMD_PART + #ifndef CONFIG_SPL_BUILD #define CONFIG_EXTRA_ENV_SETTINGS \ "loadaddr=0x80200000\0" \ @@ -95,6 +101,9 @@ "bootdir=/boot\0" \ "bootfile=zImage\0" \ "console=ttyO0,115200n8\0" \ + "partitions=" \ + "uuid_disk=${uuid_gpt_disk};" \ + "name=rootfs,start=2MiB,size=-,uuid=${uuid_gpt_rootfs}\0" \ "optargs=\0" \ "mmcdev=0\0" \ "mmcroot=/dev/mmcblk0p2 rw\0" \ -- cgit v1.1 From 2efa79ae00fa935cf336b09ec12188654ae545ce Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Tue, 21 Jan 2014 17:15:08 -0500 Subject: dra7xx_evm: Enable GPT commands Signed-off-by: Tom Rini --- include/configs/dra7xx_evm.h | 11 +++++++++++ 1 file changed, 11 insertions(+) (limited to 'include') diff --git a/include/configs/dra7xx_evm.h b/include/configs/dra7xx_evm.h index 86574c8..c67cf60 100644 --- a/include/configs/dra7xx_evm.h +++ b/include/configs/dra7xx_evm.h @@ -34,8 +34,19 @@ #define CONFIG_SYS_OMAP_ABE_SYSCK +/* Define the default GPT table for eMMC */ +#define PARTS_DEFAULT \ + "uuid_disk=${uuid_gpt_disk};" \ + "name=rootfs,start=2MiB,size=-,uuid=${uuid_gpt_rootfs}" + #include +/* Enhance our eMMC support / experience. */ +#define CONFIG_CMD_GPT +#define CONFIG_EFI_PARTITION +#define CONFIG_PARTITION_UUIDS +#define CONFIG_CMD_PART + /* CPSW Ethernet */ #define CONFIG_CMD_NET /* 'bootp' and 'tftp' */ #define CONFIG_CMD_DHCP -- cgit v1.1 From 4f80d5ba8e79e4bc96b71295703372718528b3a7 Mon Sep 17 00:00:00 2001 From: Nishanth Menon Date: Tue, 7 Jan 2014 20:06:56 -0600 Subject: omap4_common: config: remove I2C for SPL mode Commit 6789e84ecaa8f45d053084e08c381284a04abff7 (i2c, omap24xx: convert driver to new mutlibus/mutliadapter framework) intended to make I2C driver compatible with latest changes. It unfortunately has had a impact on size on SPL as well. For example on SDP4430, 32032 bytes before/MLO 35416 bytes after/MLO With this mentioned commit, MLO stops booting on SDP4430 as only 32K is accessible for non-secure (bootloader) s/w on GP devices and the size increase to 56K fails boot. On the latest u-boot commit e7be18225fbea76d1f0034b224f0d1e60f07cfcf, MLO is now at size 35592 bytes, However, I2C is not necessary for SPL to function as we use SR_I2C for controlling the PMIC. Disabling I2C reduces MLO to 32224 bytes which allows OMAP4 GP platform to boot up. Since this is common for all OMAP4 platforms, remove the need for I2C for SPL builds in the common config. Signed-off-by: Nishanth Menon Reviewed-by: Sricharan R --- include/configs/ti_omap4_common.h | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'include') diff --git a/include/configs/ti_omap4_common.h b/include/configs/ti_omap4_common.h index 2f0e4c0..bcb5eab 100644 --- a/include/configs/ti_omap4_common.h +++ b/include/configs/ti_omap4_common.h @@ -163,4 +163,10 @@ #define CONFIG_SPL_NAND_AM33XX_BCH /* ELM support */ #endif +#ifdef CONFIG_SPL_BUILD +/* No need for i2c in SPL mode as we will use SRI2C for PMIC access on OMAP4 */ +#undef CONFIG_SYS_I2C +#undef CONFIG_SYS_I2C_OMAP24XX +#endif + #endif /* __CONFIG_TI_OMAP4_COMMON_H */ -- cgit v1.1 From 1998a1a6c32d5e3ed729e0e08867d6f8fa97df50 Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Thu, 13 Feb 2014 20:44:07 -0700 Subject: ARM: rpi_b: rework boot scripts, enable sysboot Rework rpi_b's bootcmd (and sub-commands) to match Tegra's bootcmd as much as possible. This will aid in a future patch which will create a common header e.g. config_distro_bootcmd.h. While at it, enable booting from extlinux.conf using the sysboot command. The iteration and componentization currently makes a little more sense for Tegra than RPi, but I'd still like to keep the two as similar as possible. USB and networking support is coming to the RPi in due course, and it'll all make more sense then anyway. Signed-off-by: Stephen Warren --- include/configs/rpi_b.h | 85 ++++++++++++++++++++++++++++++++++++++++--------- 1 file changed, 70 insertions(+), 15 deletions(-) (limited to 'include') diff --git a/include/configs/rpi_b.h b/include/configs/rpi_b.h index 4b5a0c2..6306d61 100644 --- a/include/configs/rpi_b.h +++ b/include/configs/rpi_b.h @@ -100,12 +100,20 @@ "env import -t ${loadaddr} ${filesize}; " \ "fi" +#define ENV_DEVICE_SETTINGS \ + "stdin=serial,lcd\0" \ + "stdout=serial,lcd\0" \ + "stderr=serial,lcd\0" + /* * Memory layout for where various images get loaded by boot scripts: * * scriptaddr can be pretty much anywhere that doesn't conflict with something * else. Put it low in memory to avoid conflicts. * + * pxefile_addr_r can be pretty much anywhere that doesn't conflict with + * something else. Put it low in memory to avoid conflicts. + * * kernel_addr_r must be within the first 128M of RAM in order for the * kernel's CONFIG_AUTO_ZRELADDR option to work. Since the kernel will * decompress itself to 0x8000 after the start of RAM, kernel_addr_r @@ -121,35 +129,82 @@ * ramdisk_addr_r simply shouldn't overlap anything else. Choosing 33M allows * for the FDT/DTB to be up to 1M, which is hopefully plenty. */ -#define CONFIG_EXTRA_ENV_SETTINGS \ - "stdin=serial\0" \ - "stderr=serial,lcd\0" \ - "stdout=serial,lcd\0" \ +#define ENV_MEM_LAYOUT_SETTINGS \ "scriptaddr=0x00000000\0" \ + "pxefile_addr_r=0x00100000\0" \ "kernel_addr_r=0x01000000\0" \ "fdt_addr_r=0x02000000\0" \ "fdtfile=bcm2835-rpi-b.dtb\0" \ "ramdisk_addr_r=0x02100000\0" \ - "boot_targets=mmc0\0" \ - \ - "script_boot=" \ - "if fatload ${devtype} ${devnum}:1 " \ - "${scriptaddr} boot.scr.uimg; then " \ - "source ${scriptaddr}; " \ - "fi;\0" \ - \ + +#define BOOTCMDS_MMC \ "mmc_boot=" \ "setenv devtype mmc; " \ "if mmc dev ${devnum}; then " \ - "run script_boot; " \ + "run scan_boot; " \ "fi\0" \ + "bootcmd_mmc0=setenv devnum 0; run mmc_boot;\0" +#define BOOT_TARGETS_MMC "mmc0" + +#define BOOTCMDS_COMMON \ + "rootpart=1\0" \ + \ + "do_script_boot=" \ + "load ${devtype} ${devnum}:${rootpart} " \ + "${scriptaddr} ${prefix}${script}; " \ + "source ${scriptaddr}\0" \ + \ + "script_boot=" \ + "for script in ${boot_scripts}; do " \ + "if test -e ${devtype} ${devnum}:${rootpart} " \ + "${prefix}${script}; then " \ + "echo Found ${prefix}${script}; " \ + "run do_script_boot; " \ + "echo SCRIPT FAILED: continuing...; " \ + "fi; " \ + "done\0" \ \ - "bootcmd_mmc0=setenv devnum 0; run mmc_boot\0" \ + "do_sysboot_boot=" \ + "sysboot ${devtype} ${devnum}:${rootpart} any " \ + "${scriptaddr} ${prefix}extlinux/extlinux.conf\0" \ + \ + "sysboot_boot=" \ + "if test -e ${devtype} ${devnum}:${rootpart} " \ + "${prefix}extlinux/extlinux.conf; then " \ + "echo Found ${prefix}extlinux/extlinux.conf; " \ + "run do_sysboot_boot; " \ + "echo SCRIPT FAILED: continuing...; " \ + "fi\0" \ + \ + "scan_boot=" \ + "echo Scanning ${devtype} ${devnum}...; " \ + "for prefix in ${boot_prefixes}; do " \ + "run sysboot_boot; " \ + "run script_boot; " \ + "done\0" \ + \ + "boot_targets=" \ + BOOT_TARGETS_MMC " " \ + "\0" \ + \ + "boot_prefixes=/\0" \ + \ + "boot_scripts=boot.scr.uimg\0" \ + \ + BOOTCMDS_MMC #define CONFIG_BOOTCOMMAND \ "for target in ${boot_targets}; do run bootcmd_${target}; done" -#define CONFIG_BOOTDELAY 2 +#define CONFIG_BOOTCOMMAND \ + "for target in ${boot_targets}; do run bootcmd_${target}; done" + +#define CONFIG_EXTRA_ENV_SETTINGS \ + ENV_DEVICE_SETTINGS \ + ENV_MEM_LAYOUT_SETTINGS \ + BOOTCMDS_COMMON + +#define CONFIG_BOOTDELAY 2 /* Shell */ #define CONFIG_SYS_MAXARGS 8 -- cgit v1.1 From 989ce049997daefc25c15e1d5bf5307cdca25abb Mon Sep 17 00:00:00 2001 From: Darwin Rambo Date: Tue, 11 Feb 2014 11:06:34 -0800 Subject: arch: bcm281xx: Initial commit of bcm281xx architecture code Add bcm281xx architecture support code including a clock framework and chip reset. Define register block base addresses for the bcm281xx architecture and create an empty gpio header file required when CONFIG_CMD_GPIO is set. Signed-off-by: Darwin Rambo Reviewed-by: Steve Rae Reviewed-by: Tim Kryger --- include/bitfield.h | 58 ++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 58 insertions(+) create mode 100644 include/bitfield.h (limited to 'include') diff --git a/include/bitfield.h b/include/bitfield.h new file mode 100644 index 0000000..ec4815c --- /dev/null +++ b/include/bitfield.h @@ -0,0 +1,58 @@ +/* + * Copyright 2013 Broadcom Corporation. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +/* + * Bitfield operations + * + * These are generic bitfield operations which allow manipulation of variable + * width bitfields within a word. One use of this would be to use data tables + * to determine how to reprogram fields within R/W hardware registers. + * + * Example: + * + * old_reg_val + * +--------+----+---+--+-----+----------+ + * | | | | | old | | + * +--------+----+---+--+-----+----------+ + * + * new_reg_val + * +--------+----+---+--+-----+----------+ + * | | | | | new | | + * +--------+----+---+--+-----+----------+ + * + * mask = bitfield_mask(10, 5); + * old = bitfield_extract(old_reg_val, 10, 5); + * new_reg_val = bitfield_replace(old_reg_val, 10, 5, new); + * + * The numbers 10 and 5 could for example come from data + * tables which describe all bitfields in all registers. + */ + +#include + +/* Produces a mask of set bits covering a range of a uint value */ +static inline uint bitfield_mask(uint shift, uint width) +{ + return ((1 << width) - 1) << shift; +} + +/* Extract the value of a bitfield found within a given register value */ +static inline uint bitfield_extract(uint reg_val, uint shift, uint width) +{ + return (reg_val & bitfield_mask(shift, width)) >> shift; +} + +/* + * Replace the value of a bitfield found within a given register value + * Returns the newly modified uint value with the replaced field. + */ +static inline uint bitfield_replace(uint reg_val, uint shift, uint width, + uint bitfield_val) +{ + uint mask = bitfield_mask(shift, width); + + return (reg_val & ~mask) | (bitfield_val << shift); +} -- cgit v1.1 From 9ed679aeeb9899123bf92ed1eafb7cf6965473dc Mon Sep 17 00:00:00 2001 From: Darwin Rambo Date: Tue, 11 Feb 2014 11:06:38 -0800 Subject: board: bcm28155_ap: Add board files Add support for the bcm28155_ap reference board. Signed-off-by: Darwin Rambo Reviewed-by: Steve Rae Reviewed-by: Tim Kryger --- include/configs/bcm28155_ap.h | 140 ++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 140 insertions(+) create mode 100644 include/configs/bcm28155_ap.h (limited to 'include') diff --git a/include/configs/bcm28155_ap.h b/include/configs/bcm28155_ap.h new file mode 100644 index 0000000..8e1c81f --- /dev/null +++ b/include/configs/bcm28155_ap.h @@ -0,0 +1,140 @@ +/* + * Copyright 2013 Broadcom Corporation. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __BCM28155_AP_H +#define __BCM28155_AP_H + +#include +#include + +/* Architecture, CPU, chip, mach, etc */ +#define CONFIG_ARMV7 +#define CONFIG_KONA +#define CONFIG_SKIP_LOWLEVEL_INIT + +/* + * Memory configuration + */ +#define CONFIG_SYS_TEXT_BASE 0xae000000 + +#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define CONFIG_SYS_SDRAM_SIZE 0x80000000 +#define CONFIG_NR_DRAM_BANKS 1 + +#define CONFIG_SYS_MALLOC_LEN SZ_4M /* see armv7/start.S. */ +#define CONFIG_STACKSIZE SZ_256K + +/* GPIO Driver */ +#define CONFIG_KONA_GPIO + +/* MMC/SD Driver */ +#define CONFIG_SDHCI +#define CONFIG_MMC_SDMA +#define CONFIG_KONA_SDHCI +#define CONFIG_MMC +#define CONFIG_GENERIC_MMC + +#define CONFIG_SYS_SDIO_BASE0 SDIO1_BASE_ADDR +#define CONFIG_SYS_SDIO_BASE1 SDIO2_BASE_ADDR +#define CONFIG_SYS_SDIO_BASE2 SDIO3_BASE_ADDR +#define CONFIG_SYS_SDIO_BASE3 SDIO4_BASE_ADDR +#define CONFIG_SYS_SDIO0_MAX_CLK 48000000 +#define CONFIG_SYS_SDIO1_MAX_CLK 48000000 +#define CONFIG_SYS_SDIO2_MAX_CLK 48000000 +#define CONFIG_SYS_SDIO3_MAX_CLK 48000000 +#define CONFIG_SYS_SDIO0 "sdio1" +#define CONFIG_SYS_SDIO1 "sdio2" +#define CONFIG_SYS_SDIO2 "sdio3" +#define CONFIG_SYS_SDIO3 "sdio4" + +/* I2C Driver */ +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_KONA +#define CONFIG_SYS_SPD_BUS_NUM 3 /* Start with PMU bus */ +#define CONFIG_SYS_MAX_I2C_BUS 4 +#define CONFIG_SYS_I2C_BASE0 BSC1_BASE_ADDR +#define CONFIG_SYS_I2C_BASE1 BSC2_BASE_ADDR +#define CONFIG_SYS_I2C_BASE2 BSC3_BASE_ADDR +#define CONFIG_SYS_I2C_BASE3 PMU_BSC_BASE_ADDR + +/* Timer Driver */ +#define CONFIG_SYS_TIMER_RATE 32000 +#define CONFIG_SYS_TIMER_COUNTER (TIMER_BASE_ADDR + 4) /* STCLO offset */ + +/* Init functions */ +#define CONFIG_MISC_INIT_R /* board's misc_init_r function */ + +/* Some commands use this as the default load address */ +#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE + +/* No mtest functions as recommended */ +#undef CONFIG_CMD_MEMORY + +/* + * This is the initial SP which is used only briefly for relocating the u-boot + * image to the top of SDRAM. After relocation u-boot moves the stack to the + * proper place. + */ +#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE + +/* Serial Info */ +#define CONFIG_SYS_NS16550 +#define CONFIG_SYS_NS16550_SERIAL +/* Post pad 3 bytes after each reg addr */ +#define CONFIG_SYS_NS16550_REG_SIZE (-4) +#define CONFIG_SYS_NS16550_CLK 13000000 +#define CONFIG_CONS_INDEX 1 +#define CONFIG_SYS_NS16550_COM1 0x3e000000 + +#define CONFIG_BAUDRATE 115200 + +#define CONFIG_ENV_SIZE 0x10000 +#define CONFIG_ENV_IS_NOWHERE + +#define CONFIG_SYS_NO_FLASH /* Not using NAND/NOR unmanaged flash */ + +/* console configuration */ +#define CONFIG_SYS_CBSIZE 1024 /* Console buffer size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ + sizeof(CONFIG_SYS_PROMPT) + 16) /* Printbuffer size */ +#define CONFIG_SYS_MAXARGS 64 +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE + +/* + * One partition type must be defined for part.c + * This is necessary for the fatls command to work on an SD card + * for example. + */ +#define CONFIG_DOS_PARTITION + +/* version string, parser, etc */ +#define CONFIG_VERSION_VARIABLE +#define CONFIG_AUTO_COMPLETE +#define CONFIG_SYS_HUSH_PARSER +#define CONFIG_CMDLINE_EDITING +#define CONFIG_SYS_LONGHELP + +#define CONFIG_CRC32_VERIFY +#define CONFIG_MX_CYCLIC + +/* Initial upstream - boot to cmd prompt only */ +#define CONFIG_BOOTCOMMAND "" + +/* Commands */ +#include +#define CONFIG_CMD_ASKENV +#define CONFIG_CMD_CACHE +#define CONFIG_CMD_FAT +#define CONFIG_CMD_GPIO +#define CONFIG_CMD_I2C +#define CONFIG_CMD_MMC +#define CONFIG_CMD_BOOTZ +#define CONFIG_FAT_WRITE + +#undef CONFIG_CMD_NET +#undef CONFIG_CMD_NFS + +#endif /* __BCM28155_AP_H */ -- cgit v1.1 From f55e911ff4143ad8cbcc4517d5fb0b9350ff6084 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Mon, 24 Feb 2014 21:45:48 +0900 Subject: arm: delete unused macro CONFIG_ARCH_DEVICE_TREE Signed-off-by: Masahiro Yamada Cc: Tom Warren Cc: Stephen Warren Cc: Rajeshwari Birje Cc: Inderpal Singh --- include/configs/arndale.h | 2 -- include/configs/smdk5420.h | 2 -- 2 files changed, 4 deletions(-) (limited to 'include') diff --git a/include/configs/arndale.h b/include/configs/arndale.h index 9584d82..515facf 100644 --- a/include/configs/arndale.h +++ b/include/configs/arndale.h @@ -22,8 +22,6 @@ #define CONFIG_DISPLAY_CPUINFO #define CONFIG_DISPLAY_BOARDINFO -/* Enable fdt support for Exynos5250 */ -#define CONFIG_ARCH_DEVICE_TREE exynos5250 #define CONFIG_OF_CONTROL #define CONFIG_OF_SEPARATE diff --git a/include/configs/smdk5420.h b/include/configs/smdk5420.h index 447f8e5..b96eea8 100644 --- a/include/configs/smdk5420.h +++ b/include/configs/smdk5420.h @@ -17,8 +17,6 @@ #undef CONFIG_DEFAULT_DEVICE_TREE #define CONFIG_DEFAULT_DEVICE_TREE exynos5420-smdk5420 -#define CONFIG_ARCH_DEVICE_TREE exynos5420 - #define CONFIG_VAR_SIZE_SPL #define CONFIG_SYS_SDRAM_BASE 0x20000000 -- cgit v1.1 From 254887a57e93a818a10d95451a8ec29cb30c21f4 Mon Sep 17 00:00:00 2001 From: Shengzhou Liu Date: Fri, 21 Feb 2014 13:16:19 +0800 Subject: powerpc/t2081qds: Add T2081 QDS board support T2081 QDS is a high-performance computing evaluation, development and test platform supporting the T2081 QorIQ Power Architecture processor. T2081QDS board Overview ----------------------- - T2081 SoC integrating four 64-bit dual-threads e6500 cores up to 1.8GHz - 2MB shared L2 and 512KB L3 CoreNet platform cache (CPC) - CoreNet fabric supporting coherent and noncoherent transactions with prioritization and bandwidth allocation - 32-/64-bit DDR3/DDR3LP SDRAM memory controller with ECC and interleaving - Ethernet interfaces: - Two on-board 10M/100M/1G bps RGMII ports - Two 10Gbps XFI with on-board SFP+ cage - 1Gbps/2.5Gbps SGMII Riser card - 10Gbps XAUI Riser card - Accelerator: - DPAA components consist of FMan, BMan, QMan, PME, DCE and SEC - SerDes: - 8 lanes up to 10.3125GHz - Supports SGMII, HiGig, XFI, XAUI and Aurora debug, - IFC: - 512MB NOR Flash, 2GB NAND Flash, PromJet debug port and Qixis FPGA - eSPI: - Three SPI flash (16MB N25Q128A + 16MB EN25S64 + 512KB SST25WF040) - USB: - Two USB2.0 ports with internal PHY (one Type-A + one micro Type mini-AB) - PCIe: - Four PCI Express controllers (two PCIe 2.0 and two PCIe 3.0 with SR-IOV) - eSDHC: - Supports various SD/SDHC/SDXC/eMMC devices with adapter cards and voltage translators - I2C: - Four I2C controllers. - UART: - Dual 4-pins UART serial ports Signed-off-by: Shengzhou Liu Reviewed-by: York Sun --- include/configs/T2080QDS.h | 804 -------------------------------------------- include/configs/T208xQDS.h | 817 +++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 817 insertions(+), 804 deletions(-) delete mode 100644 include/configs/T2080QDS.h create mode 100644 include/configs/T208xQDS.h (limited to 'include') diff --git a/include/configs/T2080QDS.h b/include/configs/T2080QDS.h deleted file mode 100644 index 9bd0fe2..0000000 --- a/include/configs/T2080QDS.h +++ /dev/null @@ -1,804 +0,0 @@ -/* - * Copyright 2011-2013 Freescale Semiconductor, Inc. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -/* - * T2080 QDS board configuration file - */ - -#ifndef __T2080QDS_H -#define __T2080QDS_H - -#define CONFIG_T2080QDS -#define CONFIG_ICS307_REFCLK_HZ 25000000 /* ICS307 ref clk freq */ -#define CONFIG_MMC -#define CONFIG_SPI_FLASH -#define CONFIG_USB_EHCI -#define CONFIG_FSL_SATA_V2 -#define CONFIG_SYS_SRIO /* Enable Serial RapidIO Support */ -#define CONFIG_SRIO1 /* SRIO port 1 */ -#define CONFIG_SRIO2 /* SRIO port 2 */ - -/* High Level Configuration Options */ -#define CONFIG_PHYS_64BIT -#define CONFIG_BOOKE -#define CONFIG_E500 /* BOOKE e500 family */ -#define CONFIG_E500MC /* BOOKE e500mc family */ -#define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */ -#define CONFIG_MP /* support multiple processors */ -#define CONFIG_ENABLE_36BIT_PHYS - -#ifdef CONFIG_PHYS_64BIT -#define CONFIG_ADDR_MAP 1 -#define CONFIG_SYS_NUM_ADDR_MAP 64 /* number of TLB1 entries */ -#endif - -#define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ -#define CONFIG_SYS_NUM_CPC CONFIG_NUM_DDR_CONTROLLERS -#define CONFIG_FSL_IFC /* Enable IFC Support */ -#define CONFIG_FSL_LAW /* Use common FSL init code */ -#define CONFIG_ENV_OVERWRITE - -#ifdef CONFIG_RAMBOOT_PBL -#define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE -#define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc -#define CONFIG_SYS_FSL_PBL_PBI $(SRCTREE)/board/freescale/t2080qds/t2080_pbi.cfg -#define CONFIG_SYS_FSL_PBL_RCW $(SRCTREE)/board/freescale/t2080qds/t2080_rcw.cfg -#endif - -#define CONFIG_SRIO_PCIE_BOOT_MASTER -#ifdef CONFIG_SRIO_PCIE_BOOT_SLAVE -/* Set 1M boot space */ -#define CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR (CONFIG_SYS_TEXT_BASE & 0xfff00000) -#define CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR_PHYS \ - (0x300000000ull | CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR) -#define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc -#define CONFIG_SYS_NO_FLASH -#endif - -#ifndef CONFIG_SYS_TEXT_BASE -#define CONFIG_SYS_TEXT_BASE 0xeff40000 -#endif - -#ifndef CONFIG_RESET_VECTOR_ADDRESS -#define CONFIG_RESET_VECTOR_ADDRESS 0xeffffffc -#endif - -/* - * These can be toggled for performance analysis, otherwise use default. - */ -#define CONFIG_SYS_CACHE_STASHING -#define CONFIG_BTB /* toggle branch predition */ -#define CONFIG_DDR_ECC -#ifdef CONFIG_DDR_ECC -#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER -#define CONFIG_MEM_INIT_VALUE 0xdeadbeef -#endif - -#ifdef CONFIG_SYS_NO_FLASH -#if !defined(CONFIG_SRIO_PCIE_BOOT_SLAVE) && !defined(CONFIG_RAMBOOT_PBL) -#define CONFIG_ENV_IS_NOWHERE -#endif -#else -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE -#endif - -#if defined(CONFIG_SPIFLASH) -#define CONFIG_SYS_EXTRA_ENV_RELOC -#define CONFIG_ENV_IS_IN_SPI_FLASH -#define CONFIG_ENV_SPI_BUS 0 -#define CONFIG_ENV_SPI_CS 0 -#define CONFIG_ENV_SPI_MAX_HZ 10000000 -#define CONFIG_ENV_SPI_MODE 0 -#define CONFIG_ENV_SIZE 0x2000 /* 8KB */ -#define CONFIG_ENV_OFFSET 0x100000 /* 1MB */ -#define CONFIG_ENV_SECT_SIZE 0x10000 -#elif defined(CONFIG_SDCARD) -#define CONFIG_SYS_EXTRA_ENV_RELOC -#define CONFIG_ENV_IS_IN_MMC -#define CONFIG_SYS_MMC_ENV_DEV 0 -#define CONFIG_ENV_SIZE 0x2000 -#define CONFIG_ENV_OFFSET (512 * 1658) -#elif defined(CONFIG_NAND) -#define CONFIG_SYS_EXTRA_ENV_RELOC -#define CONFIG_ENV_IS_IN_NAND -#define CONFIG_ENV_SIZE CONFIG_SYS_NAND_BLOCK_SIZE -#define CONFIG_ENV_OFFSET (7 * CONFIG_SYS_NAND_BLOCK_SIZE) -#elif defined(CONFIG_SRIO_PCIE_BOOT_SLAVE) -#define CONFIG_ENV_IS_IN_REMOTE -#define CONFIG_ENV_ADDR 0xffe20000 -#define CONFIG_ENV_SIZE 0x2000 -#elif defined(CONFIG_ENV_IS_NOWHERE) -#define CONFIG_ENV_SIZE 0x2000 -#else -#define CONFIG_ENV_IS_IN_FLASH -#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE) -#define CONFIG_ENV_SIZE 0x2000 -#define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K (one sector) */ -#endif - -#ifndef __ASSEMBLY__ -unsigned long get_board_sys_clk(void); -unsigned long get_board_ddr_clk(void); -#endif - -#define CONFIG_SYS_CLK_FREQ get_board_sys_clk() -#define CONFIG_DDR_CLK_FREQ get_board_ddr_clk() - -/* - * Config the L3 Cache as L3 SRAM - */ -#define CONFIG_SYS_INIT_L3_ADDR CONFIG_RAMBOOT_TEXT_BASE - -#define CONFIG_SYS_DCSRBAR 0xf0000000 -#define CONFIG_SYS_DCSRBAR_PHYS 0xf00000000ull - -/* EEPROM */ -#define CONFIG_ID_EEPROM -#define CONFIG_SYS_I2C_EEPROM_NXID -#define CONFIG_SYS_EEPROM_BUS_NUM 0 -#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57 -#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 - -/* - * DDR Setup - */ -#define CONFIG_VERY_BIG_RAM -#define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 -#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE -#define CONFIG_DIMM_SLOTS_PER_CTLR 1 -#define CONFIG_CHIP_SELECTS_PER_CTRL (4 * CONFIG_DIMM_SLOTS_PER_CTLR) -#define CONFIG_DDR_SPD -#define CONFIG_SYS_FSL_DDR3 -#undef CONFIG_FSL_DDR_INTERACTIVE -#define CONFIG_SYS_SPD_BUS_NUM 0 -#define CONFIG_SYS_SDRAM_SIZE 2048 /* for fixed parameter use */ -#define SPD_EEPROM_ADDRESS1 0x51 -#define SPD_EEPROM_ADDRESS2 0x52 -#define SPD_EEPROM_ADDRESS SPD_EEPROM_ADDRESS1 -#define CTRL_INTLV_PREFERED cacheline - -/* - * IFC Definitions - */ -#define CONFIG_SYS_FLASH_BASE 0xe0000000 -#define CONFIG_SYS_FLASH_BASE_PHYS (0xf00000000ull | CONFIG_SYS_FLASH_BASE) -#define CONFIG_SYS_NOR0_CSPR_EXT (0xf) -#define CONFIG_SYS_NOR0_CSPR (CSPR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS \ - + 0x8000000) | \ - CSPR_PORT_SIZE_16 | \ - CSPR_MSEL_NOR | \ - CSPR_V) -#define CONFIG_SYS_NOR1_CSPR_EXT (0xf) -#define CONFIG_SYS_NOR1_CSPR (CSPR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS) | \ - CSPR_PORT_SIZE_16 | \ - CSPR_MSEL_NOR | \ - CSPR_V) -#define CONFIG_SYS_NOR_AMASK IFC_AMASK(128*1024*1024) -/* NOR Flash Timing Params */ -#define CONFIG_SYS_NOR_CSOR CSOR_NAND_TRHZ_80 - -#define CONFIG_SYS_NOR_FTIM0 (FTIM0_NOR_TACSE(0x4) | \ - FTIM0_NOR_TEADC(0x5) | \ - FTIM0_NOR_TEAHC(0x5)) -#define CONFIG_SYS_NOR_FTIM1 (FTIM1_NOR_TACO(0x35) | \ - FTIM1_NOR_TRAD_NOR(0x1A) |\ - FTIM1_NOR_TSEQRAD_NOR(0x13)) -#define CONFIG_SYS_NOR_FTIM2 (FTIM2_NOR_TCS(0x4) | \ - FTIM2_NOR_TCH(0x4) | \ - FTIM2_NOR_TWPH(0x0E) | \ - FTIM2_NOR_TWP(0x1c)) -#define CONFIG_SYS_NOR_FTIM3 0x0 - -#define CONFIG_SYS_FLASH_QUIET_TEST -#define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */ - -#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* number of banks */ -#define CONFIG_SYS_MAX_FLASH_SECT 1024 /* sectors per device */ -#define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ -#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ - -#define CONFIG_SYS_FLASH_EMPTY_INFO -#define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE_PHYS \ - + 0x8000000, CONFIG_SYS_FLASH_BASE_PHYS} - -#define CONFIG_FSL_QIXIS /* use common QIXIS code */ -#define QIXIS_BASE 0xffdf0000 -#define QIXIS_LBMAP_SWITCH 6 -#define QIXIS_LBMAP_MASK 0x0f -#define QIXIS_LBMAP_SHIFT 0 -#define QIXIS_LBMAP_DFLTBANK 0x00 -#define QIXIS_LBMAP_ALTBANK 0x04 -#define QIXIS_RST_CTL_RESET 0x83 -#define QIXIS_RST_FORCE_MEM 0x1 -#define QIXIS_RCFG_CTL_RECONFIG_IDLE 0x20 -#define QIXIS_RCFG_CTL_RECONFIG_START 0x21 -#define QIXIS_RCFG_CTL_WATCHDOG_ENBLE 0x08 -#define QIXIS_BASE_PHYS (0xf00000000ull | QIXIS_BASE) - -#define CONFIG_SYS_CSPR3_EXT (0xf) -#define CONFIG_SYS_CSPR3 (CSPR_PHYS_ADDR(QIXIS_BASE_PHYS) \ - | CSPR_PORT_SIZE_8 \ - | CSPR_MSEL_GPCM \ - | CSPR_V) -#define CONFIG_SYS_AMASK3 IFC_AMASK(4*1024) -#define CONFIG_SYS_CSOR3 0x0 -/* QIXIS Timing parameters for IFC CS3 */ -#define CONFIG_SYS_CS3_FTIM0 (FTIM0_GPCM_TACSE(0x0e) | \ - FTIM0_GPCM_TEADC(0x0e) | \ - FTIM0_GPCM_TEAHC(0x0e)) -#define CONFIG_SYS_CS3_FTIM1 (FTIM1_GPCM_TACO(0xff) | \ - FTIM1_GPCM_TRAD(0x3f)) -#define CONFIG_SYS_CS3_FTIM2 (FTIM2_GPCM_TCS(0x0e) | \ - FTIM2_GPCM_TCH(0x0) | \ - FTIM2_GPCM_TWP(0x1f)) -#define CONFIG_SYS_CS3_FTIM3 0x0 - -/* NAND Flash on IFC */ -#define CONFIG_NAND_FSL_IFC -#define CONFIG_SYS_NAND_BASE 0xff800000 -#define CONFIG_SYS_NAND_BASE_PHYS (0xf00000000ull | CONFIG_SYS_NAND_BASE) - -#define CONFIG_SYS_NAND_CSPR_EXT (0xf) -#define CONFIG_SYS_NAND_CSPR (CSPR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS) \ - | CSPR_PORT_SIZE_8 /* Port Size = 8 bit */ \ - | CSPR_MSEL_NAND /* MSEL = NAND */ \ - | CSPR_V) -#define CONFIG_SYS_NAND_AMASK IFC_AMASK(64*1024) - -#define CONFIG_SYS_NAND_CSOR (CSOR_NAND_ECC_ENC_EN /* ECC on encode */ \ - | CSOR_NAND_ECC_DEC_EN /* ECC on decode */ \ - | CSOR_NAND_ECC_MODE_4 /* 4-bit ECC */ \ - | CSOR_NAND_RAL_3 /* RAL = 2Byes */ \ - | CSOR_NAND_PGS_2K /* Page Size = 2K */\ - | CSOR_NAND_SPRZ_64 /* Spare size = 64 */\ - | CSOR_NAND_PB(64)) /*Pages Per Block = 64*/ - -#define CONFIG_SYS_NAND_ONFI_DETECTION - -/* ONFI NAND Flash mode0 Timing Params */ -#define CONFIG_SYS_NAND_FTIM0 (FTIM0_NAND_TCCST(0x07) | \ - FTIM0_NAND_TWP(0x18) | \ - FTIM0_NAND_TWCHT(0x07) | \ - FTIM0_NAND_TWH(0x0a)) -#define CONFIG_SYS_NAND_FTIM1 (FTIM1_NAND_TADLE(0x32) | \ - FTIM1_NAND_TWBE(0x39) | \ - FTIM1_NAND_TRR(0x0e) | \ - FTIM1_NAND_TRP(0x18)) -#define CONFIG_SYS_NAND_FTIM2 (FTIM2_NAND_TRAD(0x0f) | \ - FTIM2_NAND_TREH(0x0a) | \ - FTIM2_NAND_TWHRE(0x1e)) -#define CONFIG_SYS_NAND_FTIM3 0x0 - -#define CONFIG_SYS_NAND_DDR_LAW 11 -#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE } -#define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define CONFIG_MTD_NAND_VERIFY_WRITE -#define CONFIG_CMD_NAND -#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024) - -#if defined(CONFIG_NAND) -#define CONFIG_SYS_CSPR0_EXT CONFIG_SYS_NAND_CSPR_EXT -#define CONFIG_SYS_CSPR0 CONFIG_SYS_NAND_CSPR -#define CONFIG_SYS_AMASK0 CONFIG_SYS_NAND_AMASK -#define CONFIG_SYS_CSOR0 CONFIG_SYS_NAND_CSOR -#define CONFIG_SYS_CS0_FTIM0 CONFIG_SYS_NAND_FTIM0 -#define CONFIG_SYS_CS0_FTIM1 CONFIG_SYS_NAND_FTIM1 -#define CONFIG_SYS_CS0_FTIM2 CONFIG_SYS_NAND_FTIM2 -#define CONFIG_SYS_CS0_FTIM3 CONFIG_SYS_NAND_FTIM3 -#define CONFIG_SYS_CSPR2_EXT CONFIG_SYS_NOR0_CSPR_EXT -#define CONFIG_SYS_CSPR2 CONFIG_SYS_NOR0_CSPR -#define CONFIG_SYS_AMASK2 CONFIG_SYS_NOR_AMASK -#define CONFIG_SYS_CSOR2 CONFIG_SYS_NOR_CSOR -#define CONFIG_SYS_CS2_FTIM0 CONFIG_SYS_NOR_FTIM0 -#define CONFIG_SYS_CS2_FTIM1 CONFIG_SYS_NOR_FTIM1 -#define CONFIG_SYS_CS2_FTIM2 CONFIG_SYS_NOR_FTIM2 -#define CONFIG_SYS_CS2_FTIM3 CONFIG_SYS_NOR_FTIM3 -#else -#define CONFIG_SYS_CSPR0_EXT CONFIG_SYS_NOR0_CSPR_EXT -#define CONFIG_SYS_CSPR0 CONFIG_SYS_NOR0_CSPR -#define CONFIG_SYS_AMASK0 CONFIG_SYS_NOR_AMASK -#define CONFIG_SYS_CSOR0 CONFIG_SYS_NOR_CSOR -#define CONFIG_SYS_CS0_FTIM0 CONFIG_SYS_NOR_FTIM0 -#define CONFIG_SYS_CS0_FTIM1 CONFIG_SYS_NOR_FTIM1 -#define CONFIG_SYS_CS0_FTIM2 CONFIG_SYS_NOR_FTIM2 -#define CONFIG_SYS_CS0_FTIM3 CONFIG_SYS_NOR_FTIM3 -#define CONFIG_SYS_CSPR2_EXT CONFIG_SYS_NAND_CSPR_EXT -#define CONFIG_SYS_CSPR2 CONFIG_SYS_NAND_CSPR -#define CONFIG_SYS_AMASK2 CONFIG_SYS_NAND_AMASK -#define CONFIG_SYS_CSOR2 CONFIG_SYS_NAND_CSOR -#define CONFIG_SYS_CS2_FTIM0 CONFIG_SYS_NAND_FTIM0 -#define CONFIG_SYS_CS2_FTIM1 CONFIG_SYS_NAND_FTIM1 -#define CONFIG_SYS_CS2_FTIM2 CONFIG_SYS_NAND_FTIM2 -#define CONFIG_SYS_CS2_FTIM3 CONFIG_SYS_NAND_FTIM3 -#endif -#define CONFIG_SYS_CSPR1_EXT CONFIG_SYS_NOR1_CSPR_EXT -#define CONFIG_SYS_CSPR1 CONFIG_SYS_NOR1_CSPR -#define CONFIG_SYS_AMASK1 CONFIG_SYS_NOR_AMASK -#define CONFIG_SYS_CSOR1 CONFIG_SYS_NOR_CSOR -#define CONFIG_SYS_CS1_FTIM0 CONFIG_SYS_NOR_FTIM0 -#define CONFIG_SYS_CS1_FTIM1 CONFIG_SYS_NOR_FTIM1 -#define CONFIG_SYS_CS1_FTIM2 CONFIG_SYS_NOR_FTIM2 -#define CONFIG_SYS_CS1_FTIM3 CONFIG_SYS_NOR_FTIM3 - -#if defined(CONFIG_RAMBOOT_PBL) -#define CONFIG_SYS_RAMBOOT -#endif - -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE -#define CONFIG_BOARD_EARLY_INIT_R /* call board_early_init_r function */ -#define CONFIG_MISC_INIT_R -#define CONFIG_HWCONFIG - -/* define to use L1 as initial stack */ -#define CONFIG_L1_INIT_RAM -#define CONFIG_SYS_INIT_RAM_LOCK -#define CONFIG_SYS_INIT_RAM_ADDR 0xfdd00000 /* Initial L1 address */ -#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0xf -#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW 0xfe0ec000 -/* The assembler doesn't like typecast */ -#define CONFIG_SYS_INIT_RAM_ADDR_PHYS \ - ((CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH * 1ull << 32) | \ - CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW) -#define CONFIG_SYS_INIT_RAM_SIZE 0x00004000 -#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \ - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -#define CONFIG_SYS_MONITOR_LEN (512 * 1024) -#define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024) - -/* - * Serial Port - */ -#define CONFIG_CONS_INDEX 1 -#define CONFIG_SYS_NS16550 -#define CONFIG_SYS_NS16550_SERIAL -#define CONFIG_SYS_NS16550_REG_SIZE 1 -#define CONFIG_SYS_NS16550_CLK (get_bus_freq(0)/2) -#define CONFIG_SYS_BAUDRATE_TABLE \ - {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200} -#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x11C500) -#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x11C600) -#define CONFIG_SYS_NS16550_COM3 (CONFIG_SYS_CCSRBAR+0x11D500) -#define CONFIG_SYS_NS16550_COM4 (CONFIG_SYS_CCSRBAR+0x11D600) - -/* Use the HUSH parser */ -#define CONFIG_SYS_HUSH_PARSER -#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " - -/* pass open firmware flat tree */ -#define CONFIG_OF_LIBFDT -#define CONFIG_OF_BOARD_SETUP -#define CONFIG_OF_STDOUT_VIA_ALIAS - -/* new uImage format support */ -#define CONFIG_FIT -#define CONFIG_FIT_VERBOSE /* enable fit_format_{error,warning}() */ - -/* - * I2C - */ -#define CONFIG_SYS_I2C -#define CONFIG_SYS_I2C_FSL -#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F -#define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F -#define CONFIG_SYS_FSL_I2C3_SLAVE 0x7F -#define CONFIG_SYS_FSL_I2C4_SLAVE 0x7F -#define CONFIG_SYS_FSL_I2C_OFFSET 0x118000 -#define CONFIG_SYS_FSL_I2C2_OFFSET 0x118100 -#define CONFIG_SYS_FSL_I2C3_OFFSET 0x119000 -#define CONFIG_SYS_FSL_I2C4_OFFSET 0x119100 -#define CONFIG_SYS_FSL_I2C_SPEED 100000 -#define CONFIG_SYS_FSL_I2C2_SPEED 100000 -#define CONFIG_SYS_FSL_I2C3_SPEED 100000 -#define CONFIG_SYS_FSL_I2C4_SPEED 100000 -#define I2C_MUX_PCA_ADDR_PRI 0x77 /* I2C bus multiplexer,primary */ -#define I2C_MUX_PCA_ADDR_SEC1 0x75 /* I2C bus multiplexer,secondary 1 */ -#define I2C_MUX_PCA_ADDR_SEC2 0x76 /* I2C bus multiplexer,secondary 2 */ -#define I2C_MUX_CH_DEFAULT 0x8 - - -/* - * RapidIO - */ -#define CONFIG_SYS_SRIO1_MEM_VIRT 0xa0000000 -#define CONFIG_SYS_SRIO1_MEM_PHYS 0xc20000000ull -#define CONFIG_SYS_SRIO1_MEM_SIZE 0x10000000 /* 256M */ -#define CONFIG_SYS_SRIO2_MEM_VIRT 0xb0000000 -#define CONFIG_SYS_SRIO2_MEM_PHYS 0xc30000000ull -#define CONFIG_SYS_SRIO2_MEM_SIZE 0x10000000 /* 256M */ -/* - * for slave u-boot IMAGE instored in master memory space, - * PHYS must be aligned based on the SIZE - */ -#define CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_PHYS 0xfef080000ull -#define CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS1 0xfff80000ull -#define CONFIG_SRIO_PCIE_BOOT_IMAGE_SIZE 0x80000 /* 512K */ -#define CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS2 0x3fff80000ull -/* - * for slave UCODE and ENV instored in master memory space, - * PHYS must be aligned based on the SIZE - */ -#define CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_PHYS 0xfef040000ull -#define CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_BUS 0x3ffe00000ull -#define CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_SIZE 0x40000 /* 256K */ - -/* slave core release by master*/ -#define CONFIG_SRIO_PCIE_BOOT_BRR_OFFSET 0xe00e4 -#define CONFIG_SRIO_PCIE_BOOT_RELEASE_MASK 0x00000001 /* release core 0 */ - -/* - * SRIO_PCIE_BOOT - SLAVE - */ -#ifdef CONFIG_SRIO_PCIE_BOOT_SLAVE -#define CONFIG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR 0xFFE00000 -#define CONFIG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR_PHYS \ - (0x300000000ull | CONFIG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR) -#endif - -/* - * eSPI - Enhanced SPI - */ -#ifdef CONFIG_SPI_FLASH -#define CONFIG_FSL_ESPI -#define CONFIG_SPI_FLASH_SST -#define CONFIG_SPI_FLASH_STMICRO -#define CONFIG_SPI_FLASH_SPANSION -#define CONFIG_CMD_SF -#define CONFIG_SF_DEFAULT_SPEED 10000000 -#define CONFIG_SF_DEFAULT_MODE 0 -#endif - -/* - * General PCI - * Memory space is mapped 1-1, but I/O space must start from 0. - */ -#define CONFIG_PCI /* Enable PCI/PCIE */ -#define CONFIG_PCIE1 /* PCIE controler 1 */ -#define CONFIG_PCIE2 /* PCIE controler 2 */ -#define CONFIG_PCIE3 /* PCIE controler 3 */ -#define CONFIG_PCIE4 /* PCIE controler 4 */ -#define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ -#define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ -/* controller 1, direct to uli, tgtid 3, Base address 20000 */ -#define CONFIG_SYS_PCIE1_MEM_VIRT 0x80000000 -#define CONFIG_SYS_PCIE1_MEM_BUS 0xe0000000 -#define CONFIG_SYS_PCIE1_MEM_PHYS 0xc00000000ull -#define CONFIG_SYS_PCIE1_MEM_SIZE 0x20000000 /* 512M */ -#define CONFIG_SYS_PCIE1_IO_VIRT 0xf8000000 -#define CONFIG_SYS_PCIE1_IO_BUS 0x00000000 -#define CONFIG_SYS_PCIE1_IO_PHYS 0xff8000000ull -#define CONFIG_SYS_PCIE1_IO_SIZE 0x00010000 /* 64k */ - -/* controller 2, Slot 2, tgtid 2, Base address 201000 */ -#define CONFIG_SYS_PCIE2_MEM_VIRT 0xa0000000 -#define CONFIG_SYS_PCIE2_MEM_BUS 0xe0000000 -#define CONFIG_SYS_PCIE2_MEM_PHYS 0xc20000000ull -#define CONFIG_SYS_PCIE2_MEM_SIZE 0x10000000 /* 256M */ -#define CONFIG_SYS_PCIE2_IO_VIRT 0xf8010000 -#define CONFIG_SYS_PCIE2_IO_BUS 0x00000000 -#define CONFIG_SYS_PCIE2_IO_PHYS 0xff8010000ull -#define CONFIG_SYS_PCIE2_IO_SIZE 0x00010000 /* 64k */ - -/* controller 3, Slot 1, tgtid 1, Base address 202000 */ -#define CONFIG_SYS_PCIE3_MEM_VIRT 0xb0000000 -#define CONFIG_SYS_PCIE3_MEM_BUS 0xe0000000 -#define CONFIG_SYS_PCIE3_MEM_PHYS 0xc30000000ull -#define CONFIG_SYS_PCIE3_MEM_SIZE 0x10000000 /* 256M */ -#define CONFIG_SYS_PCIE3_IO_VIRT 0xf8020000 -#define CONFIG_SYS_PCIE3_IO_BUS 0x00000000 -#define CONFIG_SYS_PCIE3_IO_PHYS 0xff8020000ull -#define CONFIG_SYS_PCIE3_IO_SIZE 0x00010000 /* 64k */ - -/* controller 4, Base address 203000 */ -#define CONFIG_SYS_PCIE4_MEM_VIRT 0xc0000000 -#define CONFIG_SYS_PCIE4_MEM_BUS 0xe0000000 -#define CONFIG_SYS_PCIE4_MEM_PHYS 0xc40000000ull -#define CONFIG_SYS_PCIE4_MEM_SIZE 0x10000000 /* 256M */ -#define CONFIG_SYS_PCIE4_IO_BUS 0x00000000 -#define CONFIG_SYS_PCIE4_IO_PHYS 0xff8030000ull -#define CONFIG_SYS_PCIE4_IO_SIZE 0x00010000 /* 64k */ - -#ifdef CONFIG_PCI -#define CONFIG_PCI_INDIRECT_BRIDGE -#define CONFIG_FSL_PCIE_RESET /* need PCIe reset errata LSZ ADD */ -#define CONFIG_NET_MULTI -#define CONFIG_E1000 -#define CONFIG_PCI_PNP /* do pci plug-and-play */ -#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ -#define CONFIG_DOS_PARTITION -#endif - -/* Qman/Bman */ -#ifndef CONFIG_NOBQFMAN -#define CONFIG_SYS_DPAA_QBMAN /* Support Q/Bman */ -#define CONFIG_SYS_BMAN_NUM_PORTALS 18 -#define CONFIG_SYS_BMAN_MEM_BASE 0xf4000000 -#define CONFIG_SYS_BMAN_MEM_PHYS 0xff4000000ull -#define CONFIG_SYS_BMAN_MEM_SIZE 0x02000000 -#define CONFIG_SYS_QMAN_NUM_PORTALS 18 -#define CONFIG_SYS_QMAN_MEM_BASE 0xf6000000 -#define CONFIG_SYS_QMAN_MEM_PHYS 0xff6000000ull -#define CONFIG_SYS_QMAN_MEM_SIZE 0x02000000 - -#define CONFIG_SYS_DPAA_FMAN -#define CONFIG_SYS_DPAA_PME -#define CONFIG_SYS_PMAN -#define CONFIG_SYS_DPAA_DCE -#define CONFIG_SYS_DPAA_RMAN /* RMan */ -#define CONFIG_SYS_INTERLAKEN - -/* Default address of microcode for the Linux Fman driver */ -#if defined(CONFIG_SPIFLASH) -/* - * env is stored at 0x100000, sector size is 0x10000, ucode is stored after - * env, so we got 0x110000. - */ -#define CONFIG_SYS_QE_FW_IN_SPIFLASH -#define CONFIG_SYS_QE_FMAN_FW_ADDR 0x110000 -#elif defined(CONFIG_SDCARD) -/* - * PBL SD boot image should stored at 0x1000(8 blocks), the size of the image is - * about 825KB (1650 blocks), Env is stored after the image, and the env size is - * 0x2000 (16 blocks), 8 + 1650 + 16 = 1674, enlarge it to 1680. - */ -#define CONFIG_SYS_QE_FMAN_FW_IN_MMC -#define CONFIG_SYS_QE_FMAN_FW_ADDR (512 * 1680) -#elif defined(CONFIG_NAND) -#define CONFIG_SYS_QE_FMAN_FW_IN_NAND -#define CONFIG_SYS_QE_FMAN_FW_ADDR (8 * CONFIG_SYS_NAND_BLOCK_SIZE) -#elif defined(CONFIG_SRIO_PCIE_BOOT_SLAVE) -/* - * Slave has no ucode locally, it can fetch this from remote. When implementing - * in two corenet boards, slave's ucode could be stored in master's memory - * space, the address can be mapped from slave TLB->slave LAW-> - * slave SRIO or PCIE outbound window->master inbound window-> - * master LAW->the ucode address in master's memory space. - */ -#define CONFIG_SYS_QE_FMAN_FW_IN_REMOTE -#define CONFIG_SYS_QE_FMAN_FW_ADDR 0xFFE00000 -#else -#define CONFIG_SYS_QE_FMAN_FW_IN_NOR -#define CONFIG_SYS_QE_FMAN_FW_ADDR 0xEFF00000 -#endif -#define CONFIG_SYS_QE_FMAN_FW_LENGTH 0x10000 -#define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH) -#endif /* CONFIG_NOBQFMAN */ - -#ifdef CONFIG_SYS_DPAA_FMAN -#define CONFIG_FMAN_ENET -#define CONFIG_PHYLIB_10G -#define CONFIG_PHY_VITESSE -#define CONFIG_PHY_REALTEK -#define CONFIG_PHY_TERANETICS -#define RGMII_PHY1_ADDR 0x1 -#define RGMII_PHY2_ADDR 0x2 -#define FM1_10GEC1_PHY_ADDR 0x3 -#define SGMII_CARD_PORT1_PHY_ADDR 0x1C -#define SGMII_CARD_PORT2_PHY_ADDR 0x1D -#define SGMII_CARD_PORT3_PHY_ADDR 0x1E -#define SGMII_CARD_PORT4_PHY_ADDR 0x1F -#endif - -#ifdef CONFIG_FMAN_ENET -#define CONFIG_MII /* MII PHY management */ -#define CONFIG_ETHPRIME "FM1@DTSEC3" -#define CONFIG_PHY_GIGE /* Include GbE speed/duplex detection */ -#endif - -/* - * SATA - */ -#ifdef CONFIG_FSL_SATA_V2 -#define CONFIG_LIBATA -#define CONFIG_FSL_SATA -#define CONFIG_SYS_SATA_MAX_DEVICE 2 -#define CONFIG_SATA1 -#define CONFIG_SYS_SATA1 CONFIG_SYS_MPC85xx_SATA1_ADDR -#define CONFIG_SYS_SATA1_FLAGS FLAGS_DMA -#define CONFIG_SATA2 -#define CONFIG_SYS_SATA2 CONFIG_SYS_MPC85xx_SATA2_ADDR -#define CONFIG_SYS_SATA2_FLAGS FLAGS_DMA -#define CONFIG_LBA48 -#define CONFIG_CMD_SATA -#define CONFIG_DOS_PARTITION -#define CONFIG_CMD_EXT2 -#endif - -/* - * USB - */ -#ifdef CONFIG_USB_EHCI -#define CONFIG_CMD_USB -#define CONFIG_USB_STORAGE -#define CONFIG_USB_EHCI_FSL -#define CONFIG_EHCI_HCD_INIT_AFTER_RESET -#define CONFIG_CMD_EXT2 -#define CONFIG_HAS_FSL_DR_USB -#endif - -/* - * SDHC - */ -#ifdef CONFIG_MMC -#define CONFIG_CMD_MMC -#define CONFIG_FSL_ESDHC -#define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR -#define CONFIG_SYS_FSL_ESDHC_BROKEN_TIMEOUT -#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 -#define CONFIG_GENERIC_MMC -#define CONFIG_CMD_EXT2 -#define CONFIG_CMD_FAT -#define CONFIG_DOS_PARTITION -#endif - -/* - * Environment - */ -#define CONFIG_LOADS_ECHO /* echo on for serial download */ -#define CONFIG_SYS_LOADS_BAUD_CHANGE /* allow baudrate change */ - -/* - * Command line configuration. - */ -#include - -#define CONFIG_CMD_DHCP -#define CONFIG_CMD_ELF -#define CONFIG_CMD_ERRATA -#define CONFIG_CMD_GREPENV -#define CONFIG_CMD_IRQ -#define CONFIG_CMD_I2C -#define CONFIG_CMD_MII -#define CONFIG_CMD_PING -#define CONFIG_CMD_SETEXPR -#define CONFIG_CMD_REGINFO -#define CONFIG_CMD_BDI - -#ifdef CONFIG_PCI -#define CONFIG_CMD_PCI -#define CONFIG_CMD_NET -#endif - -/* - * Miscellaneous configurable options - */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_CMDLINE_EDITING /* Command-line editing */ -#define CONFIG_AUTO_COMPLETE /* add autocompletion support */ -#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ -#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */ -#ifdef CONFIG_CMD_KGDB -#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ -#else -#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ -#endif -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) -#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE/* Boot Argument Buffer Size */ -#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1ms ticks*/ - -/* - * For booting Linux, the board info and command line data - * have to be in the first 64 MB of memory, since this is - * the maximum mapped by the Linux kernel during initialization. - */ -#define CONFIG_SYS_BOOTMAPSZ (64 << 20) /* Initial map for Linux*/ -#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ - -#ifdef CONFIG_CMD_KGDB -#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ -#endif - -/* - * Environment Configuration - */ -#define CONFIG_ROOTPATH "/opt/nfsroot" -#define CONFIG_BOOTFILE "uImage" -#define CONFIG_UBOOTPATH "u-boot.bin" /* U-Boot image on TFTP server */ - -/* default location for tftp and bootm */ -#define CONFIG_LOADADDR 1000000 -#define CONFIG_BAUDRATE 115200 -#define CONFIG_BOOTDELAY 10 /* -1 disables auto-boot */ -#define __USB_PHY_TYPE utmi - -#define CONFIG_EXTRA_ENV_SETTINGS \ - "hwconfig=fsl_ddr:" \ - "ctlr_intlv=" __stringify(CTRL_INTLV_PREFERED) "," \ - "bank_intlv=auto;" \ - "usb1:dr_mode=host,phy_type=" __stringify(__USB_PHY_TYPE) "\0"\ - "netdev=eth0\0" \ - "uboot=" __stringify(CONFIG_UBOOTPATH) "\0" \ - "ubootaddr=" __stringify(CONFIG_SYS_TEXT_BASE) "\0" \ - "tftpflash=tftpboot $loadaddr $uboot && " \ - "protect off $ubootaddr +$filesize && " \ - "erase $ubootaddr +$filesize && " \ - "cp.b $loadaddr $ubootaddr $filesize && " \ - "protect on $ubootaddr +$filesize && " \ - "cmp.b $loadaddr $ubootaddr $filesize\0" \ - "consoledev=ttyS0\0" \ - "ramdiskaddr=2000000\0" \ - "ramdiskfile=t2080qds/ramdisk.uboot\0" \ - "fdtaddr=c00000\0" \ - "fdtfile=t2080qds/t2080qds.dtb\0" \ - "bdev=sda3\0" \ - "c=ffe\0" - -/* - * For emulation this causes u-boot to jump to the start of the - * proof point app code automatically - */ -#define CONFIG_PROOF_POINTS \ - "setenv bootargs root=/dev/$bdev rw " \ - "console=$consoledev,$baudrate $othbootargs;" \ - "cpu 1 release 0x29000000 - - -;" \ - "cpu 2 release 0x29000000 - - -;" \ - "cpu 3 release 0x29000000 - - -;" \ - "cpu 4 release 0x29000000 - - -;" \ - "cpu 5 release 0x29000000 - - -;" \ - "cpu 6 release 0x29000000 - - -;" \ - "cpu 7 release 0x29000000 - - -;" \ - "go 0x29000000" - -#define CONFIG_HVBOOT \ - "setenv bootargs config-addr=0x60000000; " \ - "bootm 0x01000000 - 0x00f00000" - -#define CONFIG_ALU \ - "setenv bootargs root=/dev/$bdev rw " \ - "console=$consoledev,$baudrate $othbootargs;" \ - "cpu 1 release 0x01000000 - - -;" \ - "cpu 2 release 0x01000000 - - -;" \ - "cpu 3 release 0x01000000 - - -;" \ - "cpu 4 release 0x01000000 - - -;" \ - "cpu 5 release 0x01000000 - - -;" \ - "cpu 6 release 0x01000000 - - -;" \ - "cpu 7 release 0x01000000 - - -;" \ - "go 0x01000000" - -#define CONFIG_LINUX \ - "setenv bootargs root=/dev/ram rw " \ - "console=$consoledev,$baudrate $othbootargs;" \ - "setenv ramdiskaddr 0x02000000;" \ - "setenv fdtaddr 0x00c00000;" \ - "setenv loadaddr 0x1000000;" \ - "bootm $loadaddr $ramdiskaddr $fdtaddr" - -#define CONFIG_HDBOOT \ - "setenv bootargs root=/dev/$bdev rw " \ - "console=$consoledev,$baudrate $othbootargs;" \ - "tftp $loadaddr $bootfile;" \ - "tftp $fdtaddr $fdtfile;" \ - "bootm $loadaddr - $fdtaddr" - -#define CONFIG_NFSBOOTCOMMAND \ - "setenv bootargs root=/dev/nfs rw " \ - "nfsroot=$serverip:$rootpath " \ - "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \ - "console=$consoledev,$baudrate $othbootargs;" \ - "tftp $loadaddr $bootfile;" \ - "tftp $fdtaddr $fdtfile;" \ - "bootm $loadaddr - $fdtaddr" - -#define CONFIG_RAMBOOTCOMMAND \ - "setenv bootargs root=/dev/ram rw " \ - "console=$consoledev,$baudrate $othbootargs;" \ - "tftp $ramdiskaddr $ramdiskfile;" \ - "tftp $loadaddr $bootfile;" \ - "tftp $fdtaddr $fdtfile;" \ - "bootm $loadaddr $ramdiskaddr $fdtaddr" - -#define CONFIG_BOOTCOMMAND CONFIG_LINUX - -#ifdef CONFIG_SECURE_BOOT -#include -#undef CONFIG_CMD_USB -#endif - -#endif /* __T2080QDS_H */ diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h new file mode 100644 index 0000000..36afe9e --- /dev/null +++ b/include/configs/T208xQDS.h @@ -0,0 +1,817 @@ +/* + * Copyright 2011-2013 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +/* + * T2080/T2081 QDS board configuration file + */ + +#ifndef __T208xQDS_H +#define __T208xQDS_H + +#define CONFIG_ICS307_REFCLK_HZ 25000000 /* ICS307 ref clk freq */ +#define CONFIG_MMC +#define CONFIG_SPI_FLASH +#define CONFIG_USB_EHCI +#if defined(CONFIG_PPC_T2080) +#define CONFIG_T2080QDS +#define CONFIG_FSL_SATA_V2 +#define CONFIG_SYS_SRIO /* Enable Serial RapidIO Support */ +#define CONFIG_SRIO1 /* SRIO port 1 */ +#define CONFIG_SRIO2 /* SRIO port 2 */ +#elif defined(CONFIG_PPC_T2081) +#define CONFIG_T2081QDS +#endif + +/* High Level Configuration Options */ +#define CONFIG_PHYS_64BIT +#define CONFIG_BOOKE +#define CONFIG_E500 /* BOOKE e500 family */ +#define CONFIG_E500MC /* BOOKE e500mc family */ +#define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */ +#define CONFIG_MP /* support multiple processors */ +#define CONFIG_ENABLE_36BIT_PHYS + +#ifdef CONFIG_PHYS_64BIT +#define CONFIG_ADDR_MAP 1 +#define CONFIG_SYS_NUM_ADDR_MAP 64 /* number of TLB1 entries */ +#endif + +#define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ +#define CONFIG_SYS_NUM_CPC CONFIG_NUM_DDR_CONTROLLERS +#define CONFIG_FSL_IFC /* Enable IFC Support */ +#define CONFIG_FSL_LAW /* Use common FSL init code */ +#define CONFIG_ENV_OVERWRITE + +#ifdef CONFIG_RAMBOOT_PBL +#define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE +#define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc +#define CONFIG_SYS_FSL_PBL_PBI $(SRCTREE)/board/freescale/t208xqds/t208x_pbi.cfg +#if defined(CONFIG_PPC_T2080) +#define CONFIG_SYS_FSL_PBL_RCW $(SRCTREE)/board/freescale/t208xqds/t2080_rcw.cfg +#elif defined(CONFIG_PPC_T2081) +#define CONFIG_SYS_FSL_PBL_RCW $(SRCTREE)/board/freescale/t208xqds/t2081_rcw.cfg +#endif +#endif + +#define CONFIG_SRIO_PCIE_BOOT_MASTER +#ifdef CONFIG_SRIO_PCIE_BOOT_SLAVE +/* Set 1M boot space */ +#define CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR (CONFIG_SYS_TEXT_BASE & 0xfff00000) +#define CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR_PHYS \ + (0x300000000ull | CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR) +#define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc +#define CONFIG_SYS_NO_FLASH +#endif + +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0xeff40000 +#endif + +#ifndef CONFIG_RESET_VECTOR_ADDRESS +#define CONFIG_RESET_VECTOR_ADDRESS 0xeffffffc +#endif + +/* + * These can be toggled for performance analysis, otherwise use default. + */ +#define CONFIG_SYS_CACHE_STASHING +#define CONFIG_BTB /* toggle branch predition */ +#define CONFIG_DDR_ECC +#ifdef CONFIG_DDR_ECC +#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER +#define CONFIG_MEM_INIT_VALUE 0xdeadbeef +#endif + +#ifdef CONFIG_SYS_NO_FLASH +#if !defined(CONFIG_SRIO_PCIE_BOOT_SLAVE) && !defined(CONFIG_RAMBOOT_PBL) +#define CONFIG_ENV_IS_NOWHERE +#endif +#else +#define CONFIG_FLASH_CFI_DRIVER +#define CONFIG_SYS_FLASH_CFI +#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE +#endif + +#if defined(CONFIG_SPIFLASH) +#define CONFIG_SYS_EXTRA_ENV_RELOC +#define CONFIG_ENV_IS_IN_SPI_FLASH +#define CONFIG_ENV_SPI_BUS 0 +#define CONFIG_ENV_SPI_CS 0 +#define CONFIG_ENV_SPI_MAX_HZ 10000000 +#define CONFIG_ENV_SPI_MODE 0 +#define CONFIG_ENV_SIZE 0x2000 /* 8KB */ +#define CONFIG_ENV_OFFSET 0x100000 /* 1MB */ +#define CONFIG_ENV_SECT_SIZE 0x10000 +#elif defined(CONFIG_SDCARD) +#define CONFIG_SYS_EXTRA_ENV_RELOC +#define CONFIG_ENV_IS_IN_MMC +#define CONFIG_SYS_MMC_ENV_DEV 0 +#define CONFIG_ENV_SIZE 0x2000 +#define CONFIG_ENV_OFFSET (512 * 1658) +#elif defined(CONFIG_NAND) +#define CONFIG_SYS_EXTRA_ENV_RELOC +#define CONFIG_ENV_IS_IN_NAND +#define CONFIG_ENV_SIZE CONFIG_SYS_NAND_BLOCK_SIZE +#define CONFIG_ENV_OFFSET (7 * CONFIG_SYS_NAND_BLOCK_SIZE) +#elif defined(CONFIG_SRIO_PCIE_BOOT_SLAVE) +#define CONFIG_ENV_IS_IN_REMOTE +#define CONFIG_ENV_ADDR 0xffe20000 +#define CONFIG_ENV_SIZE 0x2000 +#elif defined(CONFIG_ENV_IS_NOWHERE) +#define CONFIG_ENV_SIZE 0x2000 +#else +#define CONFIG_ENV_IS_IN_FLASH +#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE) +#define CONFIG_ENV_SIZE 0x2000 +#define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K (one sector) */ +#endif + +#ifndef __ASSEMBLY__ +unsigned long get_board_sys_clk(void); +unsigned long get_board_ddr_clk(void); +#endif + +#define CONFIG_SYS_CLK_FREQ get_board_sys_clk() +#define CONFIG_DDR_CLK_FREQ get_board_ddr_clk() + +/* + * Config the L3 Cache as L3 SRAM + */ +#define CONFIG_SYS_INIT_L3_ADDR CONFIG_RAMBOOT_TEXT_BASE + +#define CONFIG_SYS_DCSRBAR 0xf0000000 +#define CONFIG_SYS_DCSRBAR_PHYS 0xf00000000ull + +/* EEPROM */ +#define CONFIG_ID_EEPROM +#define CONFIG_SYS_I2C_EEPROM_NXID +#define CONFIG_SYS_EEPROM_BUS_NUM 0 +#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57 +#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 + +/* + * DDR Setup + */ +#define CONFIG_VERY_BIG_RAM +#define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 +#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE +#define CONFIG_DIMM_SLOTS_PER_CTLR 1 +#define CONFIG_CHIP_SELECTS_PER_CTRL (4 * CONFIG_DIMM_SLOTS_PER_CTLR) +#define CONFIG_DDR_SPD +#define CONFIG_SYS_FSL_DDR3 +#undef CONFIG_FSL_DDR_INTERACTIVE +#define CONFIG_SYS_SPD_BUS_NUM 0 +#define CONFIG_SYS_SDRAM_SIZE 2048 /* for fixed parameter use */ +#define SPD_EEPROM_ADDRESS1 0x51 +#define SPD_EEPROM_ADDRESS2 0x52 +#define SPD_EEPROM_ADDRESS SPD_EEPROM_ADDRESS1 +#define CTRL_INTLV_PREFERED cacheline + +/* + * IFC Definitions + */ +#define CONFIG_SYS_FLASH_BASE 0xe0000000 +#define CONFIG_SYS_FLASH_BASE_PHYS (0xf00000000ull | CONFIG_SYS_FLASH_BASE) +#define CONFIG_SYS_NOR0_CSPR_EXT (0xf) +#define CONFIG_SYS_NOR0_CSPR (CSPR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS \ + + 0x8000000) | \ + CSPR_PORT_SIZE_16 | \ + CSPR_MSEL_NOR | \ + CSPR_V) +#define CONFIG_SYS_NOR1_CSPR_EXT (0xf) +#define CONFIG_SYS_NOR1_CSPR (CSPR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS) | \ + CSPR_PORT_SIZE_16 | \ + CSPR_MSEL_NOR | \ + CSPR_V) +#define CONFIG_SYS_NOR_AMASK IFC_AMASK(128*1024*1024) +/* NOR Flash Timing Params */ +#define CONFIG_SYS_NOR_CSOR CSOR_NAND_TRHZ_80 + +#define CONFIG_SYS_NOR_FTIM0 (FTIM0_NOR_TACSE(0x4) | \ + FTIM0_NOR_TEADC(0x5) | \ + FTIM0_NOR_TEAHC(0x5)) +#define CONFIG_SYS_NOR_FTIM1 (FTIM1_NOR_TACO(0x35) | \ + FTIM1_NOR_TRAD_NOR(0x1A) |\ + FTIM1_NOR_TSEQRAD_NOR(0x13)) +#define CONFIG_SYS_NOR_FTIM2 (FTIM2_NOR_TCS(0x4) | \ + FTIM2_NOR_TCH(0x4) | \ + FTIM2_NOR_TWPH(0x0E) | \ + FTIM2_NOR_TWP(0x1c)) +#define CONFIG_SYS_NOR_FTIM3 0x0 + +#define CONFIG_SYS_FLASH_QUIET_TEST +#define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */ + +#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* number of banks */ +#define CONFIG_SYS_MAX_FLASH_SECT 1024 /* sectors per device */ +#define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ +#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ + +#define CONFIG_SYS_FLASH_EMPTY_INFO +#define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE_PHYS \ + + 0x8000000, CONFIG_SYS_FLASH_BASE_PHYS} + +#define CONFIG_FSL_QIXIS /* use common QIXIS code */ +#define QIXIS_BASE 0xffdf0000 +#define QIXIS_LBMAP_SWITCH 6 +#define QIXIS_LBMAP_MASK 0x0f +#define QIXIS_LBMAP_SHIFT 0 +#define QIXIS_LBMAP_DFLTBANK 0x00 +#define QIXIS_LBMAP_ALTBANK 0x04 +#define QIXIS_RST_CTL_RESET 0x83 +#define QIXIS_RST_FORCE_MEM 0x1 +#define QIXIS_RCFG_CTL_RECONFIG_IDLE 0x20 +#define QIXIS_RCFG_CTL_RECONFIG_START 0x21 +#define QIXIS_RCFG_CTL_WATCHDOG_ENBLE 0x08 +#define QIXIS_BASE_PHYS (0xf00000000ull | QIXIS_BASE) + +#define CONFIG_SYS_CSPR3_EXT (0xf) +#define CONFIG_SYS_CSPR3 (CSPR_PHYS_ADDR(QIXIS_BASE_PHYS) \ + | CSPR_PORT_SIZE_8 \ + | CSPR_MSEL_GPCM \ + | CSPR_V) +#define CONFIG_SYS_AMASK3 IFC_AMASK(4*1024) +#define CONFIG_SYS_CSOR3 0x0 +/* QIXIS Timing parameters for IFC CS3 */ +#define CONFIG_SYS_CS3_FTIM0 (FTIM0_GPCM_TACSE(0x0e) | \ + FTIM0_GPCM_TEADC(0x0e) | \ + FTIM0_GPCM_TEAHC(0x0e)) +#define CONFIG_SYS_CS3_FTIM1 (FTIM1_GPCM_TACO(0xff) | \ + FTIM1_GPCM_TRAD(0x3f)) +#define CONFIG_SYS_CS3_FTIM2 (FTIM2_GPCM_TCS(0x0e) | \ + FTIM2_GPCM_TCH(0x0) | \ + FTIM2_GPCM_TWP(0x1f)) +#define CONFIG_SYS_CS3_FTIM3 0x0 + +/* NAND Flash on IFC */ +#define CONFIG_NAND_FSL_IFC +#define CONFIG_SYS_NAND_BASE 0xff800000 +#define CONFIG_SYS_NAND_BASE_PHYS (0xf00000000ull | CONFIG_SYS_NAND_BASE) + +#define CONFIG_SYS_NAND_CSPR_EXT (0xf) +#define CONFIG_SYS_NAND_CSPR (CSPR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS) \ + | CSPR_PORT_SIZE_8 /* Port Size = 8 bit */ \ + | CSPR_MSEL_NAND /* MSEL = NAND */ \ + | CSPR_V) +#define CONFIG_SYS_NAND_AMASK IFC_AMASK(64*1024) + +#define CONFIG_SYS_NAND_CSOR (CSOR_NAND_ECC_ENC_EN /* ECC on encode */ \ + | CSOR_NAND_ECC_DEC_EN /* ECC on decode */ \ + | CSOR_NAND_ECC_MODE_4 /* 4-bit ECC */ \ + | CSOR_NAND_RAL_3 /* RAL = 2Byes */ \ + | CSOR_NAND_PGS_2K /* Page Size = 2K */\ + | CSOR_NAND_SPRZ_64 /* Spare size = 64 */\ + | CSOR_NAND_PB(64)) /*Pages Per Block = 64*/ + +#define CONFIG_SYS_NAND_ONFI_DETECTION + +/* ONFI NAND Flash mode0 Timing Params */ +#define CONFIG_SYS_NAND_FTIM0 (FTIM0_NAND_TCCST(0x07) | \ + FTIM0_NAND_TWP(0x18) | \ + FTIM0_NAND_TWCHT(0x07) | \ + FTIM0_NAND_TWH(0x0a)) +#define CONFIG_SYS_NAND_FTIM1 (FTIM1_NAND_TADLE(0x32) | \ + FTIM1_NAND_TWBE(0x39) | \ + FTIM1_NAND_TRR(0x0e) | \ + FTIM1_NAND_TRP(0x18)) +#define CONFIG_SYS_NAND_FTIM2 (FTIM2_NAND_TRAD(0x0f) | \ + FTIM2_NAND_TREH(0x0a) | \ + FTIM2_NAND_TWHRE(0x1e)) +#define CONFIG_SYS_NAND_FTIM3 0x0 + +#define CONFIG_SYS_NAND_DDR_LAW 11 +#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE } +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define CONFIG_MTD_NAND_VERIFY_WRITE +#define CONFIG_CMD_NAND +#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024) + +#if defined(CONFIG_NAND) +#define CONFIG_SYS_CSPR0_EXT CONFIG_SYS_NAND_CSPR_EXT +#define CONFIG_SYS_CSPR0 CONFIG_SYS_NAND_CSPR +#define CONFIG_SYS_AMASK0 CONFIG_SYS_NAND_AMASK +#define CONFIG_SYS_CSOR0 CONFIG_SYS_NAND_CSOR +#define CONFIG_SYS_CS0_FTIM0 CONFIG_SYS_NAND_FTIM0 +#define CONFIG_SYS_CS0_FTIM1 CONFIG_SYS_NAND_FTIM1 +#define CONFIG_SYS_CS0_FTIM2 CONFIG_SYS_NAND_FTIM2 +#define CONFIG_SYS_CS0_FTIM3 CONFIG_SYS_NAND_FTIM3 +#define CONFIG_SYS_CSPR2_EXT CONFIG_SYS_NOR0_CSPR_EXT +#define CONFIG_SYS_CSPR2 CONFIG_SYS_NOR0_CSPR +#define CONFIG_SYS_AMASK2 CONFIG_SYS_NOR_AMASK +#define CONFIG_SYS_CSOR2 CONFIG_SYS_NOR_CSOR +#define CONFIG_SYS_CS2_FTIM0 CONFIG_SYS_NOR_FTIM0 +#define CONFIG_SYS_CS2_FTIM1 CONFIG_SYS_NOR_FTIM1 +#define CONFIG_SYS_CS2_FTIM2 CONFIG_SYS_NOR_FTIM2 +#define CONFIG_SYS_CS2_FTIM3 CONFIG_SYS_NOR_FTIM3 +#else +#define CONFIG_SYS_CSPR0_EXT CONFIG_SYS_NOR0_CSPR_EXT +#define CONFIG_SYS_CSPR0 CONFIG_SYS_NOR0_CSPR +#define CONFIG_SYS_AMASK0 CONFIG_SYS_NOR_AMASK +#define CONFIG_SYS_CSOR0 CONFIG_SYS_NOR_CSOR +#define CONFIG_SYS_CS0_FTIM0 CONFIG_SYS_NOR_FTIM0 +#define CONFIG_SYS_CS0_FTIM1 CONFIG_SYS_NOR_FTIM1 +#define CONFIG_SYS_CS0_FTIM2 CONFIG_SYS_NOR_FTIM2 +#define CONFIG_SYS_CS0_FTIM3 CONFIG_SYS_NOR_FTIM3 +#define CONFIG_SYS_CSPR2_EXT CONFIG_SYS_NAND_CSPR_EXT +#define CONFIG_SYS_CSPR2 CONFIG_SYS_NAND_CSPR +#define CONFIG_SYS_AMASK2 CONFIG_SYS_NAND_AMASK +#define CONFIG_SYS_CSOR2 CONFIG_SYS_NAND_CSOR +#define CONFIG_SYS_CS2_FTIM0 CONFIG_SYS_NAND_FTIM0 +#define CONFIG_SYS_CS2_FTIM1 CONFIG_SYS_NAND_FTIM1 +#define CONFIG_SYS_CS2_FTIM2 CONFIG_SYS_NAND_FTIM2 +#define CONFIG_SYS_CS2_FTIM3 CONFIG_SYS_NAND_FTIM3 +#endif +#define CONFIG_SYS_CSPR1_EXT CONFIG_SYS_NOR1_CSPR_EXT +#define CONFIG_SYS_CSPR1 CONFIG_SYS_NOR1_CSPR +#define CONFIG_SYS_AMASK1 CONFIG_SYS_NOR_AMASK +#define CONFIG_SYS_CSOR1 CONFIG_SYS_NOR_CSOR +#define CONFIG_SYS_CS1_FTIM0 CONFIG_SYS_NOR_FTIM0 +#define CONFIG_SYS_CS1_FTIM1 CONFIG_SYS_NOR_FTIM1 +#define CONFIG_SYS_CS1_FTIM2 CONFIG_SYS_NOR_FTIM2 +#define CONFIG_SYS_CS1_FTIM3 CONFIG_SYS_NOR_FTIM3 + +#if defined(CONFIG_RAMBOOT_PBL) +#define CONFIG_SYS_RAMBOOT +#endif + +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE +#define CONFIG_BOARD_EARLY_INIT_R /* call board_early_init_r function */ +#define CONFIG_MISC_INIT_R +#define CONFIG_HWCONFIG + +/* define to use L1 as initial stack */ +#define CONFIG_L1_INIT_RAM +#define CONFIG_SYS_INIT_RAM_LOCK +#define CONFIG_SYS_INIT_RAM_ADDR 0xfdd00000 /* Initial L1 address */ +#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0xf +#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW 0xfe0ec000 +/* The assembler doesn't like typecast */ +#define CONFIG_SYS_INIT_RAM_ADDR_PHYS \ + ((CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH * 1ull << 32) | \ + CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW) +#define CONFIG_SYS_INIT_RAM_SIZE 0x00004000 +#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \ + GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET +#define CONFIG_SYS_MONITOR_LEN (512 * 1024) +#define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024) + +/* + * Serial Port + */ +#define CONFIG_CONS_INDEX 1 +#define CONFIG_SYS_NS16550 +#define CONFIG_SYS_NS16550_SERIAL +#define CONFIG_SYS_NS16550_REG_SIZE 1 +#define CONFIG_SYS_NS16550_CLK (get_bus_freq(0)/2) +#define CONFIG_SYS_BAUDRATE_TABLE \ + {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200} +#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x11C500) +#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x11C600) +#define CONFIG_SYS_NS16550_COM3 (CONFIG_SYS_CCSRBAR+0x11D500) +#define CONFIG_SYS_NS16550_COM4 (CONFIG_SYS_CCSRBAR+0x11D600) + +/* Use the HUSH parser */ +#define CONFIG_SYS_HUSH_PARSER +#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " + +/* pass open firmware flat tree */ +#define CONFIG_OF_LIBFDT +#define CONFIG_OF_BOARD_SETUP +#define CONFIG_OF_STDOUT_VIA_ALIAS + +/* new uImage format support */ +#define CONFIG_FIT +#define CONFIG_FIT_VERBOSE /* enable fit_format_{error,warning}() */ + +/* + * I2C + */ +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_FSL +#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C3_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C4_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C_OFFSET 0x118000 +#define CONFIG_SYS_FSL_I2C2_OFFSET 0x118100 +#define CONFIG_SYS_FSL_I2C3_OFFSET 0x119000 +#define CONFIG_SYS_FSL_I2C4_OFFSET 0x119100 +#define CONFIG_SYS_FSL_I2C_SPEED 100000 +#define CONFIG_SYS_FSL_I2C2_SPEED 100000 +#define CONFIG_SYS_FSL_I2C3_SPEED 100000 +#define CONFIG_SYS_FSL_I2C4_SPEED 100000 +#define I2C_MUX_PCA_ADDR_PRI 0x77 /* I2C bus multiplexer,primary */ +#define I2C_MUX_PCA_ADDR_SEC1 0x75 /* I2C bus multiplexer,secondary 1 */ +#define I2C_MUX_PCA_ADDR_SEC2 0x76 /* I2C bus multiplexer,secondary 2 */ +#define I2C_MUX_CH_DEFAULT 0x8 + + +/* + * RapidIO + */ +#define CONFIG_SYS_SRIO1_MEM_VIRT 0xa0000000 +#define CONFIG_SYS_SRIO1_MEM_PHYS 0xc20000000ull +#define CONFIG_SYS_SRIO1_MEM_SIZE 0x10000000 /* 256M */ +#define CONFIG_SYS_SRIO2_MEM_VIRT 0xb0000000 +#define CONFIG_SYS_SRIO2_MEM_PHYS 0xc30000000ull +#define CONFIG_SYS_SRIO2_MEM_SIZE 0x10000000 /* 256M */ +/* + * for slave u-boot IMAGE instored in master memory space, + * PHYS must be aligned based on the SIZE + */ +#define CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_PHYS 0xfef080000ull +#define CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS1 0xfff80000ull +#define CONFIG_SRIO_PCIE_BOOT_IMAGE_SIZE 0x80000 /* 512K */ +#define CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_BUS2 0x3fff80000ull +/* + * for slave UCODE and ENV instored in master memory space, + * PHYS must be aligned based on the SIZE + */ +#define CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_PHYS 0xfef040000ull +#define CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_BUS 0x3ffe00000ull +#define CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_SIZE 0x40000 /* 256K */ + +/* slave core release by master*/ +#define CONFIG_SRIO_PCIE_BOOT_BRR_OFFSET 0xe00e4 +#define CONFIG_SRIO_PCIE_BOOT_RELEASE_MASK 0x00000001 /* release core 0 */ + +/* + * SRIO_PCIE_BOOT - SLAVE + */ +#ifdef CONFIG_SRIO_PCIE_BOOT_SLAVE +#define CONFIG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR 0xFFE00000 +#define CONFIG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR_PHYS \ + (0x300000000ull | CONFIG_SYS_SRIO_PCIE_BOOT_UCODE_ENV_ADDR) +#endif + +/* + * eSPI - Enhanced SPI + */ +#ifdef CONFIG_SPI_FLASH +#define CONFIG_FSL_ESPI +#define CONFIG_SPI_FLASH_SST +#define CONFIG_SPI_FLASH_STMICRO +#if defined(CONFIG_T2080QDS) +#define CONFIG_SPI_FLASH_SPANSION +#elif defined(CONFIG_T2081QDS) +#define CONFIG_SPI_FLASH_EON +#endif + +#define CONFIG_CMD_SF +#define CONFIG_SF_DEFAULT_SPEED 10000000 +#define CONFIG_SF_DEFAULT_MODE 0 +#endif + +/* + * General PCI + * Memory space is mapped 1-1, but I/O space must start from 0. + */ +#define CONFIG_PCI /* Enable PCI/PCIE */ +#define CONFIG_PCIE1 /* PCIE controler 1 */ +#define CONFIG_PCIE2 /* PCIE controler 2 */ +#define CONFIG_PCIE3 /* PCIE controler 3 */ +#define CONFIG_PCIE4 /* PCIE controler 4 */ +#define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ +#define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ +/* controller 1, direct to uli, tgtid 3, Base address 20000 */ +#define CONFIG_SYS_PCIE1_MEM_VIRT 0x80000000 +#define CONFIG_SYS_PCIE1_MEM_BUS 0xe0000000 +#define CONFIG_SYS_PCIE1_MEM_PHYS 0xc00000000ull +#define CONFIG_SYS_PCIE1_MEM_SIZE 0x20000000 /* 512M */ +#define CONFIG_SYS_PCIE1_IO_VIRT 0xf8000000 +#define CONFIG_SYS_PCIE1_IO_BUS 0x00000000 +#define CONFIG_SYS_PCIE1_IO_PHYS 0xff8000000ull +#define CONFIG_SYS_PCIE1_IO_SIZE 0x00010000 /* 64k */ + +/* controller 2, Slot 2, tgtid 2, Base address 201000 */ +#define CONFIG_SYS_PCIE2_MEM_VIRT 0xa0000000 +#define CONFIG_SYS_PCIE2_MEM_BUS 0xe0000000 +#define CONFIG_SYS_PCIE2_MEM_PHYS 0xc20000000ull +#define CONFIG_SYS_PCIE2_MEM_SIZE 0x10000000 /* 256M */ +#define CONFIG_SYS_PCIE2_IO_VIRT 0xf8010000 +#define CONFIG_SYS_PCIE2_IO_BUS 0x00000000 +#define CONFIG_SYS_PCIE2_IO_PHYS 0xff8010000ull +#define CONFIG_SYS_PCIE2_IO_SIZE 0x00010000 /* 64k */ + +/* controller 3, Slot 1, tgtid 1, Base address 202000 */ +#define CONFIG_SYS_PCIE3_MEM_VIRT 0xb0000000 +#define CONFIG_SYS_PCIE3_MEM_BUS 0xe0000000 +#define CONFIG_SYS_PCIE3_MEM_PHYS 0xc30000000ull +#define CONFIG_SYS_PCIE3_MEM_SIZE 0x10000000 /* 256M */ +#define CONFIG_SYS_PCIE3_IO_VIRT 0xf8020000 +#define CONFIG_SYS_PCIE3_IO_BUS 0x00000000 +#define CONFIG_SYS_PCIE3_IO_PHYS 0xff8020000ull +#define CONFIG_SYS_PCIE3_IO_SIZE 0x00010000 /* 64k */ + +/* controller 4, Base address 203000 */ +#define CONFIG_SYS_PCIE4_MEM_VIRT 0xc0000000 +#define CONFIG_SYS_PCIE4_MEM_BUS 0xe0000000 +#define CONFIG_SYS_PCIE4_MEM_PHYS 0xc40000000ull +#define CONFIG_SYS_PCIE4_MEM_SIZE 0x10000000 /* 256M */ +#define CONFIG_SYS_PCIE4_IO_BUS 0x00000000 +#define CONFIG_SYS_PCIE4_IO_PHYS 0xff8030000ull +#define CONFIG_SYS_PCIE4_IO_SIZE 0x00010000 /* 64k */ + +#ifdef CONFIG_PCI +#define CONFIG_PCI_INDIRECT_BRIDGE +#define CONFIG_FSL_PCIE_RESET /* need PCIe reset errata */ +#define CONFIG_NET_MULTI +#define CONFIG_E1000 +#define CONFIG_PCI_PNP /* do pci plug-and-play */ +#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ +#define CONFIG_DOS_PARTITION +#endif + +/* Qman/Bman */ +#ifndef CONFIG_NOBQFMAN +#define CONFIG_SYS_DPAA_QBMAN /* Support Q/Bman */ +#define CONFIG_SYS_BMAN_NUM_PORTALS 18 +#define CONFIG_SYS_BMAN_MEM_BASE 0xf4000000 +#define CONFIG_SYS_BMAN_MEM_PHYS 0xff4000000ull +#define CONFIG_SYS_BMAN_MEM_SIZE 0x02000000 +#define CONFIG_SYS_QMAN_NUM_PORTALS 18 +#define CONFIG_SYS_QMAN_MEM_BASE 0xf6000000 +#define CONFIG_SYS_QMAN_MEM_PHYS 0xff6000000ull +#define CONFIG_SYS_QMAN_MEM_SIZE 0x02000000 + +#define CONFIG_SYS_DPAA_FMAN +#define CONFIG_SYS_DPAA_PME +#define CONFIG_SYS_PMAN +#define CONFIG_SYS_DPAA_DCE +#define CONFIG_SYS_DPAA_RMAN /* RMan */ +#define CONFIG_SYS_INTERLAKEN + +/* Default address of microcode for the Linux Fman driver */ +#if defined(CONFIG_SPIFLASH) +/* + * env is stored at 0x100000, sector size is 0x10000, ucode is stored after + * env, so we got 0x110000. + */ +#define CONFIG_SYS_QE_FW_IN_SPIFLASH +#define CONFIG_SYS_QE_FMAN_FW_ADDR 0x110000 +#elif defined(CONFIG_SDCARD) +/* + * PBL SD boot image should stored at 0x1000(8 blocks), the size of the image is + * about 825KB (1650 blocks), Env is stored after the image, and the env size is + * 0x2000 (16 blocks), 8 + 1650 + 16 = 1674, enlarge it to 1680. + */ +#define CONFIG_SYS_QE_FMAN_FW_IN_MMC +#define CONFIG_SYS_QE_FMAN_FW_ADDR (512 * 1680) +#elif defined(CONFIG_NAND) +#define CONFIG_SYS_QE_FMAN_FW_IN_NAND +#define CONFIG_SYS_QE_FMAN_FW_ADDR (8 * CONFIG_SYS_NAND_BLOCK_SIZE) +#elif defined(CONFIG_SRIO_PCIE_BOOT_SLAVE) +/* + * Slave has no ucode locally, it can fetch this from remote. When implementing + * in two corenet boards, slave's ucode could be stored in master's memory + * space, the address can be mapped from slave TLB->slave LAW-> + * slave SRIO or PCIE outbound window->master inbound window-> + * master LAW->the ucode address in master's memory space. + */ +#define CONFIG_SYS_QE_FMAN_FW_IN_REMOTE +#define CONFIG_SYS_QE_FMAN_FW_ADDR 0xFFE00000 +#else +#define CONFIG_SYS_QE_FMAN_FW_IN_NOR +#define CONFIG_SYS_QE_FMAN_FW_ADDR 0xEFF00000 +#endif +#define CONFIG_SYS_QE_FMAN_FW_LENGTH 0x10000 +#define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH) +#endif /* CONFIG_NOBQFMAN */ + +#ifdef CONFIG_SYS_DPAA_FMAN +#define CONFIG_FMAN_ENET +#define CONFIG_PHYLIB_10G +#define CONFIG_PHY_VITESSE +#define CONFIG_PHY_REALTEK +#define CONFIG_PHY_TERANETICS +#define RGMII_PHY1_ADDR 0x1 +#define RGMII_PHY2_ADDR 0x2 +#define FM1_10GEC1_PHY_ADDR 0x3 +#define SGMII_CARD_PORT1_PHY_ADDR 0x1C +#define SGMII_CARD_PORT2_PHY_ADDR 0x1D +#define SGMII_CARD_PORT3_PHY_ADDR 0x1E +#define SGMII_CARD_PORT4_PHY_ADDR 0x1F +#endif + +#ifdef CONFIG_FMAN_ENET +#define CONFIG_MII /* MII PHY management */ +#define CONFIG_ETHPRIME "FM1@DTSEC3" +#define CONFIG_PHY_GIGE /* Include GbE speed/duplex detection */ +#endif + +/* + * SATA + */ +#ifdef CONFIG_FSL_SATA_V2 +#define CONFIG_LIBATA +#define CONFIG_FSL_SATA +#define CONFIG_SYS_SATA_MAX_DEVICE 2 +#define CONFIG_SATA1 +#define CONFIG_SYS_SATA1 CONFIG_SYS_MPC85xx_SATA1_ADDR +#define CONFIG_SYS_SATA1_FLAGS FLAGS_DMA +#define CONFIG_SATA2 +#define CONFIG_SYS_SATA2 CONFIG_SYS_MPC85xx_SATA2_ADDR +#define CONFIG_SYS_SATA2_FLAGS FLAGS_DMA +#define CONFIG_LBA48 +#define CONFIG_CMD_SATA +#define CONFIG_DOS_PARTITION +#define CONFIG_CMD_EXT2 +#endif + +/* + * USB + */ +#ifdef CONFIG_USB_EHCI +#define CONFIG_CMD_USB +#define CONFIG_USB_STORAGE +#define CONFIG_USB_EHCI_FSL +#define CONFIG_EHCI_HCD_INIT_AFTER_RESET +#define CONFIG_CMD_EXT2 +#define CONFIG_HAS_FSL_DR_USB +#endif + +/* + * SDHC + */ +#ifdef CONFIG_MMC +#define CONFIG_CMD_MMC +#define CONFIG_FSL_ESDHC +#define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR +#define CONFIG_SYS_FSL_ESDHC_BROKEN_TIMEOUT +#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 +#define CONFIG_GENERIC_MMC +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_FAT +#define CONFIG_DOS_PARTITION +#endif + +/* + * Environment + */ +#define CONFIG_LOADS_ECHO /* echo on for serial download */ +#define CONFIG_SYS_LOADS_BAUD_CHANGE /* allow baudrate change */ + +/* + * Command line configuration. + */ +#include + +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_ELF +#define CONFIG_CMD_ERRATA +#define CONFIG_CMD_GREPENV +#define CONFIG_CMD_IRQ +#define CONFIG_CMD_I2C +#define CONFIG_CMD_MII +#define CONFIG_CMD_PING +#define CONFIG_CMD_SETEXPR +#define CONFIG_CMD_REGINFO +#define CONFIG_CMD_BDI + +#ifdef CONFIG_PCI +#define CONFIG_CMD_PCI +#define CONFIG_CMD_NET +#endif + +/* + * Miscellaneous configurable options + */ +#define CONFIG_SYS_LONGHELP /* undef to save memory */ +#define CONFIG_CMDLINE_EDITING /* Command-line editing */ +#define CONFIG_AUTO_COMPLETE /* add autocompletion support */ +#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ +#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */ +#ifdef CONFIG_CMD_KGDB +#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ +#else +#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ +#endif +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) +#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE/* Boot Argument Buffer Size */ +#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1ms ticks*/ + +/* + * For booting Linux, the board info and command line data + * have to be in the first 64 MB of memory, since this is + * the maximum mapped by the Linux kernel during initialization. + */ +#define CONFIG_SYS_BOOTMAPSZ (64 << 20) /* Initial map for Linux*/ +#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ + +#ifdef CONFIG_CMD_KGDB +#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ +#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ +#endif + +/* + * Environment Configuration + */ +#define CONFIG_ROOTPATH "/opt/nfsroot" +#define CONFIG_BOOTFILE "uImage" +#define CONFIG_UBOOTPATH "u-boot.bin" /* U-Boot image on TFTP server */ + +/* default location for tftp and bootm */ +#define CONFIG_LOADADDR 1000000 +#define CONFIG_BAUDRATE 115200 +#define CONFIG_BOOTDELAY 10 /* -1 disables auto-boot */ +#define __USB_PHY_TYPE utmi + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "hwconfig=fsl_ddr:" \ + "ctlr_intlv=" __stringify(CTRL_INTLV_PREFERED) "," \ + "bank_intlv=auto;" \ + "usb1:dr_mode=host,phy_type=" __stringify(__USB_PHY_TYPE) "\0"\ + "netdev=eth0\0" \ + "uboot=" __stringify(CONFIG_UBOOTPATH) "\0" \ + "ubootaddr=" __stringify(CONFIG_SYS_TEXT_BASE) "\0" \ + "tftpflash=tftpboot $loadaddr $uboot && " \ + "protect off $ubootaddr +$filesize && " \ + "erase $ubootaddr +$filesize && " \ + "cp.b $loadaddr $ubootaddr $filesize && " \ + "protect on $ubootaddr +$filesize && " \ + "cmp.b $loadaddr $ubootaddr $filesize\0" \ + "consoledev=ttyS0\0" \ + "ramdiskaddr=2000000\0" \ + "ramdiskfile=t2080qds/ramdisk.uboot\0" \ + "fdtaddr=c00000\0" \ + "fdtfile=t2080qds/t2080qds.dtb\0" \ + "bdev=sda3\0" \ + "c=ffe\0" + +/* + * For emulation this causes u-boot to jump to the start of the + * proof point app code automatically + */ +#define CONFIG_PROOF_POINTS \ + "setenv bootargs root=/dev/$bdev rw " \ + "console=$consoledev,$baudrate $othbootargs;" \ + "cpu 1 release 0x29000000 - - -;" \ + "cpu 2 release 0x29000000 - - -;" \ + "cpu 3 release 0x29000000 - - -;" \ + "cpu 4 release 0x29000000 - - -;" \ + "cpu 5 release 0x29000000 - - -;" \ + "cpu 6 release 0x29000000 - - -;" \ + "cpu 7 release 0x29000000 - - -;" \ + "go 0x29000000" + +#define CONFIG_HVBOOT \ + "setenv bootargs config-addr=0x60000000; " \ + "bootm 0x01000000 - 0x00f00000" + +#define CONFIG_ALU \ + "setenv bootargs root=/dev/$bdev rw " \ + "console=$consoledev,$baudrate $othbootargs;" \ + "cpu 1 release 0x01000000 - - -;" \ + "cpu 2 release 0x01000000 - - -;" \ + "cpu 3 release 0x01000000 - - -;" \ + "cpu 4 release 0x01000000 - - -;" \ + "cpu 5 release 0x01000000 - - -;" \ + "cpu 6 release 0x01000000 - - -;" \ + "cpu 7 release 0x01000000 - - -;" \ + "go 0x01000000" + +#define CONFIG_LINUX \ + "setenv bootargs root=/dev/ram rw " \ + "console=$consoledev,$baudrate $othbootargs;" \ + "setenv ramdiskaddr 0x02000000;" \ + "setenv fdtaddr 0x00c00000;" \ + "setenv loadaddr 0x1000000;" \ + "bootm $loadaddr $ramdiskaddr $fdtaddr" + +#define CONFIG_HDBOOT \ + "setenv bootargs root=/dev/$bdev rw " \ + "console=$consoledev,$baudrate $othbootargs;" \ + "tftp $loadaddr $bootfile;" \ + "tftp $fdtaddr $fdtfile;" \ + "bootm $loadaddr - $fdtaddr" + +#define CONFIG_NFSBOOTCOMMAND \ + "setenv bootargs root=/dev/nfs rw " \ + "nfsroot=$serverip:$rootpath " \ + "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \ + "console=$consoledev,$baudrate $othbootargs;" \ + "tftp $loadaddr $bootfile;" \ + "tftp $fdtaddr $fdtfile;" \ + "bootm $loadaddr - $fdtaddr" + +#define CONFIG_RAMBOOTCOMMAND \ + "setenv bootargs root=/dev/ram rw " \ + "console=$consoledev,$baudrate $othbootargs;" \ + "tftp $ramdiskaddr $ramdiskfile;" \ + "tftp $loadaddr $bootfile;" \ + "tftp $fdtaddr $fdtfile;" \ + "bootm $loadaddr $ramdiskaddr $fdtaddr" + +#define CONFIG_BOOTCOMMAND CONFIG_LINUX + +#ifdef CONFIG_SECURE_BOOT +#include +#undef CONFIG_CMD_USB +#endif + +#endif /* __T208xQDS_H */ -- cgit v1.1 From ee4d65117d49db094451f2943944777761e9cfad Mon Sep 17 00:00:00 2001 From: Ying Zhang Date: Fri, 24 Jan 2014 15:50:06 +0800 Subject: SPL: powerpc: expand SPL's length to 128K 1. The SPL's length of SDCARD boot has not enough,expand the SPL's length to 128K. 2. deleted unused symbol: CONFIG_SYS_RUN_INDDR Signed-off-by: Ying Zhang Reviewed-by: York Sun --- include/configs/P1022DS.h | 12 ++++++------ include/configs/p1_p2_rdb_pc.h | 12 ++++++------ 2 files changed, 12 insertions(+), 12 deletions(-) (limited to 'include') diff --git a/include/configs/P1022DS.h b/include/configs/P1022DS.h index 6255b0a..2f431aa 100644 --- a/include/configs/P1022DS.h +++ b/include/configs/P1022DS.h @@ -30,12 +30,12 @@ #define CONFIG_FSL_LAW /* Use common FSL init code */ #define CONFIG_SYS_TEXT_BASE 0x11001000 #define CONFIG_SPL_TEXT_BASE 0xf8f81000 -#define CONFIG_SPL_PAD_TO 0x18000 -#define CONFIG_SPL_MAX_SIZE (96 * 1024) +#define CONFIG_SPL_PAD_TO 0x20000 +#define CONFIG_SPL_MAX_SIZE (128 * 1024) #define CONFIG_SYS_MMC_U_BOOT_SIZE (768 << 10) #define CONFIG_SYS_MMC_U_BOOT_DST (0x11000000) #define CONFIG_SYS_MMC_U_BOOT_START (0x11000000) -#define CONFIG_SYS_MMC_U_BOOT_OFFS (96 << 10) +#define CONFIG_SYS_MMC_U_BOOT_OFFS (128 << 10) #define CONFIG_SYS_MPC85XX_NO_RESETVEC #define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot.lds" #define CONFIG_SPL_MMC_BOOT @@ -60,12 +60,12 @@ #define CONFIG_FSL_LAW /* Use common FSL init code */ #define CONFIG_SYS_TEXT_BASE 0x11001000 #define CONFIG_SPL_TEXT_BASE 0xf8f81000 -#define CONFIG_SPL_PAD_TO 0x18000 -#define CONFIG_SPL_MAX_SIZE (96 * 1024) +#define CONFIG_SPL_PAD_TO 0x20000 +#define CONFIG_SPL_MAX_SIZE (128 * 1024) #define CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE (768 << 10) #define CONFIG_SYS_SPI_FLASH_U_BOOT_DST (0x11000000) #define CONFIG_SYS_SPI_FLASH_U_BOOT_START (0x11000000) -#define CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS (96 << 10) +#define CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS (128 << 10) #define CONFIG_SYS_MPC85XX_NO_RESETVEC #define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot.lds" #define CONFIG_SPL_SPI_BOOT diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index 117484d..26b3196 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -159,12 +159,12 @@ #define CONFIG_FSL_LAW /* Use common FSL init code */ #define CONFIG_SYS_TEXT_BASE 0x11001000 #define CONFIG_SPL_TEXT_BASE 0xf8f81000 -#define CONFIG_SPL_PAD_TO 0x18000 -#define CONFIG_SPL_MAX_SIZE (96 * 1024) +#define CONFIG_SPL_PAD_TO 0x20000 +#define CONFIG_SPL_MAX_SIZE (128 * 1024) #define CONFIG_SYS_MMC_U_BOOT_SIZE (768 << 10) #define CONFIG_SYS_MMC_U_BOOT_DST (0x11000000) #define CONFIG_SYS_MMC_U_BOOT_START (0x11000000) -#define CONFIG_SYS_MMC_U_BOOT_OFFS (96 << 10) +#define CONFIG_SYS_MMC_U_BOOT_OFFS (128 << 10) #define CONFIG_SYS_MPC85XX_NO_RESETVEC #define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot.lds" #define CONFIG_SPL_MMC_BOOT @@ -189,12 +189,12 @@ #define CONFIG_FSL_LAW /* Use common FSL init code */ #define CONFIG_SYS_TEXT_BASE 0x11001000 #define CONFIG_SPL_TEXT_BASE 0xf8f81000 -#define CONFIG_SPL_PAD_TO 0x18000 -#define CONFIG_SPL_MAX_SIZE (96 * 1024) +#define CONFIG_SPL_PAD_TO 0x20000 +#define CONFIG_SPL_MAX_SIZE (128 * 1024) #define CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE (768 << 10) #define CONFIG_SYS_SPI_FLASH_U_BOOT_DST (0x11000000) #define CONFIG_SYS_SPI_FLASH_U_BOOT_START (0x11000000) -#define CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS (96 << 10) +#define CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS (128 << 10) #define CONFIG_SYS_MPC85XX_NO_RESETVEC #define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot.lds" #define CONFIG_SPL_SPI_BOOT -- cgit v1.1 From 5a89fa927cf6c54efe36918a4894ce31274d9ef1 Mon Sep 17 00:00:00 2001 From: Ying Zhang Date: Fri, 24 Jan 2014 15:50:07 +0800 Subject: SPL: P2020RDB: fix the problem booting from spi flash There was no enough stack in SPL, so the buffer needed in SPL is to malloc from memory pool and to repalce the temporary variable. Signed-off-by: Ying Zhang Reviewed-by: York Sun --- include/configs/p1_p2_rdb_pc.h | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) (limited to 'include') diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index 26b3196..07b6179 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -579,11 +579,15 @@ #define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR #define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE) #define CONFIG_SPL_RELOC_TEXT_BASE 0xf8f81000 -#define CONFIG_SPL_RELOC_STACK (CONFIG_SYS_INIT_L2_ADDR + 128 * 1024) -#define CONFIG_SPL_RELOC_STACK_SIZE (32 << 10) -#define CONFIG_SPL_RELOC_MALLOC_ADDR (CONFIG_SYS_INIT_L2_ADDR + 160 * 1024) -#define CONFIG_SPL_RELOC_MALLOC_SIZE (96 << 10) #define CONFIG_SPL_GD_ADDR (CONFIG_SYS_INIT_L2_ADDR + 112 * 1024) +#define CONFIG_SPL_RELOC_STACK (CONFIG_SYS_INIT_L2_ADDR + 116 * 1024) +#define CONFIG_SPL_RELOC_STACK_SIZE (32 << 10) +#define CONFIG_SPL_RELOC_MALLOC_ADDR (CONFIG_SYS_INIT_L2_ADDR + 148 * 1024) +#if defined(CONFIG_P2020RDB) +#define CONFIG_SPL_RELOC_MALLOC_SIZE (364 << 10) +#else +#define CONFIG_SPL_RELOC_MALLOC_SIZE (108 << 10) +#endif #elif defined(CONFIG_NAND) #ifdef CONFIG_TPL_BUILD #define CONFIG_SYS_INIT_L2_ADDR 0xf8f80000 -- cgit v1.1 From 27585bd3572f2743fef87adebd9e48b33483c4be Mon Sep 17 00:00:00 2001 From: Ying Zhang Date: Fri, 24 Jan 2014 15:50:08 +0800 Subject: SPL: P1022DS: fix the problem booting from spi flash There was no enough memory for malloc in SPL booting from spi flash, so relayout the memory in SPL: reduce the memory for global data from 16K Bytes to 4K Bytes, save the space for malloc. Signed-off-by: Ying Zhang Reviewed-by: York Sun --- include/configs/P1022DS.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/include/configs/P1022DS.h b/include/configs/P1022DS.h index 2f431aa..139d4fe 100644 --- a/include/configs/P1022DS.h +++ b/include/configs/P1022DS.h @@ -365,10 +365,10 @@ #define CONFIG_SYS_L2_SIZE (256 << 10) #define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE) #define CONFIG_SPL_RELOC_TEXT_BASE 0xf8f81000 -#define CONFIG_SPL_RELOC_STACK (CONFIG_SYS_INIT_L2_ADDR + 128 * 1024) +#define CONFIG_SPL_RELOC_STACK (CONFIG_SYS_INIT_L2_ADDR + 116 * 1024) #define CONFIG_SPL_RELOC_STACK_SIZE (32 << 10) -#define CONFIG_SPL_RELOC_MALLOC_ADDR (CONFIG_SYS_INIT_L2_ADDR + 160 * 1024) -#define CONFIG_SPL_RELOC_MALLOC_SIZE (96 << 10) +#define CONFIG_SPL_RELOC_MALLOC_ADDR (CONFIG_SYS_INIT_L2_ADDR + 148 * 1024) +#define CONFIG_SPL_RELOC_MALLOC_SIZE (108 << 10) #define CONFIG_SPL_GD_ADDR (CONFIG_SYS_INIT_L2_ADDR + 112 * 1024) #elif defined(CONFIG_NAND) #ifdef CONFIG_TPL_BUILD -- cgit v1.1 From c9e1f58818c2e6ac13296406125e43775c4daa55 Mon Sep 17 00:00:00 2001 From: Ying Zhang Date: Fri, 24 Jan 2014 15:50:09 +0800 Subject: powerpc: p1010rdb: Enable p1010rdb to start from NAND/SD/SPI flash with SPL In the previous patches, we introduced the SPL/TPL fraamework. For SD/SPI flash booting way, we introduce the SPL to enable a loader stub. The SPL was loaded by the code from the internal on-chip ROM. The SPL initializes the DDR according to the SPD and loads the final uboot image into DDR, then jump to the DDR to begin execution. For NAND booting way, the nand SPL has size limitation on some board(e.g. P1010RDB), it can not be more than 8KB, we can call it "minimal SPL", So the dynamic DDR driver doesn't fit into this minimum SPL. We added the TPL that is loaded by the the minimal SPL. The TPL initializes the DDR according to the SPD and loads the final uboot image into DDR,then jump to the DDR to begin execution. This patch enabled SPL/TPL for P1010RDB to support starting from NAND/SD/SPI flash with SPL framework and initializing the DDR according to SPD in the SPL/TPL. Because the minimal SPL load the TPL to L2 SRAM and the jump to the L2 SRAM to execute, so the section .resetvec is no longer needed. Signed-off-by: Ying Zhang Reviewed-by: York Sun --- include/configs/P1010RDB.h | 156 ++++++++++++++++++++++++++++++++++++++++++--- 1 file changed, 147 insertions(+), 9 deletions(-) (limited to 'include') diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index f82fbca..eabfc85 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -21,19 +21,75 @@ #define CONFIG_NAND_FSL_IFC #ifdef CONFIG_SDCARD -#define CONFIG_RAMBOOT_SDCARD -#define CONFIG_SYS_TEXT_BASE 0x11000000 -#define CONFIG_RESET_VECTOR_ADDRESS 0x110bfffc +#define CONFIG_SPL +#define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT +#define CONFIG_SPL_DRIVERS_MISC_SUPPORT +#define CONFIG_SPL_ENV_SUPPORT +#define CONFIG_SPL_SERIAL_SUPPORT +#define CONFIG_SPL_MMC_SUPPORT +#define CONFIG_SPL_MMC_MINIMAL +#define CONFIG_SPL_FLUSH_IMAGE +#define CONFIG_SPL_TARGET "u-boot-with-spl.bin" +#define CONFIG_SPL_LIBGENERIC_SUPPORT +#define CONFIG_SPL_LIBCOMMON_SUPPORT +#define CONFIG_SPL_I2C_SUPPORT +#define CONFIG_FSL_LAW /* Use common FSL init code */ +#define CONFIG_SYS_TEXT_BASE 0x11001000 +#define CONFIG_SPL_TEXT_BASE 0xD0001000 +#define CONFIG_SPL_PAD_TO 0x18000 +#define CONFIG_SPL_MAX_SIZE (96 * 1024) +#define CONFIG_SYS_MMC_U_BOOT_SIZE (512 << 10) +#define CONFIG_SYS_MMC_U_BOOT_DST (0x11000000) +#define CONFIG_SYS_MMC_U_BOOT_START (0x11000000) +#define CONFIG_SYS_MMC_U_BOOT_OFFS (96 << 10) +#define CONFIG_SYS_MPC85XX_NO_RESETVEC +#define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot.lds" +#define CONFIG_SPL_MMC_BOOT +#ifdef CONFIG_SPL_BUILD +#define CONFIG_SPL_COMMON_INIT_DDR +#endif #endif #ifdef CONFIG_SPIFLASH +#ifdef CONFIG_SECURE_BOOT #define CONFIG_RAMBOOT_SPIFLASH #define CONFIG_SYS_TEXT_BASE 0x11000000 -#define CONFIG_RESET_VECTOR_ADDRESS 0x110bfffc +#define CONFIG_RESET_VECTOR_ADDRESS 0x1107fffc +#else +#define CONFIG_SPL +#define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT +#define CONFIG_SPL_DRIVERS_MISC_SUPPORT +#define CONFIG_SPL_ENV_SUPPORT +#define CONFIG_SPL_SERIAL_SUPPORT +#define CONFIG_SPL_SPI_SUPPORT +#define CONFIG_SPL_SPI_FLASH_SUPPORT +#define CONFIG_SPL_SPI_FLASH_MINIMAL +#define CONFIG_SPL_FLUSH_IMAGE +#define CONFIG_SPL_TARGET "u-boot-with-spl.bin" +#define CONFIG_SPL_LIBGENERIC_SUPPORT +#define CONFIG_SPL_LIBCOMMON_SUPPORT +#define CONFIG_SPL_I2C_SUPPORT +#define CONFIG_FSL_LAW /* Use common FSL init code */ +#define CONFIG_SYS_TEXT_BASE 0x11001000 +#define CONFIG_SPL_TEXT_BASE 0xD0001000 +#define CONFIG_SPL_PAD_TO 0x18000 +#define CONFIG_SPL_MAX_SIZE (96 * 1024) +#define CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE (512 << 10) +#define CONFIG_SYS_SPI_FLASH_U_BOOT_DST (0x11000000) +#define CONFIG_SYS_SPI_FLASH_U_BOOT_START (0x11000000) +#define CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS (96 << 10) +#define CONFIG_SYS_MPC85XX_NO_RESETVEC +#define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot.lds" +#define CONFIG_SPL_SPI_BOOT +#ifdef CONFIG_SPL_BUILD +#define CONFIG_SPL_COMMON_INIT_DDR +#endif +#endif #endif #ifdef CONFIG_NAND #define CONFIG_SPL +#ifdef CONFIG_SECURE_BOOT #define CONFIG_SPL_INIT_MINIMAL #define CONFIG_SPL_SERIAL_SUPPORT #define CONFIG_SPL_NAND_SUPPORT @@ -51,8 +107,48 @@ #define CONFIG_SYS_NAND_U_BOOT_START 0x00200000 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0 #define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot-nand.lds" +#else +#define CONFIG_TPL +#ifdef CONFIG_TPL_BUILD +#define CONFIG_SPL_NAND_BOOT +#define CONFIG_SPL_FLUSH_IMAGE +#define CONFIG_SPL_ENV_SUPPORT +#define CONFIG_SPL_NAND_INIT +#define CONFIG_SPL_SERIAL_SUPPORT +#define CONFIG_SPL_LIBGENERIC_SUPPORT +#define CONFIG_SPL_LIBCOMMON_SUPPORT +#define CONFIG_SPL_I2C_SUPPORT +#define CONFIG_SPL_NAND_SUPPORT +#define CONFIG_SPL_DRIVERS_MISC_SUPPORT +#define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT +#define CONFIG_SPL_COMMON_INIT_DDR +#define CONFIG_SPL_MAX_SIZE (128 << 10) +#define CONFIG_SPL_TEXT_BASE 0xD0001000 +#define CONFIG_SYS_MPC85XX_NO_RESETVEC +#define CONFIG_SYS_NAND_U_BOOT_SIZE (576 << 10) +#define CONFIG_SYS_NAND_U_BOOT_DST (0x11000000) +#define CONFIG_SYS_NAND_U_BOOT_START (0x11000000) +#define CONFIG_SYS_NAND_U_BOOT_OFFS ((128 + 128) << 10) +#elif defined(CONFIG_SPL_BUILD) +#define CONFIG_SPL_INIT_MINIMAL +#define CONFIG_SPL_SERIAL_SUPPORT +#define CONFIG_SPL_NAND_SUPPORT +#define CONFIG_SPL_NAND_MINIMAL +#define CONFIG_SPL_FLUSH_IMAGE +#define CONFIG_SPL_TEXT_BASE 0xff800000 +#define CONFIG_SPL_MAX_SIZE 8192 +#define CONFIG_SYS_NAND_U_BOOT_SIZE (128 << 10) +#define CONFIG_SYS_NAND_U_BOOT_DST 0xD0000000 +#define CONFIG_SYS_NAND_U_BOOT_START 0xD0000000 +#define CONFIG_SYS_NAND_U_BOOT_OFFS (128 << 10) +#endif +#define CONFIG_SPL_PAD_TO 0x20000 +#define CONFIG_TPL_PAD_TO 0x20000 +#define CONFIG_SPL_TARGET "u-boot-with-spl.bin" +#define CONFIG_SYS_TEXT_BASE 0x11001000 +#define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot-nand.lds" +#endif #endif - #ifdef CONFIG_NAND_SECBOOT /* NAND Boot */ #define CONFIG_RAMBOOT_NAND @@ -473,6 +569,43 @@ extern unsigned long get_sdram_size(void); #define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Reserve 256 kB for Mon*/ #define CONFIG_SYS_MALLOC_LEN (1024 * 1024) /* Reserved for malloc*/ +/* + * Config the L2 Cache as L2 SRAM + */ +#if defined(CONFIG_SPL_BUILD) +#if defined(CONFIG_SDCARD) || defined(CONFIG_SPIFLASH) +#define CONFIG_SYS_INIT_L2_ADDR 0xD0000000 +#define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR +#define CONFIG_SYS_L2_SIZE (256 << 10) +#define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE) +#define CONFIG_SPL_RELOC_TEXT_BASE 0xD0001000 +#define CONFIG_SPL_RELOC_STACK (CONFIG_SYS_INIT_L2_ADDR + 112 * 1024) +#define CONFIG_SPL_RELOC_STACK_SIZE (16 << 10) +#define CONFIG_SPL_RELOC_MALLOC_ADDR (CONFIG_SYS_INIT_L2_ADDR + 128 * 1024) +#define CONFIG_SPL_RELOC_MALLOC_SIZE (128 << 10) +#define CONFIG_SPL_GD_ADDR (CONFIG_SYS_INIT_L2_ADDR + 96 * 1024) +#elif defined(CONFIG_NAND) +#ifdef CONFIG_TPL_BUILD +#define CONFIG_SYS_INIT_L2_ADDR 0xD0000000 +#define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR +#define CONFIG_SYS_L2_SIZE (256 << 10) +#define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE) +#define CONFIG_SPL_RELOC_TEXT_BASE 0xD0001000 +#define CONFIG_SPL_RELOC_STACK (CONFIG_SYS_INIT_L2_ADDR + 192 * 1024) +#define CONFIG_SPL_RELOC_MALLOC_ADDR (CONFIG_SYS_INIT_L2_ADDR + 208 * 1024) +#define CONFIG_SPL_RELOC_MALLOC_SIZE (48 << 10) +#define CONFIG_SPL_GD_ADDR (CONFIG_SYS_INIT_L2_ADDR + 176 * 1024) +#else +#define CONFIG_SYS_INIT_L2_ADDR 0xD0000000 +#define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR +#define CONFIG_SYS_L2_SIZE (256 << 10) +#define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE) +#define CONFIG_SPL_RELOC_TEXT_BASE (CONFIG_SYS_INIT_L2_END - 0x3000) +#define CONFIG_SPL_RELOC_STACK ((CONFIG_SYS_INIT_L2_END - 1) & ~0xF) +#endif +#endif +#endif + /* Serial Port */ #define CONFIG_CONS_INDEX 1 #undef CONFIG_SERIAL_SOFTWARE_FIFO @@ -480,7 +613,7 @@ extern unsigned long get_sdram_size(void); #define CONFIG_SYS_NS16550_SERIAL #define CONFIG_SYS_NS16550_REG_SIZE 1 #define CONFIG_SYS_NS16550_CLK get_bus_freq(0) -#ifdef CONFIG_SPL_BUILD +#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_INIT_MINIMAL) #define CONFIG_NS16550_MIN_FUNCTIONS #endif @@ -637,12 +770,12 @@ extern unsigned long get_sdram_size(void); /* * Environment */ -#if defined(CONFIG_RAMBOOT_SDCARD) +#if defined(CONFIG_SDCARD) #define CONFIG_ENV_IS_IN_MMC #define CONFIG_FSL_FIXED_MMC_LOCATION #define CONFIG_SYS_MMC_ENV_DEV 0 #define CONFIG_ENV_SIZE 0x2000 -#elif defined(CONFIG_RAMBOOT_SPIFLASH) +#elif defined(CONFIG_SPIFLASH) #define CONFIG_ENV_IS_IN_SPI_FLASH #define CONFIG_ENV_SPI_BUS 0 #define CONFIG_ENV_SPI_CS 0 @@ -653,6 +786,10 @@ extern unsigned long get_sdram_size(void); #define CONFIG_ENV_SIZE 0x2000 #elif defined(CONFIG_NAND) #define CONFIG_ENV_IS_IN_NAND +#ifdef CONFIG_TPL_BUILD +#define CONFIG_ENV_SIZE 0x2000 +#define CONFIG_ENV_ADDR (CONFIG_SYS_INIT_L2_ADDR + (160 << 10)) +#else #if defined(CONFIG_P1010RDB_PA) #define CONFIG_ENV_SIZE CONFIG_SYS_NAND_BLOCK_SIZE #define CONFIG_ENV_RANGE (3 * CONFIG_ENV_SIZE) /* 3*16=48K for env */ @@ -660,7 +797,8 @@ extern unsigned long get_sdram_size(void); #define CONFIG_ENV_SIZE (16 * 1024) #define CONFIG_ENV_RANGE (32 * CONFIG_ENV_SIZE) /* new block size 512K */ #endif -#define CONFIG_ENV_OFFSET ((768 * 1024) + CONFIG_SYS_NAND_BLOCK_SIZE) +#endif +#define CONFIG_ENV_OFFSET (1024 * 1024) #elif defined(CONFIG_SYS_RAMBOOT) #define CONFIG_ENV_IS_NOWHERE /* Store ENV in memory only */ #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - 0x1000) -- cgit v1.1 From c6e8f49a16915822ffe25904daf1fc9c28115ed4 Mon Sep 17 00:00:00 2001 From: "Haijun.Zhang" Date: Thu, 13 Feb 2014 09:03:02 +0800 Subject: powerpc/mpc8536DS:Increase binary size for mpc8536DS board u-boot binary size for Freescale mpc8536DS platforms is 512KB. This has been reached to upper limit of the platforms and causig linker error. So increase the u-boot binary size to 768KB. Signed-off-by: Haijun Zhang Reviewed-by: York Sun --- include/configs/MPC8536DS.h | 10 +++------- 1 file changed, 3 insertions(+), 7 deletions(-) (limited to 'include') diff --git a/include/configs/MPC8536DS.h b/include/configs/MPC8536DS.h index 57bf04f..2505869 100644 --- a/include/configs/MPC8536DS.h +++ b/include/configs/MPC8536DS.h @@ -42,7 +42,7 @@ #endif #ifndef CONFIG_SYS_TEXT_BASE -#define CONFIG_SYS_TEXT_BASE 0xeff80000 +#define CONFIG_SYS_TEXT_BASE 0xeff40000 #endif #ifndef CONFIG_RESET_VECTOR_ADDRESS @@ -326,7 +326,7 @@ /* NAND boot: 4K NAND loader config */ #define CONFIG_SYS_NAND_SPL_SIZE 0x1000 -#define CONFIG_SYS_NAND_U_BOOT_SIZE ((512 << 10) - 0x2000) +#define CONFIG_SYS_NAND_U_BOOT_SIZE ((768 << 10) - 0x2000) #define CONFIG_SYS_NAND_U_BOOT_DST (CONFIG_SYS_INIT_L2_ADDR) #define CONFIG_SYS_NAND_U_BOOT_START \ (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_NAND_SPL_SIZE) @@ -626,7 +626,7 @@ #if defined(CONFIG_RAMBOOT_NAND) #define CONFIG_ENV_IS_IN_NAND 1 #define CONFIG_ENV_SIZE CONFIG_SYS_NAND_BLOCK_SIZE -#define CONFIG_ENV_OFFSET ((512 * 1024) + CONFIG_SYS_NAND_BLOCK_SIZE) +#define CONFIG_ENV_OFFSET ((768 * 1024) + CONFIG_SYS_NAND_BLOCK_SIZE) #define CONFIG_ENV_RANGE (3 * CONFIG_ENV_SIZE) #elif defined(CONFIG_RAMBOOT_SPIFLASH) #define CONFIG_ENV_IS_IN_SPI_FLASH @@ -649,11 +649,7 @@ #endif #else #define CONFIG_ENV_IS_IN_FLASH 1 - #if CONFIG_SYS_MONITOR_BASE > 0xfff80000 - #define CONFIG_ENV_ADDR 0xfff80000 - #else #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE) - #endif #define CONFIG_ENV_SIZE 0x2000 #define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K (one sector) */ #endif -- cgit v1.1 From 4a377552f01b7b19ea5fc02eb844c786751f7247 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Tue, 25 Feb 2014 19:26:48 +0900 Subject: kbuild: Move linker sciript check to prepare1 Same as the previous commit. Move sanity check to prepare1 target to avoid nasty troubles. Before this commit, LDSCRIPT existence was not checked when it was specified by CONFIG_SYS_LDSCRIPT. Now LDSCRIPT existence is checked for all boards. $(wildcard $(LDSCRIPT)) must point to the linker scripts with absolute path. Otherwise, make will terminate with a false error on out-of-tree build. Signed-off-by: Masahiro Yamada --- include/configs/MPC8536DS.h | 2 +- include/configs/MPC8569MDS.h | 2 +- include/configs/MPC8572DS.h | 2 +- include/configs/P1023RDS.h | 2 +- include/configs/P1_P2_RDB.h | 2 +- 5 files changed, 5 insertions(+), 5 deletions(-) (limited to 'include') diff --git a/include/configs/MPC8536DS.h b/include/configs/MPC8536DS.h index 57bf04f..9846118 100644 --- a/include/configs/MPC8536DS.h +++ b/include/configs/MPC8536DS.h @@ -24,7 +24,7 @@ #define CONFIG_SYS_TEXT_BASE_SPL 0xfff00000 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE_SPL /* start of monitor */ #else -#define CONFIG_SYS_LDSCRIPT $(TOPDIR)/$(CPUDIR)/u-boot-nand.lds +#define CONFIG_SYS_LDSCRIPT $(CPUDIR)/u-boot-nand.lds #define CONFIG_SYS_TEXT_BASE 0xf8f82000 #endif /* CONFIG_NAND_SPL */ #endif diff --git a/include/configs/MPC8569MDS.h b/include/configs/MPC8569MDS.h index 33cadb9..58b9c26 100644 --- a/include/configs/MPC8569MDS.h +++ b/include/configs/MPC8569MDS.h @@ -56,7 +56,7 @@ extern unsigned long get_clock_freq(void); #define CONFIG_SYS_TEXT_BASE_SPL 0xfff00000 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE_SPL /* start of monitor */ #else -#define CONFIG_SYS_LDSCRIPT $(TOPDIR)/$(CPUDIR)/u-boot-nand.lds +#define CONFIG_SYS_LDSCRIPT $(CPUDIR)/u-boot-nand.lds #define CONFIG_SYS_TEXT_BASE 0xf8f82000 #endif #endif diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h index f457719..7b63945 100644 --- a/include/configs/MPC8572DS.h +++ b/include/configs/MPC8572DS.h @@ -24,7 +24,7 @@ #define CONFIG_SYS_TEXT_BASE_SPL 0xfff00000 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE_SPL /* start of monitor */ #else -#define CONFIG_SYS_LDSCRIPT $(TOPDIR)/$(CPUDIR)/u-boot-nand.lds +#define CONFIG_SYS_LDSCRIPT $(CPUDIR)/u-boot-nand.lds #define CONFIG_SYS_TEXT_BASE 0xf8f82000 #endif /* CONFIG_NAND_SPL */ #endif diff --git a/include/configs/P1023RDS.h b/include/configs/P1023RDS.h index ec72c78..2ffa354 100644 --- a/include/configs/P1023RDS.h +++ b/include/configs/P1023RDS.h @@ -26,7 +26,7 @@ #ifdef CONFIG_NAND_SPL #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE_SPL /* start of monitor */ #else -#define CONFIG_SYS_LDSCRIPT $(TOPDIR)/$(CPUDIR)/u-boot-nand.lds +#define CONFIG_SYS_LDSCRIPT $(CPUDIR)/u-boot-nand.lds #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #endif /* CONFIG_NAND_SPL */ #endif diff --git a/include/configs/P1_P2_RDB.h b/include/configs/P1_P2_RDB.h index 32ed0c2..2ffaf5c 100644 --- a/include/configs/P1_P2_RDB.h +++ b/include/configs/P1_P2_RDB.h @@ -38,7 +38,7 @@ #define CONFIG_SYS_TEXT_BASE_SPL 0xfff00000 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE_SPL /* start of monitor */ #else -#define CONFIG_SYS_LDSCRIPT $(TOPDIR)/$(CPUDIR)/u-boot-nand.lds +#define CONFIG_SYS_LDSCRIPT $(CPUDIR)/u-boot-nand.lds #define CONFIG_SYS_TEXT_BASE 0xf8f82000 #endif /* CONFIG_NAND_SPL */ #endif -- cgit v1.1 From b60eff31f3bd71a6f14b6c6efc8ad5fb3705de6d Mon Sep 17 00:00:00 2001 From: Albert ARIBAUD Date: Sat, 22 Feb 2014 17:53:43 +0100 Subject: arm: remove unneeded symbol offsets and _TEXT_BASE Remove the last uses of symbol offsets in ARM U-Boot. Remove some needless uses of _TEXT_BASE. Remove all _TEXT_BASE definitions. Signed-off-by: Albert ARIBAUD --- include/asm-generic/sections.h | 26 +++++++------------------- 1 file changed, 7 insertions(+), 19 deletions(-) (limited to 'include') diff --git a/include/asm-generic/sections.h b/include/asm-generic/sections.h index 7e1eb4b..458952f 100644 --- a/include/asm-generic/sections.h +++ b/include/asm-generic/sections.h @@ -63,28 +63,16 @@ extern char __image_copy_end[]; extern void _start(void); /* - * ARM needs to use offsets for symbols, since the values of some symbols - * are not resolved prior to relocation (and are just 0). Maybe this can be - * resolved, or maybe other architectures are similar, iwc this should be - * promoted to an architecture option. + * ARM defines its symbols as char[]. Other arches define them as ulongs. */ #ifdef CONFIG_ARM -#define CONFIG_SYS_SYM_OFFSETS -#endif - -#ifdef CONFIG_SYS_SYM_OFFSETS -/* Start/end of the relocation entries, as an offset from _start */ -extern ulong _rel_dyn_start_ofs; -extern ulong _rel_dyn_end_ofs; - -/* End of the region to be relocated, as an offset form _start */ -extern ulong _image_copy_end_ofs; -extern ulong _bss_start_ofs; /* BSS start relative to _start */ -extern ulong _bss_end_ofs; /* BSS end relative to _start */ -extern ulong _end_ofs; /* end of image relative to _start */ - -extern ulong _TEXT_BASE; /* code start */ +extern char __bss_start[]; +extern char __bss_end[]; +extern char __image_copy_start[]; +extern char __image_copy_end[]; +extern char __rel_dyn_start[]; +extern char __rel_dyn_end[]; #else /* don't use offsets: */ -- cgit v1.1 From 9c653aad169ffdc9e18482970df9de1a29773034 Mon Sep 17 00:00:00 2001 From: Mugunthan V N Date: Tue, 18 Feb 2014 07:31:52 -0500 Subject: drivers: net: cpsw: add support to have phy address from cpsw platform data Some platforms like AM437x have different EVMs with different phy addresses, so this patch adds support for passing phy address via cpsw plaform data. Also renamed phy_id to phy_addr so better understanding of the code. Reviewed-by: Felipe Balbi Signed-off-by: Mugunthan V N [trini: Update BuR am335x_igep0033 pcm051_rev3 pcm051_rev1 cm_t335 pengwyn boards] Signed-off-by: Tom Rini --- include/configs/am335x_evm.h | 1 - include/configs/am335x_igep0033.h | 1 - include/configs/bur_am335x_common.h | 1 - include/configs/cm_t335.h | 1 - include/configs/dra7xx_evm.h | 1 - include/configs/dxr2.h | 1 - include/configs/pcm051.h | 1 - include/configs/pengwyn.h | 1 - include/configs/pxm2.h | 1 - include/configs/rut.h | 1 - include/configs/ti814x_evm.h | 1 - include/cpsw.h | 2 +- 12 files changed, 1 insertion(+), 12 deletions(-) (limited to 'include') diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h index 59a8f36..23c056c 100644 --- a/include/configs/am335x_evm.h +++ b/include/configs/am335x_evm.h @@ -398,7 +398,6 @@ /* Network. */ #define CONFIG_PHY_GIGE #define CONFIG_PHYLIB -#define CONFIG_PHY_ADDR 0 #define CONFIG_PHY_SMSC /* NAND support */ diff --git a/include/configs/am335x_igep0033.h b/include/configs/am335x_igep0033.h index 115d1b3..e72ee05 100644 --- a/include/configs/am335x_igep0033.h +++ b/include/configs/am335x_igep0033.h @@ -181,7 +181,6 @@ #define CONFIG_NET_RETRY_COUNT 10 #define CONFIG_NET_MULTI #define CONFIG_PHYLIB -#define CONFIG_PHY_ADDR 0 #define CONFIG_PHY_SMSC /* NAND support */ diff --git a/include/configs/bur_am335x_common.h b/include/configs/bur_am335x_common.h index 1f57bd2..7bbe596 100644 --- a/include/configs/bur_am335x_common.h +++ b/include/configs/bur_am335x_common.h @@ -51,7 +51,6 @@ #define CONFIG_MII /* Required in net/eth.c */ #define CONFIG_SPL_ETH_SUPPORT #define CONFIG_PHYLIB -#define CONFIG_PHY_ADDR 1 #define CONFIG_PHY_NATSEMI #define CONFIG_SPL_NET_SUPPORT #define CONFIG_SPL_ENV_SUPPORT /* used for a fetching MAC-Address */ diff --git a/include/configs/cm_t335.h b/include/configs/cm_t335.h index 56e9a8e..26b615b 100644 --- a/include/configs/cm_t335.h +++ b/include/configs/cm_t335.h @@ -114,7 +114,6 @@ /* Network. */ #define CONFIG_PHY_GIGE #define CONFIG_PHYLIB -#define CONFIG_PHY_ADDR 0 #define CONFIG_PHY_ATHEROS /* NAND support */ diff --git a/include/configs/dra7xx_evm.h b/include/configs/dra7xx_evm.h index c67cf60..291c538 100644 --- a/include/configs/dra7xx_evm.h +++ b/include/configs/dra7xx_evm.h @@ -62,7 +62,6 @@ #define CONFIG_MII /* Required in net/eth.c */ #define CONFIG_PHY_GIGE /* per-board part of CPSW */ #define CONFIG_PHYLIB -#define CONFIG_PHY_ADDR 2 /* SPI */ #undef CONFIG_OMAP3_SPI diff --git a/include/configs/dxr2.h b/include/configs/dxr2.h index 1e42f5c..e95d74c 100644 --- a/include/configs/dxr2.h +++ b/include/configs/dxr2.h @@ -49,7 +49,6 @@ #undef CONFIG_MII #undef CONFIG_PHY_GIGE -#define CONFIG_PHY_ADDR 0 #define CONFIG_PHY_SMSC #define CONFIG_FACTORYSET diff --git a/include/configs/pcm051.h b/include/configs/pcm051.h index 6f41ee7..9af3efd 100644 --- a/include/configs/pcm051.h +++ b/include/configs/pcm051.h @@ -297,7 +297,6 @@ #define CONFIG_NET_MULTI #define CONFIG_PHY_GIGE #define CONFIG_PHYLIB -#define CONFIG_PHY_ADDR 0 #define CONFIG_PHY_SMSC #endif /* ! __CONFIG_PCM051_H */ diff --git a/include/configs/pengwyn.h b/include/configs/pengwyn.h index 5a55556..fc25966 100644 --- a/include/configs/pengwyn.h +++ b/include/configs/pengwyn.h @@ -196,7 +196,6 @@ /* Network */ #define CONFIG_CMD_MII #define CONFIG_PHYLIB -#define CONFIG_PHY_ADDR 1 #define CONFIG_PHY_RESET 1 #define CONFIG_PHY_NATSEMI diff --git a/include/configs/pxm2.h b/include/configs/pxm2.h index 7722f7b..6276d43 100644 --- a/include/configs/pxm2.h +++ b/include/configs/pxm2.h @@ -44,7 +44,6 @@ #undef CONFIG_SPL_NET_VCI_STRING #undef CONFIG_SPL_ETH_SUPPORT -#define CONFIG_PHY_ADDR 0 #define CONFIG_PHY_ATHEROS #define CONFIG_FACTORYSET diff --git a/include/configs/rut.h b/include/configs/rut.h index d4519f9..6bddede 100644 --- a/include/configs/rut.h +++ b/include/configs/rut.h @@ -41,7 +41,6 @@ #undef CONFIG_SPL_NET_VCI_STRING #undef CONFIG_SPL_ETH_SUPPORT -#define CONFIG_PHY_ADDR 1 #define CONFIG_PHY_NATSEMI #define CONFIG_FACTORYSET diff --git a/include/configs/ti814x_evm.h b/include/configs/ti814x_evm.h index ba16b1c..b51400c 100644 --- a/include/configs/ti814x_evm.h +++ b/include/configs/ti814x_evm.h @@ -233,7 +233,6 @@ #define CONFIG_NET_MULTI #define CONFIG_PHY_GIGE #define CONFIG_PHYLIB -#define CONFIG_PHY_ADDR 1 #define CONFIG_PHY_ET1011C #define CONFIG_PHY_ET1011C_TX_CLK_FIX diff --git a/include/cpsw.h b/include/cpsw.h index 743cb96..a73843d 100644 --- a/include/cpsw.h +++ b/include/cpsw.h @@ -19,7 +19,7 @@ struct cpsw_slave_data { u32 slave_reg_ofs; u32 sliver_reg_ofs; - int phy_id; + int phy_addr; int phy_if; }; -- cgit v1.1 From 4cdd7fda913df76e1267827b71d451e1c07af441 Mon Sep 17 00:00:00 2001 From: Mugunthan V N Date: Tue, 18 Feb 2014 07:31:54 -0500 Subject: ARM: AM43xx: Add CPSW support to AM43xx EPOS and GP EVM Adding support for CPSW to AM43xx EPOS nad GP EVM which is connected to RMII and RGMII phy respectively and enable cpsw in config. Reviewed-by: Felipe Balbi Signed-off-by: Mugunthan V N --- include/configs/am43xx_evm.h | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) (limited to 'include') diff --git a/include/configs/am43xx_evm.h b/include/configs/am43xx_evm.h index c773a18..aff17ee 100644 --- a/include/configs/am43xx_evm.h +++ b/include/configs/am43xx_evm.h @@ -204,5 +204,25 @@ "run mmcboot;" \ "run usbboot;" +/* CPSW Ethernet */ +#define CONFIG_CMD_NET +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_PING +#define CONFIG_CMD_MII +#define CONFIG_DRIVER_TI_CPSW +#define CONFIG_MII +#define CONFIG_BOOTP_DEFAULT +#define CONFIG_BOOTP_DNS +#define CONFIG_BOOTP_DNS2 +#define CONFIG_BOOTP_SEND_HOSTNAME +#define CONFIG_BOOTP_GATEWAY +#define CONFIG_BOOTP_SUBNETMASK +#define CONFIG_NET_RETRY_COUNT 10 +#define CONFIG_NET_MULTI +#define CONFIG_PHY_GIGE +#define CONFIG_PHYLIB +#define CONFIG_SYS_RX_ETH_BUFFER 64 +#define CONFIG_PHY_ADDR 16 + #endif #endif /* __CONFIG_AM43XX_EVM_H */ -- cgit v1.1 From a35ad51efe363abdc72473b32aea2c1bb271995f Mon Sep 17 00:00:00 2001 From: Mugunthan V N Date: Tue, 18 Feb 2014 07:31:55 -0500 Subject: ARM: AM335x: add support for reading cpsw 2nd mac address from efuse Adding support for reading cpsw 2nd mac address from efuse and pass it to kernel via dtb which will be used in dual emac mode of cpsw. Also adding mii command support to am335x common config. Acked-by: Tom Rini Signed-off-by: Mugunthan V N --- include/configs/ti_am335x_common.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/configs/ti_am335x_common.h b/include/configs/ti_am335x_common.h index 7e9ca01..50c3203 100644 --- a/include/configs/ti_am335x_common.h +++ b/include/configs/ti_am335x_common.h @@ -30,6 +30,7 @@ /* Network defines. */ #define CONFIG_CMD_NET /* 'bootp' and 'tftp' */ #define CONFIG_CMD_DHCP +#define CONFIG_CMD_MII #define CONFIG_BOOTP_DNS /* Configurable parts of CMD_DHCP */ #define CONFIG_BOOTP_DNS2 #define CONFIG_BOOTP_SEND_HOSTNAME -- cgit v1.1 From 3a3939bf3d216900486748ffc330a33d565c242b Mon Sep 17 00:00:00 2001 From: Mugunthan V N Date: Tue, 18 Feb 2014 07:31:58 -0500 Subject: ARM: AM43xx: Add Ethernet boot support to SPL Add Ethernet Boot support to SPL Acked-by: Tom Rini Signed-off-by: Mugunthan V N --- include/configs/am43xx_evm.h | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/configs/am43xx_evm.h b/include/configs/am43xx_evm.h index aff17ee..614857d 100644 --- a/include/configs/am43xx_evm.h +++ b/include/configs/am43xx_evm.h @@ -204,6 +204,8 @@ "run mmcboot;" \ "run usbboot;" +#endif + /* CPSW Ethernet */ #define CONFIG_CMD_NET #define CONFIG_CMD_DHCP @@ -221,8 +223,12 @@ #define CONFIG_NET_MULTI #define CONFIG_PHY_GIGE #define CONFIG_PHYLIB + +#define CONFIG_SPL_ENV_SUPPORT +#define CONFIG_SPL_NET_VCI_STRING "AM43xx U-Boot SPL" + +#define CONFIG_SPL_ETH_SUPPORT +#define CONFIG_SPL_NET_SUPPORT #define CONFIG_SYS_RX_ETH_BUFFER 64 -#define CONFIG_PHY_ADDR 16 -#endif #endif /* __CONFIG_AM43XX_EVM_H */ -- cgit v1.1 From cc07294bc704694ae33db75b25ac557e5917a83f Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Tue, 25 Feb 2014 11:07:22 +0100 Subject: arm: am335x: DXR2: Reset SMSC LAN9303 switch via GPIO upon bootup Since the switch may be re-configured for VLAN usage in Linux (or any other OS), lets reset the switch to its default register values upon power-up. Otherwise network might not be available in U-Boot. Signed-off-by: Stefan Roese Cc: Heiko Schocher Cc: Roger Meier Cc: Lukas Stockmann Cc: Tom Rini --- include/configs/dxr2.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/configs/dxr2.h b/include/configs/dxr2.h index e95d74c..75f7812 100644 --- a/include/configs/dxr2.h +++ b/include/configs/dxr2.h @@ -26,6 +26,7 @@ #define BOARD_DFU_BUTTON_GPIO 27 #define BOARD_DFU_BUTTON_LED 64 +#define GPIO_LAN9303_NRST 88 /* GPIO2_24 = gpio88 */ #undef CONFIG_DOS_PARTITION #undef CONFIG_CMD_FAT -- cgit v1.1