From d1cbe85b084ce543ba0b09def03a1b20940e6c03 Mon Sep 17 00:00:00 2001 From: wdenk Date: Sat, 28 Jun 2003 17:24:46 +0000 Subject: Merge from "stable branch", tag LABEL_2003_06_28_1800-stable: - Allow to call sysmon function interactively - PIC on LWMON board needs delay after power-on - Add missing RSR definitions for MPC8xx - Improve log buffer handling: guarantee clean reset after power-on - Add support for EXBITGEN board - Add support for SL8245 board --- include/mpc8xx.h | 14 ++++++++++++++ 1 file changed, 14 insertions(+) (limited to 'include/mpc8xx.h') diff --git a/include/mpc8xx.h b/include/mpc8xx.h index ef6d3f7..1a65f10 100644 --- a/include/mpc8xx.h +++ b/include/mpc8xx.h @@ -118,6 +118,20 @@ #endif /*----------------------------------------------------------------------- + * RSR - Reset Status Register 5-4 + */ +#define RSR_JTRS 0x01000000 /* JTAG Reset Status */ +#define RSR_DBSRS 0x02000000 /* Debug Port Soft Reset Status */ +#define RSR_DBHRS 0x04000000 /* Debug Port Hard Reset Status */ +#define RSR_CSRS 0x08000000 /* Check Stop Reset Status */ +#define RSR_SWRS 0x10000000 /* Software Watchdog Reset Status*/ +#define RSR_LLRS 0x20000000 /* Loss-of-Lock Reset Status */ +#define RSR_ESRS 0x40000000 /* External Soft Reset Status */ +#define RSR_EHRS 0x80000000 /* External Hard Reset Status */ + +#define RSR_ALLBITS (RSR_JTRS|RSR_DBSRS|RSR_DBHRS|RSR_CSRS|RSR_SWRS|RSR_LLRS|RSR_ESRS|RSR_EHRS) + +/*----------------------------------------------------------------------- * PLPRCR - PLL, Low-Power, and Reset Control Register 15-30 */ #define PLPRCR_MF_MSK 0xFFF00000 /* Multiplication factor bits */ -- cgit v1.1