From d0847ecc9f969e6ac089e505d5c1ddedddedfcd4 Mon Sep 17 00:00:00 2001 From: Jagan Teki Date: Fri, 1 May 2020 22:04:50 +0530 Subject: spi: Zap lpc32xx_ssp driver-related code lpc32xx_ssp driver is deprecated, no active updates and no board user, hence dropped the same. Cc: Vladimir Zapolskiy Cc: Albert ARIBAUD Cc: Tom Rini Signed-off-by: Jagan Teki --- drivers/spi/Kconfig | 6 --- drivers/spi/Makefile | 1 - drivers/spi/lpc32xx_ssp.c | 134 ---------------------------------------------- 3 files changed, 141 deletions(-) delete mode 100644 drivers/spi/lpc32xx_ssp.c (limited to 'drivers') diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index 4166c61..dccd5ea 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -431,12 +431,6 @@ config KIRKWOOD_SPI Enable support for SPI on various Marvell SoCs, such as Kirkwood and Armada 375. -config LPC32XX_SSP - bool "LPC32XX SPI Driver" - depends on DEPRECATED - help - Enable support for SPI on LPC32xx - config MXC_SPI bool "MXC SPI Driver" help diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile index 52462e1..6441694 100644 --- a/drivers/spi/Makefile +++ b/drivers/spi/Makefile @@ -33,7 +33,6 @@ obj-$(CONFIG_FSL_ESPI) += fsl_espi.o obj-$(CONFIG_FSL_QSPI) += fsl_qspi.o obj-$(CONFIG_ICH_SPI) += ich.o obj-$(CONFIG_KIRKWOOD_SPI) += kirkwood_spi.o -obj-$(CONFIG_LPC32XX_SSP) += lpc32xx_ssp.o obj-$(CONFIG_MESON_SPIFC) += meson_spifc.o obj-$(CONFIG_MPC8XX_SPI) += mpc8xx_spi.o obj-$(CONFIG_MPC8XXX_SPI) += mpc8xxx_spi.o diff --git a/drivers/spi/lpc32xx_ssp.c b/drivers/spi/lpc32xx_ssp.c deleted file mode 100644 index 4b09366..0000000 --- a/drivers/spi/lpc32xx_ssp.c +++ /dev/null @@ -1,134 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * LPC32xx SSP interface (SPI mode) - * - * (C) Copyright 2014 DENX Software Engineering GmbH - * Written-by: Albert ARIBAUD - */ - -#include -#include -#include -#include -#include -#include - -/* SSP chip registers */ -struct ssp_regs { - u32 cr0; - u32 cr1; - u32 data; - u32 sr; - u32 cpsr; - u32 imsc; - u32 ris; - u32 mis; - u32 icr; - u32 dmacr; -}; - -/* CR1 register defines */ -#define SSP_CR1_SSP_ENABLE 0x0002 - -/* SR register defines */ -#define SSP_SR_TNF 0x0002 -/* SSP status RX FIFO not empty bit */ -#define SSP_SR_RNE 0x0004 - -/* lpc32xx spi slave */ -struct lpc32xx_spi_slave { - struct spi_slave slave; - struct ssp_regs *regs; -}; - -static inline struct lpc32xx_spi_slave *to_lpc32xx_spi_slave( - struct spi_slave *slave) -{ - return container_of(slave, struct lpc32xx_spi_slave, slave); -} - -/* the following is called in sequence by do_spi_xfer() */ - -struct spi_slave *spi_setup_slave(uint bus, uint cs, uint max_hz, uint mode) -{ - struct lpc32xx_spi_slave *lslave; - - /* we only set up SSP0 for now, so ignore bus */ - - if (mode & SPI_3WIRE) { - pr_err("3-wire mode not supported"); - return NULL; - } - - if (mode & SPI_SLAVE) { - pr_err("slave mode not supported\n"); - return NULL; - } - - if (mode & SPI_PREAMBLE) { - pr_err("preamble byte skipping not supported\n"); - return NULL; - } - - lslave = spi_alloc_slave(struct lpc32xx_spi_slave, bus, cs); - if (!lslave) { - printf("SPI_error: Fail to allocate lpc32xx_spi_slave\n"); - return NULL; - } - - lslave->regs = (struct ssp_regs *)SSP0_BASE; - - /* - * 8 bit frame, SPI fmt, 500kbps -> clock divider is 26. - * Set SCR to 0 and CPSDVSR to 26. - */ - - writel(0x7, &lslave->regs->cr0); /* 8-bit chunks, SPI, 1 clk/bit */ - writel(26, &lslave->regs->cpsr); /* SSP clock = HCLK/26 = 500kbps */ - writel(0, &lslave->regs->imsc); /* do not raise any interrupts */ - writel(0, &lslave->regs->icr); /* clear any pending interrupt */ - writel(0, &lslave->regs->dmacr); /* do not do DMAs */ - writel(SSP_CR1_SSP_ENABLE, &lslave->regs->cr1); /* enable SSP0 */ - return &lslave->slave; -} - -void spi_free_slave(struct spi_slave *slave) -{ - struct lpc32xx_spi_slave *lslave = to_lpc32xx_spi_slave(slave); - - debug("(lpc32xx) spi_free_slave: 0x%08x\n", (u32)lslave); - free(lslave); -} - -int spi_claim_bus(struct spi_slave *slave) -{ - /* only one bus and slave so far, always available */ - return 0; -} - -int spi_xfer(struct spi_slave *slave, unsigned int bitlen, - const void *dout, void *din, unsigned long flags) -{ - struct lpc32xx_spi_slave *lslave = to_lpc32xx_spi_slave(slave); - int bytelen = bitlen >> 3; - int idx_out = 0; - int idx_in = 0; - int start_time; - - start_time = get_timer(0); - while ((idx_out < bytelen) || (idx_in < bytelen)) { - int status = readl(&lslave->regs->sr); - if ((idx_out < bytelen) && (status & SSP_SR_TNF)) - writel(((u8 *)dout)[idx_out++], &lslave->regs->data); - if ((idx_in < bytelen) && (status & SSP_SR_RNE)) - ((u8 *)din)[idx_in++] = readl(&lslave->regs->data); - if (get_timer(start_time) >= CONFIG_LPC32XX_SSP_TIMEOUT) - return -1; - } - return 0; -} - -void spi_release_bus(struct spi_slave *slave) -{ - /* do nothing */ -} -- cgit v1.1 From 5a2b6778fac98f2cb9ee1e7e6b98cd88d18dcbb9 Mon Sep 17 00:00:00 2001 From: Jagan Teki Date: Fri, 1 May 2020 23:44:18 +0530 Subject: phy: Use _nodev naming convention if non-device clients Clients that are requesting some of uclass API's without a device (with ofnode) usually have _nodev naming convention. - clk_get_by_index_nodev - clk_get_by_name_nodev - reset_get_by_index_nodev - gpio_request_by_name_nodev So, update the same naming convention PHY framework. This doesn't change the existing functionality. Cc: Neil Armstrong Cc: Tom Rini Signed-off-by: Jagan Teki --- drivers/phy/phy-uclass.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'drivers') diff --git a/drivers/phy/phy-uclass.c b/drivers/phy/phy-uclass.c index 6ab7844..1fded5e 100644 --- a/drivers/phy/phy-uclass.c +++ b/drivers/phy/phy-uclass.c @@ -32,7 +32,7 @@ static int generic_phy_xlate_offs_flags(struct phy *phy, return 0; } -int generic_phy_get_by_node(ofnode node, int index, struct phy *phy) +int generic_phy_get_by_index_nodev(ofnode node, int index, struct phy *phy) { struct ofnode_phandle_args args; struct phy_ops *ops; @@ -94,7 +94,7 @@ err: int generic_phy_get_by_index(struct udevice *dev, int index, struct phy *phy) { - return generic_phy_get_by_node(dev_ofnode(dev), index, phy); + return generic_phy_get_by_index_nodev(dev_ofnode(dev), index, phy); } int generic_phy_get_by_name(struct udevice *dev, const char *phy_name, -- cgit v1.1 From 28029c768c4761d10815f94cafbbdc86272f1d8d Mon Sep 17 00:00:00 2001 From: Kuldeep Singh Date: Mon, 27 Apr 2020 12:38:51 +0530 Subject: spi: nxp-fspi: Use new readl_poll_sleep_timeout API Board gets reset when performing burst read/write operations. On the other hand, no such behaviour is observed on small size operations. In Linux, readl_poll_timeout API already adds delay of 1us which is further skipped in U-boot. Hence, use new "readl_poll_sleep_timeout" API which adds delay alongwith timeout functionality. Signed-off-by: Kuldeep Singh --- drivers/spi/nxp_fspi.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) (limited to 'drivers') diff --git a/drivers/spi/nxp_fspi.c b/drivers/spi/nxp_fspi.c index 0e6c7be..22a5c0e 100644 --- a/drivers/spi/nxp_fspi.c +++ b/drivers/spi/nxp_fspi.c @@ -421,7 +421,7 @@ static bool nxp_fspi_supports_op(struct spi_slave *slave, return true; } -/* Instead of busy looping invoke readl_poll_timeout functionality. */ +/* Instead of busy looping invoke readl_poll_sleep_timeout functionality. */ static int fspi_readl_poll_tout(struct nxp_fspi *f, void __iomem *base, u32 mask, u32 delay_us, u32 timeout_us, bool c) @@ -432,11 +432,11 @@ static int fspi_readl_poll_tout(struct nxp_fspi *f, void __iomem *base, mask = (u32)cpu_to_be32(mask); if (c) - return readl_poll_timeout(base, reg, (reg & mask), - timeout_us); + return readl_poll_sleep_timeout(base, reg, (reg & mask), + delay_us, timeout_us); else - return readl_poll_timeout(base, reg, !(reg & mask), - timeout_us); + return readl_poll_sleep_timeout(base, reg, !(reg & mask), + delay_us, timeout_us); } /* -- cgit v1.1 From 1fbfe58df62276910bb5624aa107415fd069f824 Mon Sep 17 00:00:00 2001 From: Dario Binacchi Date: Sat, 2 May 2020 17:45:50 +0200 Subject: spi: fix dev parameter in dev_* calls Probably the non-use of the device parameter by the print routines did not generate compilation errors. Signed-off-by: Dario Binacchi --- drivers/mtd/spi/spi-nor-core.c | 19 +++++++++++-------- 1 file changed, 11 insertions(+), 8 deletions(-) (limited to 'drivers') diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c index e840c60..3d43614 100644 --- a/drivers/mtd/spi/spi-nor-core.c +++ b/drivers/mtd/spi/spi-nor-core.c @@ -56,8 +56,7 @@ static int spi_nor_read_reg(struct spi_nor *nor, u8 code, u8 *val, int len) ret = spi_nor_read_write_reg(nor, &op, val); if (ret < 0) - dev_dbg(&flash->spimem->spi->dev, "error %d reading %x\n", ret, - code); + dev_dbg(nor->dev, "error %d reading %x\n", ret, code); return ret; } @@ -1374,7 +1373,8 @@ static int spansion_read_cr_quad_enable(struct spi_nor *nor) /* Check current Quad Enable bit value. */ ret = read_cr(nor); if (ret < 0) { - dev_dbg(dev, "error while reading configuration register\n"); + dev_dbg(nor->dev, + "error while reading configuration register\n"); return -EINVAL; } @@ -1386,7 +1386,7 @@ static int spansion_read_cr_quad_enable(struct spi_nor *nor) /* Keep the current value of the Status Register. */ ret = read_sr(nor); if (ret < 0) { - dev_dbg(dev, "error while reading status register\n"); + dev_dbg(nor->dev, "error while reading status register\n"); return -EINVAL; } sr_cr[0] = ret; @@ -2069,7 +2069,8 @@ static int spi_nor_parse_sfdp(struct spi_nor *nor, err = spi_nor_read_sfdp(nor, sizeof(header), psize, param_headers); if (err < 0) { - dev_err(dev, "failed to read SFDP parameter headers\n"); + dev_err(nor->dev, + "failed to read SFDP parameter headers\n"); goto exit; } } @@ -2099,7 +2100,8 @@ static int spi_nor_parse_sfdp(struct spi_nor *nor, switch (SFDP_PARAM_HEADER_ID(param_header)) { case SFDP_SECTOR_MAP_ID: - dev_info(dev, "non-uniform erase sector maps are not supported yet.\n"); + dev_info(nor->dev, + "non-uniform erase sector maps are not supported yet.\n"); break; case SFDP_SST_ID: @@ -2111,7 +2113,8 @@ static int spi_nor_parse_sfdp(struct spi_nor *nor, } if (err) { - dev_warn(dev, "Failed to parse optional parameter table: %04x\n", + dev_warn(nor->dev, + "Failed to parse optional parameter table: %04x\n", SFDP_PARAM_HEADER_ID(param_header)); /* * Let's not drop all information we extracted so far @@ -2609,7 +2612,7 @@ int spi_nor_scan(struct spi_nor *nor) } if (nor->addr_width > SPI_NOR_MAX_ADDR_WIDTH) { - dev_dbg(dev, "address width is too large: %u\n", + dev_dbg(nor->dev, "address width is too large: %u\n", nor->addr_width); return -EINVAL; } -- cgit v1.1 From 8af1caa23728ef689d095eec1ec4e6f1d46f50e4 Mon Sep 17 00:00:00 2001 From: Ye Li Date: Sun, 3 May 2020 21:02:56 +0800 Subject: sf: Add Macronix MX25R6435F SPI NOR flash to flash parameters array On i.mx7ulp EVK board, we use MX25R6435F NOR flash, add its parameters and IDs to flash parameter array. Otherwise, the flash probe will fails. Signed-off-by: Ye Li Signed-off-by: Peng Fan --- drivers/mtd/spi/spi-nor-ids.c | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers') diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c index e5e7102..114ebac 100644 --- a/drivers/mtd/spi/spi-nor-ids.c +++ b/drivers/mtd/spi/spi-nor-ids.c @@ -160,6 +160,7 @@ const struct flash_info spi_nor_ids[] = { { INFO("mx66u2g45g", 0xc2253c, 0, 64 * 1024, 4096, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) }, { INFO("mx66l1g45g", 0xc2201b, 0, 64 * 1024, 2048, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, { INFO("mx25l1633e", 0xc22415, 0, 64 * 1024, 32, SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES | SECT_4K) }, + { INFO("mx25r6435f", 0xc22817, 0, 64 * 1024, 128, SECT_4K) }, #endif #ifdef CONFIG_SPI_FLASH_STMICRO /* STMICRO */ -- cgit v1.1