From 829b41171b181e083fc984b72bb8acb31c1fb952 Mon Sep 17 00:00:00 2001 From: Neal Liu Date: Tue, 15 Feb 2022 18:14:40 +0800 Subject: crypto: aspeed: fix polling RSA status wrong issue Check interrupt status to see if RSA engine is completed. After completion of the task, write-clear the status to finish operation. Add missing register base for completion. Fixes: 89c36cca0b6 ("crypto: aspeed: Add AST2600 ACRY support") Signed-off-by: Neal Liu Reviewed-by: Chia-Wei Wang --- drivers/crypto/aspeed/aspeed_acry.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/crypto/aspeed/aspeed_acry.c b/drivers/crypto/aspeed/aspeed_acry.c index c28cdf3..47a007f 100644 --- a/drivers/crypto/aspeed/aspeed_acry.c +++ b/drivers/crypto/aspeed/aspeed_acry.c @@ -103,7 +103,7 @@ static int aspeed_acry_mod_exp(struct udevice *dev, const uint8_t *sig, uint32_t while (1) { reg = readl(acry->base + ACRY_RSA_INT_STS); if ((reg & ACRY_RSA_INT_STS_RSA_READY) && (reg & ACRY_RSA_INT_STS_RSA_CMPLT)) { - writel(reg, ACRY_RSA_INT_STS); + writel(reg, acry->base + ACRY_RSA_INT_STS); break; } udelay(20); -- cgit v1.1