From cc4d1226585fa2544b5116702b02eacbb7aa48a1 Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Thu, 18 Mar 2010 15:51:05 -0500 Subject: fsl_esdhc: Always stop clock before changing frequency We need to stop the clocks on 83xx/85xx as well as imx. No need to make this code conditional to just imx. Signed-off-by: Kumar Gala Acked-by: Stefano Babic --- drivers/mmc/fsl_esdhc.c | 11 +++-------- 1 file changed, 3 insertions(+), 8 deletions(-) (limited to 'drivers') diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c index e665b5e..85354e8 100644 --- a/drivers/mmc/fsl_esdhc.c +++ b/drivers/mmc/fsl_esdhc.c @@ -1,5 +1,5 @@ /* - * Copyright 2007, Freescale Semiconductor, Inc + * Copyright 2007,2010 Freescale Semiconductor, Inc * Andy Fleming * * Based vaguely on the pxa mmc code: @@ -265,18 +265,13 @@ void set_sysctl(struct mmc *mmc, uint clock) clk = (pre_div << 8) | (div << 4); - /* On imx the clock must be stopped before changing frequency */ - if (cfg->clk_enable) - esdhc_clrbits32(®s->sysctl, SYSCTL_CKEN); + esdhc_clrbits32(®s->sysctl, SYSCTL_CKEN); esdhc_clrsetbits32(®s->sysctl, SYSCTL_CLOCK_MASK, clk); udelay(10000); - clk = SYSCTL_PEREN; - /* On imx systems the clock must be explicitely enabled */ - if (cfg->clk_enable) - clk |= SYSCTL_CKEN; + clk = SYSCTL_PEREN | SYSCTL_CKEN; esdhc_setbits32(®s->sysctl, clk); } -- cgit v1.1 From 48bb3bb5ac4dd21e931ae157caad6449bcb2d0d4 Mon Sep 17 00:00:00 2001 From: Jerry Huang Date: Thu, 18 Mar 2010 15:57:06 -0500 Subject: fsl_esdhc: Add function to reset the eSDHC controller To support multiple block read command we must set abort or use auto CMD12. If we booted from eSDHC controller neither of these are used and thus we need to reset the controller to allow multiple block read to function. Signed-off-by: Jerry Huang Signed-off-by: Roy Zang Acked-by: Stefano Babic Signed-off-by: Kumar Gala --- drivers/mmc/fsl_esdhc.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) (limited to 'drivers') diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c index 85354e8..999b581 100644 --- a/drivers/mmc/fsl_esdhc.c +++ b/drivers/mmc/fsl_esdhc.c @@ -344,6 +344,20 @@ static int esdhc_init(struct mmc *mmc) return ret; } +static void esdhc_reset(struct fsl_esdhc *regs) +{ + unsigned long timeout = 100; /* wait max 100 ms */ + + /* reset the controller */ + esdhc_write32(®s->sysctl, SYSCTL_RSTA); + + /* hardware clears the bit when it is done */ + while ((esdhc_read32(®s->sysctl) & SYSCTL_RSTA) && --timeout) + udelay(1000); + if (!timeout) + printf("MMC/SD: Reset never completed.\n"); +} + int fsl_esdhc_initialize(bd_t *bis, struct fsl_esdhc_cfg *cfg) { struct fsl_esdhc *regs; @@ -358,6 +372,9 @@ int fsl_esdhc_initialize(bd_t *bis, struct fsl_esdhc_cfg *cfg) sprintf(mmc->name, "FSL_ESDHC"); regs = (struct fsl_esdhc *)cfg->esdhc_base; + /* First reset the eSDHC controller */ + esdhc_reset(regs); + mmc->priv = cfg; mmc->send_cmd = esdhc_send_cmd; mmc->set_ios = esdhc_set_ios; -- cgit v1.1 From ab467c512e79dbd14f02352655f054a4304c457e Mon Sep 17 00:00:00 2001 From: Roy Zang Date: Tue, 9 Feb 2010 18:23:33 +0800 Subject: fsl_esdhc: Only modify the field we are changing in WML When we set the read or write watermark in WML we should maintain the rest of the register as is, rather than using some hard coded value. Signed-off-by: Roy Zang Acked-by: Stefano Babic Signed-off-by: Kumar Gala --- drivers/mmc/fsl_esdhc.c | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) (limited to 'drivers') diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c index 999b581..0f6f8b1 100644 --- a/drivers/mmc/fsl_esdhc.c +++ b/drivers/mmc/fsl_esdhc.c @@ -110,8 +110,7 @@ static int esdhc_setup_data(struct mmc *mmc, struct mmc_data *data) if (wml_value > 0x10) wml_value = 0x10; - wml_value = 0x100000 | wml_value; - + esdhc_clrsetbits32(®s->wml, WML_RD_WML_MASK, wml_value); esdhc_write32(®s->dsaddr, (u32)data->dest); } else { if (wml_value > 0x80) @@ -120,12 +119,12 @@ static int esdhc_setup_data(struct mmc *mmc, struct mmc_data *data) printf("\nThe SD card is locked. Can not write to a locked card.\n\n"); return TIMEOUT; } - wml_value = wml_value << 16 | 0x10; + + esdhc_clrsetbits32(®s->wml, WML_WR_WML_MASK, + wml_value << 16); esdhc_write32(®s->dsaddr, (u32)data->src); } - esdhc_write32(®s->wml, wml_value); - esdhc_write32(®s->blkattr, data->blocks << 16 | data->blocksize); /* Calculate the timeout period for data transactions */ -- cgit v1.1 From 5a85a3096940b0a0cd016c8acf4944421c64f8c7 Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Tue, 30 Mar 2010 10:07:12 -0500 Subject: ppc/8xxx: Delete PCI nodes from device tree if not configured If the PCI controller wasn't configured or enabled delete from the device tree (include its alias). For the case that we didn't even configure u-boot with knowledge of the controller we can use the fact that the pci_controller pointer is NULL to delete the node in the device tree. We determine that a controller was not setup (because of HW config) based on the fact that cfg_addr wasn't setup. Signed-off-by: Kumar Gala --- drivers/pci/fsl_pci_init.c | 18 ++++++++++++------ 1 file changed, 12 insertions(+), 6 deletions(-) (limited to 'drivers') diff --git a/drivers/pci/fsl_pci_init.c b/drivers/pci/fsl_pci_init.c index fe57926d..5a63fa2 100644 --- a/drivers/pci/fsl_pci_init.c +++ b/drivers/pci/fsl_pci_init.c @@ -1,9 +1,10 @@ /* - * Copyright 2007-2009 Freescale Semiconductor, Inc. + * Copyright 2007-2010 Freescale Semiconductor, Inc. * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * Version 2 as published by the Free Software Foundation. + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the Free + * Software Foundation; either version 2 of the License, or (at your option) + * any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of @@ -513,10 +514,15 @@ void ft_fsl_pci_setup(void *blob, const char *pci_alias, struct pci_controller *hose) { int off = fdt_path_offset(blob, pci_alias); + u32 bus_range[2]; - if (off >= 0) { - u32 bus_range[2]; + if (off < 0) + return; + /* We assume a cfg_addr not being set means we didn't setup the controller */ + if ((hose == NULL) || (hose->cfg_addr == NULL)) { + fdt_del_node_and_alias(blob, pci_alias); + } else { bus_range[0] = 0; bus_range[1] = hose->last_busno - hose->first_busno; fdt_setprop(blob, off, "bus-range", &bus_range[0], 2*4); -- cgit v1.1 From 216082754f6da5359ea0db9b0cc03ad531ac6e45 Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Tue, 30 Mar 2010 23:06:53 -0500 Subject: 85xx: Added various P1012/P1013/P1021/P1022 defines There are various locations that we have chip specific info: * Makefile for which ddr code to build * Added P1012/P1013/P1021/P1022 to cpu_type_list and SVR list * Added number of LAWs for P1012/P1013/P1021/P1022 * Set CONFIG_MAX_CPUS to 2 for P1021/P1022 * PCI port config Signed-off-by: Haiying Wang Signed-off-by: Srikanth Srinivasan Signed-off-by: Kumar Gala --- drivers/misc/fsl_law.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/misc/fsl_law.c b/drivers/misc/fsl_law.c index 287e555..8255175 100644 --- a/drivers/misc/fsl_law.c +++ b/drivers/misc/fsl_law.c @@ -1,5 +1,5 @@ /* - * Copyright 2008-2009 Freescale Semiconductor, Inc. + * Copyright 2008-2010 Freescale Semiconductor, Inc. * * (C) Copyright 2000 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. @@ -39,6 +39,8 @@ DECLARE_GLOBAL_DATA_PTR; #define FSL_HW_NUM_LAWS 10 #elif defined(CONFIG_MPC8536) || defined(CONFIG_MPC8572) || \ defined(CONFIG_P1011) || defined(CONFIG_P1020) || \ + defined(CONFIG_P1012) || defined(CONFIG_P1021) || \ + defined(CONFIG_P1013) || defined(CONFIG_P1022) || \ defined(CONFIG_P2010) || defined(CONFIG_P2020) #define FSL_HW_NUM_LAWS 12 #elif defined(CONFIG_PPC_P4080) -- cgit v1.1