From ed47278e0be428057b8da116b2b06f7e8f0b68c6 Mon Sep 17 00:00:00 2001 From: Neil Armstrong Date: Wed, 30 Sep 2020 11:52:49 +0200 Subject: power: domain: meson-ee-pwrc: add support for the Meson GX SoCs This syncs with the linux meson-ee-pwrc driver from Linux 5.10-rc1. Signed-off-by: Neil Armstrong --- drivers/power/domain/meson-ee-pwrc.c | 26 ++++++++++++++++++++++++-- 1 file changed, 24 insertions(+), 2 deletions(-) (limited to 'drivers') diff --git a/drivers/power/domain/meson-ee-pwrc.c b/drivers/power/domain/meson-ee-pwrc.c index 8349a9c..dfedddd 100644 --- a/drivers/power/domain/meson-ee-pwrc.c +++ b/drivers/power/domain/meson-ee-pwrc.c @@ -14,6 +14,7 @@ #include #include #include +#include #include #include #include @@ -68,7 +69,7 @@ struct meson_ee_pwrc_domain_data { /* TOP Power Domains */ -static struct meson_ee_pwrc_top_domain g12a_pwrc_vpu = { +static struct meson_ee_pwrc_top_domain gx_pwrc_vpu = { .sleep_reg = AO_RTI_GEN_PWR_SLEEP0, .sleep_mask = BIT(8), .iso_reg = AO_RTI_GEN_PWR_SLEEP0, @@ -126,6 +127,12 @@ static struct meson_ee_pwrc_mem_domain g12a_pwrc_mem_vpu[] = { VPU_HHI_MEMPD(HHI_MEM_PD_REG0), }; +static struct meson_ee_pwrc_mem_domain gxbb_pwrc_mem_vpu[] = { + VPU_MEMPD(HHI_VPU_MEM_PD_REG0), + VPU_MEMPD(HHI_VPU_MEM_PD_REG1), + VPU_HHI_MEMPD(HHI_MEM_PD_REG0), +}; + static struct meson_ee_pwrc_mem_domain g12a_pwrc_mem_eth[] = { { HHI_MEM_PD_REG0, GENMASK(3, 2) }, }; @@ -201,11 +208,17 @@ static struct meson_ee_pwrc_mem_domain sm1_pwrc_mem_audio[] = { static bool pwrc_ee_get_power(struct power_domain *power_domain); static struct meson_ee_pwrc_domain_desc g12a_pwrc_domains[] = { - [PWRC_G12A_VPU_ID] = VPU_PD("VPU", &g12a_pwrc_vpu, g12a_pwrc_mem_vpu, + [PWRC_G12A_VPU_ID] = VPU_PD("VPU", &gx_pwrc_vpu, g12a_pwrc_mem_vpu, pwrc_ee_get_power, 11, 2), [PWRC_G12A_ETH_ID] = MEM_PD("ETH", g12a_pwrc_mem_eth), }; +static struct meson_ee_pwrc_domain_desc gxbb_pwrc_domains[] = { + [PWRC_GXBB_VPU_ID] = VPU_PD("VPU", &gx_pwrc_vpu, gxbb_pwrc_mem_vpu, + pwrc_ee_get_power, 12, 2), + [PWRC_GXBB_ETHERNET_MEM_ID] = MEM_PD("ETH", g12a_pwrc_mem_eth), +}; + static struct meson_ee_pwrc_domain_desc sm1_pwrc_domains[] = { [PWRC_SM1_VPU_ID] = VPU_PD("VPU", &sm1_pwrc_vpu, sm1_pwrc_mem_vpu, pwrc_ee_get_power, 11, 2), @@ -369,6 +382,11 @@ static struct meson_ee_pwrc_domain_data meson_ee_g12a_pwrc_data = { .domains = g12a_pwrc_domains, }; +static struct meson_ee_pwrc_domain_data meson_ee_gxbb_pwrc_data = { + .count = ARRAY_SIZE(gxbb_pwrc_domains), + .domains = gxbb_pwrc_domains, +}; + static struct meson_ee_pwrc_domain_data meson_ee_sm1_pwrc_data = { .count = ARRAY_SIZE(sm1_pwrc_domains), .domains = sm1_pwrc_domains, @@ -380,6 +398,10 @@ static const struct udevice_id meson_ee_pwrc_ids[] = { .data = (unsigned long)&meson_ee_g12a_pwrc_data, }, { + .compatible = "amlogic,meson-gxbb-pwrc", + .data = (unsigned long)&meson_ee_gxbb_pwrc_data, + }, + { .compatible = "amlogic,meson-sm1-pwrc", .data = (unsigned long)&meson_ee_sm1_pwrc_data, }, -- cgit v1.1 From e0d0f7e422379384001d4654e86c98d56d738ee8 Mon Sep 17 00:00:00 2001 From: Neil Armstrong Date: Wed, 30 Sep 2020 11:55:50 +0200 Subject: power: domain: meson-ee-pwrc: add support for the Meson AXG SoCs This syncs with the linux meson-ee-pwrc driver from Linux 5.10-rc1. Signed-off-by: Neil Armstrong --- drivers/power/domain/meson-ee-pwrc.c | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) (limited to 'drivers') diff --git a/drivers/power/domain/meson-ee-pwrc.c b/drivers/power/domain/meson-ee-pwrc.c index dfedddd..fa1ee93 100644 --- a/drivers/power/domain/meson-ee-pwrc.c +++ b/drivers/power/domain/meson-ee-pwrc.c @@ -13,6 +13,7 @@ #include #include #include +#include #include #include #include @@ -127,6 +128,11 @@ static struct meson_ee_pwrc_mem_domain g12a_pwrc_mem_vpu[] = { VPU_HHI_MEMPD(HHI_MEM_PD_REG0), }; +static struct meson_ee_pwrc_mem_domain axg_pwrc_mem_vpu[] = { + VPU_MEMPD(HHI_VPU_MEM_PD_REG0), + VPU_HHI_MEMPD(HHI_MEM_PD_REG0), +}; + static struct meson_ee_pwrc_mem_domain gxbb_pwrc_mem_vpu[] = { VPU_MEMPD(HHI_VPU_MEM_PD_REG0), VPU_MEMPD(HHI_VPU_MEM_PD_REG1), @@ -166,6 +172,10 @@ static struct meson_ee_pwrc_mem_domain sm1_pwrc_mem_ge2d[] = { { HHI_MEM_PD_REG0, GENMASK(25, 18) }, }; +static struct meson_ee_pwrc_mem_domain axg_pwrc_mem_audio[] = { + { HHI_MEM_PD_REG0, GENMASK(5, 4) }, +}; + static struct meson_ee_pwrc_mem_domain sm1_pwrc_mem_audio[] = { { HHI_MEM_PD_REG0, GENMASK(5, 4) }, { HHI_AUDIO_MEM_PD_REG0, GENMASK(1, 0) }, @@ -213,6 +223,13 @@ static struct meson_ee_pwrc_domain_desc g12a_pwrc_domains[] = { [PWRC_G12A_ETH_ID] = MEM_PD("ETH", g12a_pwrc_mem_eth), }; +static struct meson_ee_pwrc_domain_desc axg_pwrc_domains[] = { + [PWRC_AXG_VPU_ID] = VPU_PD("VPU", &gx_pwrc_vpu, axg_pwrc_mem_vpu, + pwrc_ee_get_power, 5, 2), + [PWRC_AXG_ETHERNET_MEM_ID] = MEM_PD("ETH", g12a_pwrc_mem_eth), + [PWRC_AXG_AUDIO_ID] = MEM_PD("AUDIO", axg_pwrc_mem_audio), +}; + static struct meson_ee_pwrc_domain_desc gxbb_pwrc_domains[] = { [PWRC_GXBB_VPU_ID] = VPU_PD("VPU", &gx_pwrc_vpu, gxbb_pwrc_mem_vpu, pwrc_ee_get_power, 12, 2), @@ -382,6 +399,11 @@ static struct meson_ee_pwrc_domain_data meson_ee_g12a_pwrc_data = { .domains = g12a_pwrc_domains, }; +static struct meson_ee_pwrc_domain_data meson_ee_axg_pwrc_data = { + .count = ARRAY_SIZE(axg_pwrc_domains), + .domains = axg_pwrc_domains, +}; + static struct meson_ee_pwrc_domain_data meson_ee_gxbb_pwrc_data = { .count = ARRAY_SIZE(gxbb_pwrc_domains), .domains = gxbb_pwrc_domains, @@ -402,6 +424,10 @@ static const struct udevice_id meson_ee_pwrc_ids[] = { .data = (unsigned long)&meson_ee_gxbb_pwrc_data, }, { + .compatible = "amlogic,meson-axg-pwrc", + .data = (unsigned long)&meson_ee_axg_pwrc_data, + }, + { .compatible = "amlogic,meson-sm1-pwrc", .data = (unsigned long)&meson_ee_sm1_pwrc_data, }, -- cgit v1.1 From c823f2438cc9ad4ed0fd8fb8088b86d1813ed98c Mon Sep 17 00:00:00 2001 From: Neil Armstrong Date: Tue, 29 Sep 2020 11:53:53 +0200 Subject: video: add TDO tl070wsh30 panel driver MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This adds support for the TDO TL070WSH30 TFT-LCD panel module. The panel has a 1024×600 resolution and uses 24 bit RGB per pixel. It provides a MIPI DSI interface to the host, a built-in LED backlight and touch controller. Signed-off-by: Neil Armstrong --- drivers/video/Kconfig | 9 +++ drivers/video/Makefile | 1 + drivers/video/tdo-tl070wsh30.c | 155 +++++++++++++++++++++++++++++++++++++++++ 3 files changed, 165 insertions(+) create mode 100644 drivers/video/tdo-tl070wsh30.c (limited to 'drivers') diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig index 998271b..9fef1a6 100644 --- a/drivers/video/Kconfig +++ b/drivers/video/Kconfig @@ -449,6 +449,15 @@ config VIDEO_LCD_SSD2828_RESET The reset pin of SSD2828 chip. This takes a string in the format understood by 'name_to_gpio' function, e.g. PH1 for pin 1 of port H. +config VIDEO_LCD_TDO_TL070WSH30 + bool "TDO TL070WSH30 DSI LCD panel support" + depends on DM_VIDEO + select VIDEO_MIPI_DSI + default n + help + Say Y here if you want to enable support for TDO TL070WSH30 + 1024x600 DSI video mode panel. + config VIDEO_LCD_HITACHI_TX18D42VM bool "Hitachi tx18d42vm LVDS LCD panel support" depends on VIDEO diff --git a/drivers/video/Makefile b/drivers/video/Makefile index 67a492a..6499013 100644 --- a/drivers/video/Makefile +++ b/drivers/video/Makefile @@ -56,6 +56,7 @@ obj-$(CONFIG_VIDEO_LCD_HITACHI_TX18D42VM) += hitachi_tx18d42vm_lcd.o obj-$(CONFIG_VIDEO_LCD_ORISETECH_OTM8009A) += orisetech_otm8009a.o obj-$(CONFIG_VIDEO_LCD_RAYDIUM_RM68200) += raydium-rm68200.o obj-$(CONFIG_VIDEO_LCD_SSD2828) += ssd2828.o +obj-$(CONFIG_VIDEO_LCD_TDO_TL070WSH30) += tdo-tl070wsh30.o obj-$(CONFIG_VIDEO_MB862xx) += mb862xx.o videomodes.o obj-${CONFIG_VIDEO_MESON} += meson/ obj-${CONFIG_VIDEO_MIPI_DSI} += mipi_dsi.o diff --git a/drivers/video/tdo-tl070wsh30.c b/drivers/video/tdo-tl070wsh30.c new file mode 100644 index 0000000..ae9d11f --- /dev/null +++ b/drivers/video/tdo-tl070wsh30.c @@ -0,0 +1,155 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2020 BayLibre, SAS + * Author: Neil Armstrong + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include + +struct tl070wsh30_panel_priv { + struct udevice *reg; + struct udevice *backlight; + struct gpio_desc reset; +}; + +static const struct display_timing default_timing = { + .pixelclock.typ = 47250000, + .hactive.typ = 1024, + .hfront_porch.typ = 46, + .hback_porch.typ = 100, + .hsync_len.typ = 80, + .vactive.typ = 600, + .vfront_porch.typ = 5, + .vback_porch.typ = 20, + .vsync_len.typ = 5, + .flags = DISPLAY_FLAGS_HSYNC_HIGH | DISPLAY_FLAGS_VSYNC_HIGH, +}; + +static int tl070wsh30_panel_enable_backlight(struct udevice *dev) +{ + struct mipi_dsi_panel_plat *plat = dev_get_platdata(dev); + struct mipi_dsi_device *device = plat->device; + struct tl070wsh30_panel_priv *priv = dev_get_priv(dev); + int ret; + + ret = mipi_dsi_attach(device); + if (ret < 0) + return ret; + + ret = mipi_dsi_dcs_exit_sleep_mode(device); + if (ret) + return ret; + + mdelay(200); + + ret = mipi_dsi_dcs_set_display_on(device); + if (ret) + return ret; + + mdelay(20); + + ret = backlight_enable(priv->backlight); + if (ret) + return ret; + + return 0; +} + +static int tl070wsh30_panel_get_display_timing(struct udevice *dev, + struct display_timing *timings) +{ + memcpy(timings, &default_timing, sizeof(*timings)); + + return 0; +} + +static int tl070wsh30_panel_ofdata_to_platdata(struct udevice *dev) +{ + struct tl070wsh30_panel_priv *priv = dev_get_priv(dev); + int ret; + + if (IS_ENABLED(CONFIG_DM_REGULATOR)) { + ret = device_get_supply_regulator(dev, "power-supply", + &priv->reg); + if (ret && ret != -ENOENT) { + dev_err(dev, "Warning: cannot get power supply\n"); + return ret; + } + } + + ret = gpio_request_by_name(dev, "reset-gpios", 0, &priv->reset, + GPIOD_IS_OUT); + if (ret) { + dev_err(dev, "Warning: cannot get reset GPIO\n"); + if (ret != -ENOENT) + return ret; + } + + ret = uclass_get_device_by_phandle(UCLASS_PANEL_BACKLIGHT, dev, + "backlight", &priv->backlight); + if (ret) { + dev_err(dev, "Cannot get backlight: ret=%d\n", ret); + return ret; + } + + return 0; +} + +static int tl070wsh30_panel_probe(struct udevice *dev) +{ + struct tl070wsh30_panel_priv *priv = dev_get_priv(dev); + struct mipi_dsi_panel_plat *plat = dev_get_platdata(dev); + int ret; + + if (IS_ENABLED(CONFIG_DM_REGULATOR) && priv->reg) { + ret = regulator_set_enable(priv->reg, true); + if (ret) + return ret; + } + + mdelay(10); + + /* reset panel */ + dm_gpio_set_value(&priv->reset, true); + + mdelay(10); + + dm_gpio_set_value(&priv->reset, false); + + /* fill characteristics of DSI data link */ + plat->lanes = 4; + plat->format = MIPI_DSI_FMT_RGB888; + plat->mode_flags = MIPI_DSI_MODE_VIDEO | + MIPI_DSI_MODE_VIDEO_BURST | + MIPI_DSI_MODE_LPM; + + return 0; +} + +static const struct panel_ops tl070wsh30_panel_ops = { + .enable_backlight = tl070wsh30_panel_enable_backlight, + .get_display_timing = tl070wsh30_panel_get_display_timing, +}; + +static const struct udevice_id tl070wsh30_panel_ids[] = { + { .compatible = "tdo,tl070wsh30" }, + { } +}; + +U_BOOT_DRIVER(tl070wsh30_panel) = { + .name = "tl070wsh30_panel", + .id = UCLASS_PANEL, + .of_match = tl070wsh30_panel_ids, + .ops = &tl070wsh30_panel_ops, + .ofdata_to_platdata = tl070wsh30_panel_ofdata_to_platdata, + .probe = tl070wsh30_panel_probe, + .platdata_auto_alloc_size = sizeof(struct mipi_dsi_panel_plat), + .priv_auto_alloc_size = sizeof(struct tl070wsh30_panel_priv), +}; -- cgit v1.1 From 86eede9fcebf8918ddc6da98e7250abca50472b5 Mon Sep 17 00:00:00 2001 From: Marek Szyprowski Date: Wed, 16 Dec 2020 08:51:53 +0100 Subject: clk: meson: add minimal driver for g12a-ao clocks Add minimal driver AO clocks on meson G12A family. Only ADC related clocks are supported. Signed-off-by: Marek Szyprowski Reviewed-by: Neil Armstrong Tested-by: Jaehoon Chung Reviewed-by: Jaehoon Chung Signed-off-by: Neil Armstrong --- drivers/clk/meson/Makefile | 1 + drivers/clk/meson/g12a-ao.c | 83 +++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 84 insertions(+) create mode 100644 drivers/clk/meson/g12a-ao.c (limited to 'drivers') diff --git a/drivers/clk/meson/Makefile b/drivers/clk/meson/Makefile index c873d69..7204383 100644 --- a/drivers/clk/meson/Makefile +++ b/drivers/clk/meson/Makefile @@ -6,4 +6,5 @@ obj-$(CONFIG_CLK_MESON_GX) += gxbb.o obj-$(CONFIG_CLK_MESON_AXG) += axg.o obj-$(CONFIG_CLK_MESON_G12A) += g12a.o +obj-$(CONFIG_CLK_MESON_G12A) += g12a-ao.o diff --git a/drivers/clk/meson/g12a-ao.c b/drivers/clk/meson/g12a-ao.c new file mode 100644 index 0000000..7a0abea --- /dev/null +++ b/drivers/clk/meson/g12a-ao.c @@ -0,0 +1,83 @@ +// SPDX-License-Identifier: GPL-2.0+ + +#include +#include +#include +#include +#include +#include +#include +#include + +#include "clk_meson.h" + +struct meson_clk { + struct regmap *map; +}; + +#define AO_CLK_GATE0 0x4c +#define AO_SAR_CLK 0x90 + +static struct meson_gate gates[] = { + MESON_GATE(CLKID_AO_SAR_ADC, AO_CLK_GATE0, 8), + MESON_GATE(CLKID_AO_SAR_ADC_CLK, AO_SAR_CLK, 8), +}; + +static int meson_set_gate(struct clk *clk, bool on) +{ + struct meson_clk *priv = dev_get_priv(clk->dev); + struct meson_gate *gate; + + if (clk->id >= ARRAY_SIZE(gates)) + return -ENOENT; + + gate = &gates[clk->id]; + + if (gate->reg == 0) + return 0; + + regmap_update_bits(priv->map, gate->reg, + BIT(gate->bit), on ? BIT(gate->bit) : 0); + + return 0; +} + +static int meson_clk_enable(struct clk *clk) +{ + return meson_set_gate(clk, true); +} + +static int meson_clk_disable(struct clk *clk) +{ + return meson_set_gate(clk, false); +} + +static int meson_clk_probe(struct udevice *dev) +{ + struct meson_clk *priv = dev_get_priv(dev); + + priv->map = syscon_node_to_regmap(dev_get_parent(dev)->node); + if (IS_ERR(priv->map)) + return PTR_ERR(priv->map); + + return 0; +} + +static struct clk_ops meson_clk_ops = { + .disable = meson_clk_disable, + .enable = meson_clk_enable, +}; + +static const struct udevice_id meson_clk_ids[] = { + { .compatible = "amlogic,meson-g12a-aoclkc" }, + { } +}; + +U_BOOT_DRIVER(meson_clk_axg) = { + .name = "meson_clk_g12a_ao", + .id = UCLASS_CLK, + .of_match = meson_clk_ids, + .priv_auto_alloc_size = sizeof(struct meson_clk), + .ops = &meson_clk_ops, + .probe = meson_clk_probe, +}; -- cgit v1.1 From 220992bde8995b3de0d094cf2eb0545a031e7992 Mon Sep 17 00:00:00 2001 From: Marek Szyprowski Date: Wed, 16 Dec 2020 08:51:54 +0100 Subject: adc: meson-saradc: add G12A variant Add support for the SARADC variant found on the G12A SoCs family. Signed-off-by: Marek Szyprowski Reviewed-by: Neil Armstrong Tested-by: Jaehoon Chung Reviewed-by: Jaehoon Chung Signed-off-by: Neil Armstrong --- drivers/adc/meson-saradc.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'drivers') diff --git a/drivers/adc/meson-saradc.c b/drivers/adc/meson-saradc.c index 72b0cc4..998cef2 100644 --- a/drivers/adc/meson-saradc.c +++ b/drivers/adc/meson-saradc.c @@ -711,6 +711,8 @@ static const struct udevice_id meson_saradc_ids[] = { .data = (ulong)&gxl_saradc_data }, { .compatible = "amlogic,meson-gxm-saradc", .data = (ulong)&gxl_saradc_data }, + { .compatible = "amlogic,meson-g12a-saradc", + .data = (ulong)&gxl_saradc_data }, { } }; -- cgit v1.1 From 81b1c4759619777b55ad810cd89ccb421e02d33d Mon Sep 17 00:00:00 2001 From: Marek Szyprowski Date: Wed, 16 Dec 2020 08:51:55 +0100 Subject: adc: meson-saradc: skip hardware init only if ADC is enabled The driver skips hardware initialization if it is already configured by the earlier bootloader stage (BL30). Skip the initialization only if the hardware is really initialized and enabled. Signed-off-by: Marek Szyprowski Reviewed-by: Neil Armstrong Tested-by: Jaehoon Chung Reviewed-by: Jaehoon Chung Signed-off-by: Neil Armstrong --- drivers/adc/meson-saradc.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) (limited to 'drivers') diff --git a/drivers/adc/meson-saradc.c b/drivers/adc/meson-saradc.c index 998cef2..ce7ae99 100644 --- a/drivers/adc/meson-saradc.c +++ b/drivers/adc/meson-saradc.c @@ -512,8 +512,11 @@ static int meson_saradc_init(struct meson_saradc_priv *priv) * reading the temperature sensor. */ regmap_read(priv->regmap, MESON_SAR_ADC_REG3, ®val); - if (regval & MESON_SAR_ADC_REG3_BL30_INITIALIZED) - return 0; + if (regval & MESON_SAR_ADC_REG3_BL30_INITIALIZED) { + regmap_read(priv->regmap, MESON_SAR_ADC_REG3, ®val); + if (regval & MESON_SAR_ADC_REG3_ADC_EN) + return 0; + } meson_saradc_stop_sample_engine(priv); -- cgit v1.1 From d50b73643fb78b048ba1568486e2ff662ec10067 Mon Sep 17 00:00:00 2001 From: Heinrich Schuchardt Date: Sun, 27 Dec 2020 09:46:46 +0100 Subject: adc: meson-saradc: use correct printf code For printing unsigned int we have to use %u not %d. Signed-off-by: Heinrich Schuchardt Acked-by: Neil Armstrong Signed-off-by: Neil Armstrong --- drivers/adc/meson-saradc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/adc/meson-saradc.c b/drivers/adc/meson-saradc.c index ce7ae99..e7a8ff3 100644 --- a/drivers/adc/meson-saradc.c +++ b/drivers/adc/meson-saradc.c @@ -282,7 +282,7 @@ static int meson_saradc_read_raw_sample(struct meson_saradc_priv *priv, regmap_read(priv->regmap, MESON_SAR_ADC_FIFO_RD, ®val); fifo_chan = FIELD_GET(MESON_SAR_ADC_FIFO_RD_CHAN_ID_MASK, regval); if (fifo_chan != channel) { - printf("ADC FIFO entry belongs to channel %d instead of %d\n", + printf("ADC FIFO entry belongs to channel %u instead of %u\n", fifo_chan, channel); return -EINVAL; } -- cgit v1.1