From ea3310e8aafad1da72d9a5e60568d725cbdefdbd Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Tue, 14 Mar 2017 11:08:10 -0400 Subject: Blackfin: Remove The architecture is currently unmaintained, remove. Cc: Benjamin Matthews Cc: Chong Huang Cc: Dimitar Penev Cc: Haitao Zhang Cc: I-SYST Micromodule Cc: M.Hasewinkel (MHA) Cc: Marek Vasut Cc: Martin Strubel Cc: Peter Meerwald Cc: Sonic Zhang Cc: Valentin Yakovenkov Cc: Wojtek Skulski Cc: Wojtek Skulski Signed-off-by: Tom Rini --- drivers/usb/musb-new/musb_core.c | 9 +- drivers/usb/musb-new/musb_core.h | 33 +------ drivers/usb/musb-new/musb_dma.h | 11 --- drivers/usb/musb-new/musb_io.h | 28 +----- drivers/usb/musb-new/musb_regs.h | 191 --------------------------------------- drivers/usb/musb/Makefile | 1 - drivers/usb/musb/blackfin_usb.c | 172 ----------------------------------- drivers/usb/musb/blackfin_usb.h | 99 -------------------- drivers/usb/musb/musb_core.h | 27 ------ drivers/usb/musb/musb_hcd.c | 5 - 10 files changed, 4 insertions(+), 572 deletions(-) delete mode 100644 drivers/usb/musb/blackfin_usb.c delete mode 100644 drivers/usb/musb/blackfin_usb.h (limited to 'drivers/usb') diff --git a/drivers/usb/musb-new/musb_core.c b/drivers/usb/musb-new/musb_core.c index 84cb21b..79e118e 100644 --- a/drivers/usb/musb-new/musb_core.c +++ b/drivers/usb/musb-new/musb_core.c @@ -116,12 +116,9 @@ static inline struct musb *dev_to_musb(struct device *dev) { return dev_get_drvdata(dev); } -#endif /*-------------------------------------------------------------------------*/ -#ifndef __UBOOT__ -#ifndef CONFIG_BLACKFIN static int musb_ulpi_read(struct usb_phy *phy, u32 offset) { void __iomem *addr = phy->io_priv; @@ -203,10 +200,6 @@ out: return ret; } -#else -#define musb_ulpi_read NULL -#define musb_ulpi_write NULL -#endif static struct usb_phy_io_ops musb_ulpi_access = { .read = musb_ulpi_read, @@ -216,7 +209,7 @@ static struct usb_phy_io_ops musb_ulpi_access = { /*-------------------------------------------------------------------------*/ -#if !defined(CONFIG_USB_MUSB_TUSB6010) && !defined(CONFIG_USB_MUSB_BLACKFIN) +#if !defined(CONFIG_USB_MUSB_TUSB6010) /* * Load an endpoint's FIFO diff --git a/drivers/usb/musb-new/musb_core.h b/drivers/usb/musb-new/musb_core.h index 4ae0ae2..6394bb0 100644 --- a/drivers/usb/musb-new/musb_core.h +++ b/drivers/usb/musb-new/musb_core.h @@ -152,8 +152,7 @@ enum musb_g_ep0_state { */ #if defined(CONFIG_ARCH_DAVINCI) || defined(CONFIG_SOC_OMAP2430) \ - || defined(CONFIG_SOC_OMAP3430) || defined(CONFIG_BLACKFIN) \ - || defined(CONFIG_ARCH_OMAP4) + || defined(CONFIG_SOC_OMAP3430) || defined(CONFIG_ARCH_OMAP4) /* REVISIT indexed access seemed to * misbehave (on DaVinci) for at least peripheral IN ... */ @@ -455,34 +454,6 @@ static inline struct musb *gadget_to_musb(struct usb_gadget *g) return container_of(g, struct musb, g); } -#ifdef CONFIG_BLACKFIN -static inline int musb_read_fifosize(struct musb *musb, - struct musb_hw_ep *hw_ep, u8 epnum) -{ - musb->nr_endpoints++; - musb->epmask |= (1 << epnum); - - if (epnum < 5) { - hw_ep->max_packet_sz_tx = 128; - hw_ep->max_packet_sz_rx = 128; - } else { - hw_ep->max_packet_sz_tx = 1024; - hw_ep->max_packet_sz_rx = 1024; - } - hw_ep->is_shared_fifo = false; - - return 0; -} - -static inline void musb_configure_ep0(struct musb *musb) -{ - musb->endpoints[0].max_packet_sz_tx = MUSB_EP0_FIFOSIZE; - musb->endpoints[0].max_packet_sz_rx = MUSB_EP0_FIFOSIZE; - musb->endpoints[0].is_shared_fifo = true; -} - -#else - static inline int musb_read_fifosize(struct musb *musb, struct musb_hw_ep *hw_ep, u8 epnum) { @@ -519,8 +490,6 @@ static inline void musb_configure_ep0(struct musb *musb) musb->endpoints[0].max_packet_sz_rx = MUSB_EP0_FIFOSIZE; musb->endpoints[0].is_shared_fifo = true; } -#endif /* CONFIG_BLACKFIN */ - /***************************** Glue it together *****************************/ diff --git a/drivers/usb/musb-new/musb_dma.h b/drivers/usb/musb-new/musb_dma.h index 30e39f5..c94abb8 100644 --- a/drivers/usb/musb-new/musb_dma.h +++ b/drivers/usb/musb-new/musb_dma.h @@ -56,17 +56,6 @@ struct musb_hw_ep; #define tusb_dma_omap() 0 #endif -/* Anomaly 05000456 - USB Receive Interrupt Is Not Generated in DMA Mode 1 - * Only allow DMA mode 1 to be used when the USB will actually generate the - * interrupts we expect. - */ -#ifdef CONFIG_BLACKFIN -# undef USE_MODE1 -# if !ANOMALY_05000456 -# define USE_MODE1 -# endif -#endif - /* * DMA channel status ... updated by the dma controller driver whenever that * status changes, and protected by the overall controller spinlock. diff --git a/drivers/usb/musb-new/musb_io.h b/drivers/usb/musb-new/musb_io.h index ea8efb3..7668212 100644 --- a/drivers/usb/musb-new/musb_io.h +++ b/drivers/usb/musb-new/musb_io.h @@ -23,8 +23,8 @@ #if !defined(CONFIG_ARM) && !defined(CONFIG_SUPERH) \ && !defined(CONFIG_AVR32) && !defined(CONFIG_PPC32) \ - && !defined(CONFIG_PPC64) && !defined(CONFIG_BLACKFIN) \ - && !defined(CONFIG_MIPS) && !defined(CONFIG_M68K) + && !defined(CONFIG_PPC64) && !defined(CONFIG_MIPS) \ + && !defined(CONFIG_M68K) static inline void readsl(const void __iomem *addr, void *buf, int len) { insl((unsigned long)addr, buf, len); } static inline void readsw(const void __iomem *addr, void *buf, int len) @@ -41,8 +41,6 @@ static inline void writesb(const void __iomem *addr, const void *buf, int len) #endif -#ifndef CONFIG_BLACKFIN - /* NOTE: these offsets are all in bytes */ static inline u16 musb_readw(const void __iomem *addr, unsigned offset) @@ -101,26 +99,4 @@ static inline void musb_writeb(void __iomem *addr, unsigned offset, u8 data) #endif /* CONFIG_USB_MUSB_TUSB6010 */ -#else - -static inline u8 musb_readb(const void __iomem *addr, unsigned offset) - { return (u8) (bfin_read16(addr + offset)); } - -static inline u16 musb_readw(const void __iomem *addr, unsigned offset) - { return bfin_read16(addr + offset); } - -static inline u32 musb_readl(const void __iomem *addr, unsigned offset) - { return (u32) (bfin_read16(addr + offset)); } - -static inline void musb_writeb(void __iomem *addr, unsigned offset, u8 data) - { bfin_write16(addr + offset, (u16) data); } - -static inline void musb_writew(void __iomem *addr, unsigned offset, u16 data) - { bfin_write16(addr + offset, data); } - -static inline void musb_writel(void __iomem *addr, unsigned offset, u32 data) - { bfin_write16(addr + offset, (u16) data); } - -#endif /* CONFIG_BLACKFIN */ - #endif diff --git a/drivers/usb/musb-new/musb_regs.h b/drivers/usb/musb-new/musb_regs.h index 0f18dd7..a3cc38e 100644 --- a/drivers/usb/musb-new/musb_regs.h +++ b/drivers/usb/musb-new/musb_regs.h @@ -190,8 +190,6 @@ #define MUSB_HUBADDR_MULTI_TT 0x80 -#ifndef CONFIG_BLACKFIN - /* SUNXI has different reg addresses, but identical r/w functions */ #ifndef CONFIG_ARCH_SUNXI @@ -526,193 +524,4 @@ static inline u8 musb_read_txhubport(void __iomem *mbase, u8 epnum) return musb_readb(mbase, MUSB_BUSCTL_OFFSET(epnum, MUSB_TXHUBPORT)); } -#else /* CONFIG_BLACKFIN */ - -#define USB_BASE USB_FADDR -#define USB_OFFSET(reg) (reg - USB_BASE) - -/* - * Common USB registers - */ -#define MUSB_FADDR USB_OFFSET(USB_FADDR) /* 8-bit */ -#define MUSB_POWER USB_OFFSET(USB_POWER) /* 8-bit */ -#define MUSB_INTRTX USB_OFFSET(USB_INTRTX) /* 16-bit */ -#define MUSB_INTRRX USB_OFFSET(USB_INTRRX) -#define MUSB_INTRTXE USB_OFFSET(USB_INTRTXE) -#define MUSB_INTRRXE USB_OFFSET(USB_INTRRXE) -#define MUSB_INTRUSB USB_OFFSET(USB_INTRUSB) /* 8 bit */ -#define MUSB_INTRUSBE USB_OFFSET(USB_INTRUSBE)/* 8 bit */ -#define MUSB_FRAME USB_OFFSET(USB_FRAME) -#define MUSB_INDEX USB_OFFSET(USB_INDEX) /* 8 bit */ -#define MUSB_TESTMODE USB_OFFSET(USB_TESTMODE)/* 8 bit */ - -/* Get offset for a given FIFO from musb->mregs */ -#define MUSB_FIFO_OFFSET(epnum) \ - (USB_OFFSET(USB_EP0_FIFO) + ((epnum) * 8)) - -/* - * Additional Control Registers - */ - -#define MUSB_DEVCTL USB_OFFSET(USB_OTG_DEV_CTL) /* 8 bit */ - -#define MUSB_LINKINFO USB_OFFSET(USB_LINKINFO)/* 8 bit */ -#define MUSB_VPLEN USB_OFFSET(USB_VPLEN) /* 8 bit */ -#define MUSB_HS_EOF1 USB_OFFSET(USB_HS_EOF1) /* 8 bit */ -#define MUSB_FS_EOF1 USB_OFFSET(USB_FS_EOF1) /* 8 bit */ -#define MUSB_LS_EOF1 USB_OFFSET(USB_LS_EOF1) /* 8 bit */ - -/* Offsets to endpoint registers */ -#define MUSB_TXMAXP 0x00 -#define MUSB_TXCSR 0x04 -#define MUSB_CSR0 MUSB_TXCSR /* Re-used for EP0 */ -#define MUSB_RXMAXP 0x08 -#define MUSB_RXCSR 0x0C -#define MUSB_RXCOUNT 0x10 -#define MUSB_COUNT0 MUSB_RXCOUNT /* Re-used for EP0 */ -#define MUSB_TXTYPE 0x14 -#define MUSB_TYPE0 MUSB_TXTYPE /* Re-used for EP0 */ -#define MUSB_TXINTERVAL 0x18 -#define MUSB_NAKLIMIT0 MUSB_TXINTERVAL /* Re-used for EP0 */ -#define MUSB_RXTYPE 0x1C -#define MUSB_RXINTERVAL 0x20 -#define MUSB_TXCOUNT 0x28 - -/* Offsets to endpoint registers in indexed model (using INDEX register) */ -#define MUSB_INDEXED_OFFSET(_epnum, _offset) \ - (0x40 + (_offset)) - -/* Offsets to endpoint registers in flat models */ -#define MUSB_FLAT_OFFSET(_epnum, _offset) \ - (USB_OFFSET(USB_EP_NI0_TXMAXP) + (0x40 * (_epnum)) + (_offset)) - -/* Not implemented - HW has separate Tx/Rx FIFO */ -#define MUSB_TXCSR_MODE 0x0000 - -static inline void musb_write_txfifosz(void __iomem *mbase, u8 c_size) -{ -} - -static inline void musb_write_txfifoadd(void __iomem *mbase, u16 c_off) -{ -} - -static inline void musb_write_rxfifosz(void __iomem *mbase, u8 c_size) -{ -} - -static inline void musb_write_rxfifoadd(void __iomem *mbase, u16 c_off) -{ -} - -static inline void musb_write_ulpi_buscontrol(void __iomem *mbase, u8 val) -{ -} - -static inline u8 musb_read_txfifosz(void __iomem *mbase) -{ - return 0; -} - -static inline u16 musb_read_txfifoadd(void __iomem *mbase) -{ - return 0; -} - -static inline u8 musb_read_rxfifosz(void __iomem *mbase) -{ - return 0; -} - -static inline u16 musb_read_rxfifoadd(void __iomem *mbase) -{ - return 0; -} - -static inline u8 musb_read_ulpi_buscontrol(void __iomem *mbase) -{ - return 0; -} - -static inline u8 musb_read_configdata(void __iomem *mbase) -{ - return 0; -} - -static inline u16 musb_read_hwvers(void __iomem *mbase) -{ - /* - * This register is invisible on Blackfin, actually the MUSB - * RTL version of Blackfin is 1.9, so just harcode its value. - */ - return MUSB_HWVERS_1900; -} - -static inline void __iomem *musb_read_target_reg_base(u8 i, void __iomem *mbase) -{ - return NULL; -} - -static inline void musb_write_rxfunaddr(void __iomem *ep_target_regs, - u8 qh_addr_req) -{ -} - -static inline void musb_write_rxhubaddr(void __iomem *ep_target_regs, - u8 qh_h_addr_reg) -{ -} - -static inline void musb_write_rxhubport(void __iomem *ep_target_regs, - u8 qh_h_port_reg) -{ -} - -static inline void musb_write_txfunaddr(void __iomem *mbase, u8 epnum, - u8 qh_addr_reg) -{ -} - -static inline void musb_write_txhubaddr(void __iomem *mbase, u8 epnum, - u8 qh_addr_reg) -{ -} - -static inline void musb_write_txhubport(void __iomem *mbase, u8 epnum, - u8 qh_h_port_reg) -{ -} - -static inline u8 musb_read_rxfunaddr(void __iomem *mbase, u8 epnum) -{ - return 0; -} - -static inline u8 musb_read_rxhubaddr(void __iomem *mbase, u8 epnum) -{ - return 0; -} - -static inline u8 musb_read_rxhubport(void __iomem *mbase, u8 epnum) -{ - return 0; -} - -static inline u8 musb_read_txfunaddr(void __iomem *mbase, u8 epnum) -{ - return 0; -} - -static inline u8 musb_read_txhubaddr(void __iomem *mbase, u8 epnum) -{ - return 0; -} - -static inline u8 musb_read_txhubport(void __iomem *mbase, u8 epnum) -{ - return 0; -} - -#endif /* CONFIG_BLACKFIN */ - #endif /* __MUSB_REGS_H__ */ diff --git a/drivers/usb/musb/Makefile b/drivers/usb/musb/Makefile index bd2b7c5..9554edd 100644 --- a/drivers/usb/musb/Makefile +++ b/drivers/usb/musb/Makefile @@ -7,7 +7,6 @@ obj-$(CONFIG_USB_MUSB_HCD) += musb_hcd.o musb_core.o obj-$(CONFIG_USB_MUSB_UDC) += musb_udc.o musb_core.o -obj-$(CONFIG_USB_BLACKFIN) += blackfin_usb.o obj-$(CONFIG_USB_DAVINCI) += davinci.o obj-$(CONFIG_USB_OMAP3) += omap3.o obj-$(CONFIG_USB_DA8XX) += da8xx.o diff --git a/drivers/usb/musb/blackfin_usb.c b/drivers/usb/musb/blackfin_usb.c deleted file mode 100644 index 65fff88..0000000 --- a/drivers/usb/musb/blackfin_usb.c +++ /dev/null @@ -1,172 +0,0 @@ -/* - * Blackfin MUSB HCD (Host Controller Driver) for u-boot - * - * Copyright (c) 2008-2009 Analog Devices Inc. - * - * Licensed under the GPL-2 or later. - */ - -#include - -#include - -#include -#include -#include - -#include "musb_core.h" - -#ifndef CONFIG_USB_BLACKFIN_CLKIN -#define CONFIG_USB_BLACKFIN_CLKIN 24 -#endif - -/* MUSB platform configuration */ -struct musb_config musb_cfg = { - .regs = (struct musb_regs *)USB_FADDR, - .timeout = 0x3FFFFFF, - .musb_speed = 0, -}; - -/* - * This function read or write data to endpoint fifo - * Blackfin use DMA polling method to avoid buffer alignment issues - * - * ep - Endpoint number - * length - Number of bytes to write to FIFO - * fifo_data - Pointer to data buffer to be read/write - * is_write - Flag for read or write - */ -void rw_fifo(u8 ep, u32 length, void *fifo_data, int is_write) -{ - struct bfin_musb_dma_regs *regs; - u32 val = (u32)fifo_data; - - blackfin_dcache_flush_invalidate_range(fifo_data, fifo_data + length); - - regs = (void *)USB_DMA_INTERRUPT; - regs += ep; - - /* Setup DMA address register */ - bfin_write16(®s->addr_low, val); - SSYNC(); - - bfin_write16(®s->addr_high, val >> 16); - SSYNC(); - - /* Setup DMA count register */ - bfin_write16(®s->count_low, length); - bfin_write16(®s->count_high, 0); - SSYNC(); - - /* Enable the DMA */ - val = (ep << 4) | DMA_ENA | INT_ENA; - if (is_write) - val |= DIRECTION; - bfin_write16(®s->control, val); - SSYNC(); - - /* Wait for compelete */ - while (!(bfin_read_USB_DMA_INTERRUPT() & (1 << ep))) - continue; - - /* acknowledge dma interrupt */ - bfin_write_USB_DMA_INTERRUPT(1 << ep); - SSYNC(); - - /* Reset DMA */ - bfin_write16(®s->control, 0); - SSYNC(); -} - -void write_fifo(u8 ep, u32 length, void *fifo_data) -{ - rw_fifo(ep, length, fifo_data, 1); -} - -void read_fifo(u8 ep, u32 length, void *fifo_data) -{ - rw_fifo(ep, length, fifo_data, 0); -} - - -/* - * CPU and board-specific MUSB initializations. Aliased function - * signals caller to move on. - */ -static void __def_musb_init(void) -{ -} -void board_musb_init(void) __attribute__((weak, alias("__def_musb_init"))); - -static void bfin_anomaly_init(void) -{ - u32 revid; - - if (!ANOMALY_05000346 && !ANOMALY_05000347) - return; - - revid = bfin_revid(); - -#ifdef __ADSPBF54x__ - if (revid > 0) - return; -#endif -#ifdef __ADSPBF52x__ - if (ANOMALY_BF526 && revid > 0) - return; - if (ANOMALY_BF527 && revid > 1) - return; -#endif - - if (ANOMALY_05000346) { - bfin_write_USB_APHY_CALIB(ANOMALY_05000346_value); - SSYNC(); - } - - if (ANOMALY_05000347) { - bfin_write_USB_APHY_CNTRL(0x0); - SSYNC(); - } -} - -int musb_platform_init(void) -{ - /* board specific initialization */ - board_musb_init(); - - bfin_anomaly_init(); - - /* Configure PLL oscillator register */ - bfin_write_USB_PLLOSC_CTRL(0x3080 | - ((480 / CONFIG_USB_BLACKFIN_CLKIN) << 1)); - SSYNC(); - - bfin_write_USB_SRP_CLKDIV((get_sclk()/1000) / 32 - 1); - SSYNC(); - - bfin_write_USB_EP_NI0_RXMAXP(64); - SSYNC(); - - bfin_write_USB_EP_NI0_TXMAXP(64); - SSYNC(); - - /* Route INTRUSB/INTR_RX/INTR_TX to USB_INT0*/ - bfin_write_USB_GLOBINTR(0x7); - SSYNC(); - - bfin_write_USB_GLOBAL_CTL(GLOBAL_ENA | EP1_TX_ENA | EP2_TX_ENA | - EP3_TX_ENA | EP4_TX_ENA | EP5_TX_ENA | - EP6_TX_ENA | EP7_TX_ENA | EP1_RX_ENA | - EP2_RX_ENA | EP3_RX_ENA | EP4_RX_ENA | - EP5_RX_ENA | EP6_RX_ENA | EP7_RX_ENA); - SSYNC(); - - return 0; -} - -/* - * This function performs Blackfin platform specific deinitialization for usb. -*/ -void musb_platform_deinit(void) -{ -} diff --git a/drivers/usb/musb/blackfin_usb.h b/drivers/usb/musb/blackfin_usb.h deleted file mode 100644 index de994bf..0000000 --- a/drivers/usb/musb/blackfin_usb.h +++ /dev/null @@ -1,99 +0,0 @@ -/* - * Blackfin MUSB HCD (Host Controller Driver) for u-boot - * - * Copyright (c) 2008-2009 Analog Devices Inc. - * - * Licensed under the GPL-2 or later. - */ - -#ifndef __BLACKFIN_USB_H__ -#define __BLACKFIN_USB_H__ - -#include - -/* Every register is 32bit aligned, but only 16bits in size */ -#define ureg(name) u16 name; u16 __pad_##name; - -#define musb_regs musb_regs -struct musb_regs { - /* common registers */ - ureg(faddr) - ureg(power) - ureg(intrtx) - ureg(intrrx) - ureg(intrtxe) - ureg(intrrxe) - ureg(intrusb) - ureg(intrusbe) - ureg(frame) - ureg(index) - ureg(testmode) - ureg(globintr) - ureg(global_ctl) - u32 reserved0[3]; - /* indexed registers */ - ureg(txmaxp) - ureg(txcsr) - ureg(rxmaxp) - ureg(rxcsr) - ureg(rxcount) - ureg(txtype) - ureg(txinterval) - ureg(rxtype) - ureg(rxinterval) - u32 reserved1; - ureg(txcount) - u32 reserved2[5]; - /* fifo */ - u16 fifox[32]; - /* OTG, dynamic FIFO, version & vendor registers */ - u32 reserved3[16]; - ureg(devctl) - ureg(vbus_irq) - ureg(vbus_mask) - u32 reserved4[15]; - ureg(linkinfo) - ureg(vplen) - ureg(hseof1) - ureg(fseof1) - ureg(lseof1) - u32 reserved5[41]; - /* target address registers */ - struct musb_tar_regs { - ureg(txmaxp) - ureg(txcsr) - ureg(rxmaxp) - ureg(rxcsr) - ureg(rxcount) - ureg(txtype) - ureg(txinternal) - ureg(rxtype) - ureg(rxinternal) - u32 reserved6; - ureg(txcount) - u32 reserved7[5]; - } tar[8]; -} __attribute__((packed)); - -struct bfin_musb_dma_regs { - ureg(interrupt); - ureg(control); - ureg(addr_low); - ureg(addr_high); - ureg(count_low); - ureg(count_high); - u32 reserved0[2]; -}; - -#undef ureg - -/* EP5-EP7 are the only ones with 1024 byte FIFOs which BULK really needs */ -#define MUSB_BULK_EP 5 - -/* Blackfin FIFO's are static */ -#define MUSB_NO_DYNAMIC_FIFO - -/* No HUB support :( */ -#define MUSB_NO_MULTIPOINT - -#endif diff --git a/drivers/usb/musb/musb_core.h b/drivers/usb/musb/musb_core.h index dc863bd..ae352ce 100644 --- a/drivers/usb/musb/musb_core.h +++ b/drivers/usb/musb/musb_core.h @@ -13,10 +13,6 @@ #include #include -#ifdef CONFIG_USB_BLACKFIN -# include "blackfin_usb.h" -#endif - #define MUSB_EP0_FIFOSIZE 64 /* This is non-configurable */ /* EP0 */ @@ -336,28 +332,6 @@ extern void musb_configure_ep(const struct musb_epinfo *epinfo, u8 cnt); extern void write_fifo(u8 ep, u32 length, void *fifo_data); extern void read_fifo(u8 ep, u32 length, void *fifo_data); -#if defined(CONFIG_USB_BLACKFIN) -/* Every USB register is accessed as a 16-bit even if the value itself - * is only 8-bits in size. Fun stuff. - */ -# undef readb -# define readb(addr) (u8)bfin_read16(addr) -# undef writeb -# define writeb(b, addr) bfin_write16(addr, b) -# undef MUSB_TXCSR_MODE /* not supported */ -# define MUSB_TXCSR_MODE 0 -/* - * The USB PHY on current Blackfin processors is a UTMI+ level 2 PHY. - * However, it has no ULPI support - so there are no registers at all. - * That means accesses to ULPI_BUSCONTROL have to be abstracted away. - */ -static inline u8 musb_read_ulpi_buscontrol(struct musb_regs *musbr) -{ - return 0; -} -static inline void musb_write_ulpi_buscontrol(struct musb_regs *musbr, u8 val) -{} -#else static inline u8 musb_read_ulpi_buscontrol(struct musb_regs *musbr) { return readb(&musbr->ulpi_busctl); @@ -366,6 +340,5 @@ static inline void musb_write_ulpi_buscontrol(struct musb_regs *musbr, u8 val) { writeb(val, &musbr->ulpi_busctl); } -#endif #endif /* __MUSB_HDRC_DEFS_H__ */ diff --git a/drivers/usb/musb/musb_hcd.c b/drivers/usb/musb/musb_hcd.c index 4947936..fee0848 100644 --- a/drivers/usb/musb/musb_hcd.c +++ b/drivers/usb/musb/musb_hcd.c @@ -913,11 +913,6 @@ int submit_bulk_msg(struct usb_device *dev, unsigned long pipe, nextlen = ((len-txlen) < dev->epmaxpacketout[ep]) ? (len-txlen) : dev->epmaxpacketout[ep]; -#ifdef CONFIG_USB_BLACKFIN - /* Set the transfer data size */ - writew(nextlen, &musbr->txcount); -#endif - /* Write the data to the FIFO */ write_fifo(MUSB_BULK_EP, nextlen, (void *)(((u8 *)buffer) + txlen)); -- cgit v1.1